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* | | | | | Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2019-06-179-6/+303
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| * | | | | riscv: remove unused barrier definesRolf Eike Beer2019-06-171-5/+0
| * | | | | riscv: mm: synchronize MMU after pte changeShihPo Hung2019-06-171-0/+13
| * | | | | riscv: dts: add initial board data for the SiFive HiFive UnleashedPaul Walmsley2019-06-172-0/+67
| * | | | | riscv: dts: add initial support for the SiFive FU540-C000 SoCPaul Walmsley2019-06-171-0/+215
| * | | | | arch: riscv: add support for building DTB files from DT source dataPaul Walmsley2019-06-171-0/+2
| * | | | | riscv: Fix udelay in RV32.Nick Hu2019-06-111-1/+1
| * | | | | riscv: export pm_power_off againAndreas Schwab2019-06-111-0/+1
| * | | | | RISC-V: defconfig: enable clocks, serial consoleKevin Hilman2019-06-111-0/+4
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* | | | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner2019-06-0568-611/+68
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* | | | treewide: Add SPDX license identifier - KbuildGreg Kroah-Hartman2019-05-302-0/+2
* | | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-303-27/+3
* | | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-301-9/+1
* | | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-301-5/+1
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* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner2019-05-245-70/+5
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 36Thomas Gleixner2019-05-241-5/+1
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* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-216-0/+6
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* Merge tag 'kbuild-v5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ma...Linus Torvalds2019-05-191-4/+0
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| * arch: remove dangling asm-generic wrappersMasahiro Yamada2019-05-181-4/+0
* | Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2019-05-1934-320/+584
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| * riscv: fix locking violation in page fault handlerAndreas Schwab2019-05-161-1/+2
| * RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCsYash Shah2019-05-163-0/+192
| * RISC-V: Avoid using invalid intermediate translationsPalmer Dabbelt2019-05-161-2/+10
| * riscv: Support BUG() in kernel moduleVincent Chen2019-05-161-1/+1
| * riscv: Add the support for c.ebreak check in is_valid_bugaddr()Vincent Chen2019-05-162-4/+23
| * riscv: support trap-based WARN()Vincent Chen2019-05-161-10/+18
| * riscv: fix sbi_remote_sfence_vma{,_asid}.Gary Guo2019-05-161-7/+12
| * riscv: move switch_mm to its own fileGary Guo2019-05-163-52/+72
| * riscv: move flush_icache_{all,mm} to cacheflush.cGary Guo2019-05-163-50/+62
| * RISC-V: Access CSRs using CSR numbersAnup Patel2019-05-169-48/+57
| * RISC-V: Add interrupt related SCAUSE defines in asm/csr.hAnup Patel2019-05-162-16/+21
| * RISC-V: Use tabs to align macro values in asm/csr.hAnup Patel2019-05-161-38/+38
| * RISC-V: Fix minor checkpatch issues.Atish Patra2019-05-161-2/+2
| * RISC-V: Support nr_cpus command line option.Atish Patra2019-05-161-1/+9
| * RISC-V: Implement nosmp commandline option.Atish Patra2019-04-301-1/+11
| * RISC-V: Add RISC-V specific arch_match_cpu_phys_idAtish Patra2019-04-302-2/+7
| * riscv: vdso: drop unnecessary cc-ldoptionNick Desaulniers2019-04-291-1/+1
| * riscv: call pm_power_off from machine_halt / machine_power_offChristoph Hellwig2019-04-251-6/+9
| * riscv: print the unexpected interrupt causeChristoph Hellwig2019-04-251-1/+2
| * riscv: remove duplicate macros from ptrace.hChristoph Hellwig2019-04-253-21/+12
| * riscv: remove unreachable !HAVE_FUNCTION_GRAPH_RET_ADDR_PTR codeChristoph Hellwig2019-04-251-4/+0
| * riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig2019-04-252-4/+5
| * riscv: simplify the stack pointer setup in head.SChristoph Hellwig2019-04-252-7/+1
| * riscv: clear all pending interrupts when bootingChristoph Hellwig2019-04-251-1/+2
| * riscv: remove CONFIG_RISCV_ISA_AChristoph Hellwig2019-04-253-21/+3
| * riscv: remove unreachable big endian codeChristoph Hellwig2019-04-252-14/+1
| * riscv: turn mm_segment_t into a structChristoph Hellwig2019-04-252-6/+10
| * riscv: use asm-generic/extable.hChristoph Hellwig2019-04-252-6/+2
| * riscv/signal: Fixup additional syscall restartingGuo Ren2019-04-251-0/+6
* | riscv: switch over to generic free_initmem()Mike Rapoport2019-05-141-5/+0
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