summaryrefslogtreecommitdiffstats
path: root/arch/sh/kernel/cpu
Commit message (Collapse)AuthorAgeFilesLines
* sh: sh-rtc support for SH7709.Kristoffer Ericson2007-07-161-0/+28
| | | | | Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Preliminary support for the SH-X3 CPU.Paul Mundt2007-06-205-0/+249
| | | | | | This adds basic support for UP SH-X3. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Hook up hard_smp_processor_id() for INTC2 block.Paul Mundt2007-06-201-2/+7
| | | | | | | We need to know the CPU ID in order to calculate the mask and ack registers effectively. Stub this in for UP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework ipr codeMagnus Damm2007-06-159-155/+229
| | | | | | | | | | | | | | | | | This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework intc2 codeMagnus Damm2007-06-154-34/+70
| | | | | | | | | | | | | | | | | | | The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad unclean and it prevents us from using the shared code to drive board-specific irqs on the se7780 board. This patch reworks the intc2 code by moving the base addresses of the intc2 registers into struct intc2_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. One logic change has been made - the original shared intc2 code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup misaligned data for sh2 lockdep.Paul Mundt2007-06-111-0/+1
| | | | | | | lockdep/irqflags tracing on SH-2 ends up with a misaligned branch, fix it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up dependencies for SH-2 build.Paul Mundt2007-06-112-16/+2
| | | | | | | | | | | | SH-2 can presently get in to some pretty bogus states, so we tidy up the dependencies a bit and get it all building again. This gets us a bit closer to a functional allyesconfig and allmodconfig, though there are still a few things to fix up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off dead SH7604 support.Paul Mundt2007-06-081-9/+1
| | | | | | | | This was added during 2.5.x, but was never moved along. This can easily be resurrected if someone has one they wish to work with, but it's not worth keeping around in its current form. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix the SH7722 flatmem build.Paul Mundt2007-06-081-0/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: URAM node support for SH7722.Paul Mundt2007-06-081-1/+8
| | | | | | | | This adds the URAM block on SH7722 as a separate node. Sparsemem is required for this, or it can simply be disabled by explicitly selecting a flatmem model. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH-4 CPU selects.Paul Mundt2007-06-081-0/+4
| | | | | | | | | Now that select no longer works for selecting the "closest" CPU, we have to explicitly reference the precise sub-type in the few places where it actually matters (presently only setup code and some legacy sh-sci cruft). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH4-202 clock fwk set_rate() mismatch.Paul Mundt2007-06-041-1/+1
| | | | | | | With the SH7722 changes, ->set_rate() also takes an algo_id, SH4-202 was overlooked when this change went in. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix in_nmi symbol build error.Paul Mundt2007-06-041-0/+2
| | | | | | | | If CONFIG_KGDB_NMI is disabled, we're left with a stray in_nmi reference that can't be resolved. Move the symbol under the ifdef, too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: trivial build cleanups.Evgeniy Polyakov2007-05-311-0/+1
| | | | | | | | | | Several errors were spotted during building for custom config (SMP included). Although SMP still does not compile (no ipi and __smp_call_function) and does not work, this looks a bit cleaner. Some other errors obtained via gcc-4.1.0 build. Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix pcrel too far for in_nmi label.Takashi YOSHII2007-05-311-0/+1
| | | | | | | Add lost in_nmi definition to solve pcrel too far. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix clock multiplier on SH7722.dmitry pervushin2007-05-212-12/+29
| | | | | | | | This fixes up the master clock multiplier and initial rate propagation for the SH7722 clocks. Signed-off-by: dmitry pervushin <dimka@nomadgs.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up various compile warnings for SE boards.Paul Mundt2007-05-211-0/+2
| | | | | | | | | | | | - setup-sh7750.c only defines the sh7751_ipr_map when building with SH7751 support. - 7722 Solution Engine was missing a mach-type entry, causing the macro in cf-enabler to be undefined. - arch/sh/mm/init.c needs linux/pagemap.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* spelling fixes: arch/sh/Simon Arlott2007-05-212-2/+2
| | | | | | | Spelling fixes in arch/sh/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6Linus Torvalds2007-05-097-74/+71
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Fix stacktrace simplification fallout. sh: SH7760 DMABRG support. sh: clockevent/clocksource/hrtimers/nohz TMU support. sh: Truncate MAX_ACTIVE_REGIONS for the common case. rtc: rtc-sh: Fix rtc_dev pointer for rtc_update_irq(). sh: Convert to common die chain. sh: Wire up utimensat syscall. sh: landisk mv_nr_irqs definition. sh: Fixup ndelay() xloops calculation for alternate HZ. sh: Add 32-bit opcode feature CPU flag. sh: Fix PC adjustments for varying opcode length. sh: Support for SH-2A 32-bit opcodes. sh: Kill off redundant __div64_32 symbol export. sh: Share exception vector table for SH-3/4. sh: Always define TRAPA_BUG_OPCODE. sh: __GFP_REPEAT for pte allocations, too. rtc: rtc-sh: Fix up dev_dbg() warnings. sh: generic quicklist support.
| * sh: Add 32-bit opcode feature CPU flag.Paul Mundt2007-05-091-0/+1
| | | | | | | | | | | | | | Add a CPU flag for the CPUs that support 32-bit opcodes, which gets passed down to userspace. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Fix PC adjustments for varying opcode length.Paul Mundt2007-05-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a few different cases for figuring out how to size the instruction. We read in the instruction located at regs->pc - 4 when rewinding the opcode to figure out if there's a 32-bit opcode before the faulting instruction, with a default of a - 2 adjustment on a mismatch. In practice this works for the cases where pc - 4 is just another 16-bit opcode, or we happen to have a 32-bit and a 16-bit immediately preceeding the pc value. In the cases where we aren't rewinding, this is much less ugly.. We also don't bother fixing up the places where we're explicitly dealing with 16-bit instructions, since this might lead to confusion regarding the encoding size possibilities on other CPU variants. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Support for SH-2A 32-bit opcodes.Paul Mundt2007-05-092-3/+57
| | | | | | | | | | | | | | | | SH-2A supports both 16 and 32-bit instructions, add a simple helper for figuring out the instruction size in the places where there are hardcoded 16-bit assumptions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Share exception vector table for SH-3/4.Paul Mundt2007-05-093-70/+11
| | | | | | | | | | | | | | | | | | | | | | The only difference between these at the moment are the FPU exceptions, and these are hidden away under CONFIG_SH_FPU (which is only set for the SH-4 case anyways..). This consolidates the two tables, and updates SH-4 to use the updated copy. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | fix file specification in commentsUwe Kleine-König2007-05-095-5/+5
|/ | | | | | | Many files include the filename at the beginning, serveral used a wrong one. Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* sh: R7785RP board updates.Ryusuke Sakato2007-05-071-8/+13
| | | | | | | Some fixups for the R7785RP board. Gets iVDR working. Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Wire up more IRQs for SH7709.Takashi YOSHII2007-05-071-10/+19
| | | | | | | | | hp6xx requires some additional IRQs that aren't currently enabled in the SH7709 setup code. Wire them up. Signed-off-by: Takashi YOSHII <takashi.yoshii.ze@hitachi.com> Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move clock reporting to its own proc entry.Paul Mundt2007-05-071-31/+45
| | | | | | | Previously this was done in cpuinfo, but with the number of clocks growing, it makes more sense to place this in a different proc entry. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Solution Engine SH7705 board and CPU updates.Nobuhiro Iwamatsu2007-05-073-7/+105
| | | | | | | | This fixes up SH7705 CPU support and the SE7705 board for some of the recent changes. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH7722 clock framework support.dmitry pervushin2007-05-074-6/+627
| | | | | | | This adds support for the SH7722 (MobileR) to the clock framework. Signed-off-by: dmitry pervushin <dimka@nomadgs.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: MS7712SE01 board support.Nobuhiro Iwamatsu2007-05-073-0/+64
| | | | | | | Support the SH7712 (SH3-DSP) Solution Engine reference board. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add SH7785 Highlander board support (R7785RP).Paul Mundt2007-05-075-1/+272
| | | | | | | | | | | This adds preliminary support for the SH7785-based Highlander board. Some of the Highlander support code is reordered so that most of it can be reused directly. This also plugs in missing SH7785 checks in the places that need it, as this is the first board to support the CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: speculative execution support for SH7780.Paul Mundt2007-05-071-0/+19
| | | | | | | | | | SH7780 has a speculative execution mode where it can speculatively perform an instruction fetch for subroutine returns, this allows it to be enabled. There are some various pitfalls associated with this mode, so it's left as depending on CONFIG_EXPERIMENTAL and not enabled by default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix bogus regs pointer in do_IRQ().Paul Mundt2007-03-142-1/+5
| | | | | | | | SH-3 and SH-4 were trampling the register, and SH-2 wasn't even setting it in the first place. This ended up with some rather broken behaviour in the sysrq show_regs(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix SH-3 cache entry_mask and way_size calculation.Paul Mundt2007-03-122-16/+17
| | | | | | | | The code for performing the calculation was only in the SH-4 probe path, move it out to the common path so the other parts get this right too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Storage class should be before const qualifierTobias Klauser2007-02-172-4/+4
| | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* sh: rts7751r2d board updates.Paul Mundt2007-02-151-0/+2
| | | | | | | | This tidies up some of the rts7751r2d mess and gets it booting again. Update the defconfig, too. Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Revert TLB miss fast-path changes that broke PTEA parts.Paul Mundt2007-02-141-181/+20
| | | | | | | | This ended up causing problems for older parts (particularly ones using PTEA). Revert this for now, it can be added back in once it's had some more testing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-135-148/+157
| | | | | | | There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use a per-cpu ASID cache.Paul Mundt2007-02-131-2/+9
| | | | | | | | Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-DMAC compile fixesManuel Lauss2007-02-131-1/+1
| | | | | | | | | | | | | | | | | This patch does the following: - remove the make_ipr_irq stuff from dma-sh.c and replace it with a simple channel<->irq mapping table. - add DMTEx_IRQ constants for sh4 cpus - fix sh7751 DMAE irq number The SH7780 uses the same IRQs for DMA as other SH4 types, so I put the constants on top of the dma.h file. Other CPU types need to #define their own DMTEx_IRQ contants in their appropriate header. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add SH7760 IPR IRQ dataManuel Lauss2007-02-131-15/+51
| | | | | | | Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Lazy dcache writeback optimizations.Paul Mundt2007-02-131-4/+0
| | | | | | | | | | | | | | | This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: More tidying for large base pages.Paul Mundt2007-02-131-7/+3
| | | | | | | | There were a few more things that needed fixing up, namely THREAD_SIZE and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE assumptions were being made. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: shmin updates.Takashi YOSHII2007-02-132-3/+37
| | | | | | | | This fixes up shmin (and SH7706/SH7708) IPR support for some of the recent API changes. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7619 / sh7206 IPR initialize updateYoshinori Sato2007-02-132-79/+72
| | | | | | | IPR initialize proceduere update. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Update SH-2 to use the debug trap jump table.Yoshinori Sato2007-02-131-6/+4
| | | | | Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use a jump call table for debug trap handlers.Paul Mundt2007-02-132-2/+2
| | | | | | | | | | | | | | | | | This rips out most of the needlessly complicated sh_bios and kgdb trap handling, and forces it all through a common fast dispatch path. As more debug traps are inserted, it's important to keep them in sync for all of the parts, not just SH-3/4. As the SH-2 parts are unable to do traps in the >= 0x40 range, we restrict the debug traps to the 0x30-0x3f range on all parts, and also bump the kgdb breakpoint trap down in to this range (from 0xff to 0x3c) so it's possible to use for nommu. Optionally, this table can be padded out to catch spurious traps for SH-3/4, but we don't do that yet.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup SH-2 BUG() trap handling.Yoshinori Sato2006-12-121-18/+14
| | | | | | | This adds in support for the BUG() trap on SH-2. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Hook up SH7722 scif ipr interrupts.Paul Mundt2006-12-121-0/+4
| | | | | | Add the SCIF IRQs to the IPR table for SH7722. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-MobileR SH7722 CPU support.Paul Mundt2006-12-1213-7/+206
| | | | | | This adds CPU support for the SH7722. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 15:38:13 +0000