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* MIPS: bcm3384: Initial commit of bcm3384 platform supportKevin Cernekee2014-11-2413-0/+698
* MIPS: Create a helper function for DT setupKevin Cernekee2014-11-244-22/+22
* MIPS: BMIPS: Add PRId for BMIPS5200 (Whirlwind)Kevin Cernekee2014-11-242-0/+2
* MIPS: BMIPS: Add special cache handling in c-r4k.cKevin Cernekee2014-11-241-0/+43
* MIPS: BMIPS: Let each platform customize the CPU1 IRQ maskKevin Cernekee2014-11-242-2/+5
* MIPS: BMIPS: Select the appropriate L1_CACHE_SHIFT for 438x and 5000 CPUsKevin Cernekee2014-11-241-0/+2
* MIPS: Allow MIPS_CPU_SCACHE to be used with different line sizesKevin Cernekee2014-11-241-1/+1
* MIPS: BMIPS: Explicitly configure reset vectors prior to secondary bootKevin Cernekee2014-11-241-21/+8
* MIPS: BMIPS: Mask off timer IRQs when hot-unplugging a CPUJon Fraser2014-11-241-0/+1
* MIPS: BMIPS: Allow BMIPS3300 to utilize SMP ebase relocation codeJon Fraser2014-11-241-0/+1
* MIPS: BMIPS: Introduce helper function to change the reset vectorKevin Cernekee2014-11-241-7/+58
* MIPS: BMIPS: Align secondary boot sequence with latest firmware releasesKevin Cernekee2014-11-241-11/+1
* MIPS: Loongson1B: Add a clockevent/clocksource using PWM TimerKelvin Cheung2014-11-244-31/+266
* MIPS: Loongson1B: Some fixes/updates for LS1BKelvin Cheung2014-11-249-31/+283
* MIPS: Loongson1B: Improve early printkKelvin Cheung2014-11-242-17/+14
* MIPS: Loongson1B: Fix reboot problem on LS1BKelvin Cheung2014-11-242-13/+18
* MIPS: DMA: Explain the lack of special handling for R14000/R16000.Ralf Baechle2014-11-241-0/+5
* MIPS: BCM47XX: Clean up nvram headerRafał Miłecki2014-11-243-39/+33
* MIPS: BCM47XX: Use mtd as an alternative way/API to get NVRAM contentRafał Miłecki2014-11-241-4/+38
* MIPS: Kconfig option to better exercise/debug hybrid FPRsPaul Burton2014-11-242-0/+31
* MIPS: ELF: Set FP mode according to .MIPS.abiflagsPaul Burton2014-11-244-20/+211
* MIPS: ELF: Add definition for the .MIPS.abiflags sectionPaul Burton2014-11-241-0/+25
* MIPS: Support for hybrid FPRsPaul Burton2014-11-245-10/+100
* MIPS: Ensure Config5.UFE is clear on bootPaul Burton2014-11-241-1/+1
* MIPS: detect presence of the FRE & UFR bitsPaul Burton2014-11-243-0/+7
* MIPS: define bits introduced for hybrid FPRsPaul Burton2014-11-241-0/+3
* MIPS: Loongson-3: Add RS780/SBX00 HPET supportHuacai Chen2014-11-246-1/+350
* MIPS: Loongson-3: Add oprofile supportHuacai Chen2014-11-243-0/+225
* MIPS: Loongson: Improve LEFI firmware interfaceHuacai Chen2014-11-2414-42/+234
* MIPS: Loongson: Allow booting from any coreHuacai Chen2014-11-247-36/+67
* MIPS: Loongson-3: Add PHYS48_TO_HT40 supportHuacai Chen2014-11-243-3/+22
* MIPS: R3000: Remove redundant parenthesesIsamu Mogi2014-11-241-1/+1
* MIPS: R3000: Replace magic numbers with macrosIsamu Mogi2014-11-241-5/+6
* MIPS: Remove __strlen_user().Ralf Baechle2014-11-243-34/+0
* MIPS: BCM47XX: Initialize bcma bus later (with mm available)Rafał Miłecki2014-11-243-6/+38
* MIPS: BCM47XX: Move SPROM fallback code into sprom.cRafał Miłecki2014-11-243-56/+73
* MIPS: BCM47XX: Make bcma init NVRAM instead of bcm47xx polling itRafał Miłecki2014-11-241-40/+2
* MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx polling itRafał Miłecki2014-11-242-21/+10
* MIPS: BCM47XX: Get rid of calls to KSEG1ADDRRafał Miłecki2014-11-241-12/+32
* MIPS: Move gic.h to include/linux/irqchip/mips-gic.hAndrew Bresticker2014-11-2417-342/+16
* irqchip: mips-gic: Use proper iomem accessorsAndrew Bresticker2014-11-241-65/+7
* MIPS: Malta: Stop using GIC REG macrosAndrew Bresticker2014-11-241-9/+9
* MIPS: SEAD3: Stop using GIC REG macrosAndrew Bresticker2014-11-241-4/+4
* irqchip: mips-gic: Export function to read counter widthAndrew Bresticker2014-11-242-8/+2
* MIPS: Malta: Use gic_read_count() to read GIC timerAndrew Bresticker2014-11-241-11/+3
* MIPS: SEAD3: Use generic plat_irq_dispatchAndrew Bresticker2014-11-241-22/+1
* MIPS: Malta: Use generic plat_irq_dispatchAndrew Bresticker2014-11-241-92/+0
* irqchip: mips-gic: Remove unnecessary globalsAndrew Bresticker2014-11-241-5/+0
* irqchip: mips-gic: Support local interruptsAndrew Bresticker2014-11-248-57/+56
* irqchip: mips-gic: Use separate edge/level irq_chipsAndrew Bresticker2014-11-241-1/+0