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* x86: unify timex.h variantsThomas Gleixner2007-10-122-2/+2
| | | | | | | | | | Combine the timex.h variants and move the TSC related code into tsc.h. Move the set_cyc2ns_scale() call into the tsc calibraction code, where it belongs. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86: kill 8253pit.hThomas Gleixner2007-10-121-1/+0
| | | | | | | | | | Useless header file with 32 bit and 64 bit variants. Move the single useful line to the place where it is used. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86: disable apic timer for AMD C1E enabled CPUsThomas Gleixner2007-10-122-1/+35
| | | | | | | | | | | AMDs C1E enabled CPUs stop the local apic timer, when both cores are idle. This is a hardware feature which breaks highres/dynticks. Add the same quirk as we have for 32 bit already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86: Fix irq0 / local apic timer accountingThomas Gleixner2007-10-122-1/+3
| | | | | | | | | | | | | | | | | | | | | | The clock events merge introduced a change to the nmi watchdog code to handle the not longer increasing local apic timer count in the broadcast mode. This is fine for UP, but on SMP it pampers over a stuck CPU which is not handling the broadcast interrupt due to the unconditional sum up of local apic timer count and irq0 count. To cover all cases we need to keep track on which CPU irq0 is handled. In theory this is CPU#0 due to the explicit disabling of irq balancing for irq0, but there are systems which ignore this on the hardware level. The per cpu irq0 accounting allows us to remove the irq0 to CPU0 binding as well. Add a per cpu counter for irq0 and evaluate this instead of the global irq0 count in the nmi watchdog code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: convert to clock eventsThomas Gleixner2007-10-126-187/+70
| | | | | | | | | | | Finally switch to the clockevents code. Share code with i386 for hpet and PIT. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: Add (not yet used) clock event functionsThomas Gleixner2007-10-122-0/+85
| | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: prepare idle loop for dynamic ticksChris Wright2007-10-121-0/+4
| | | | | | | | | | | Add tick_nohz_{stop,restart}_sched_tick to idle loop in prepartion for turning on dynticks. These are just noops until NO_HZ is enabled. Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: remove nested irq disablesThomas Gleixner2007-10-121-6/+6
| | | | | | | | | | | | setup_APIC_timer disables interrupts anyway. So no need to do the same in setup_boot_APIC_clock and setup_secondary_APIC_clock. Disable interrupts explicit in the calibration code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: apic change setup_APIC_timer calling conventionThomas Gleixner2007-10-121-4/+4
| | | | | | | | | | | setup_APIC_timer takes the file global calibration result as an argument. Remove it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: Remove APIC_DIVISORThomas Gleixner2007-10-121-5/+3
| | | | | | | | | | | | | APIC_DIVISOR is rather useless. It makes the calibration result more accurate in the first place, but we discard this later when we write the value to the APIC timer by dividing the calibration value by APIC_DIVISOR. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: Move apic calibration code aroundThomas Gleixner2007-10-121-9/+6
| | | | | | | | | | | | | Let the calibration code fill in calibration_result directly and move the variable on top of the file. Fixup a printk w/o log level while at it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: remove pit synchronizationThomas Gleixner2007-10-121-18/+0
| | | | | | | | | | | | | | | | The APIC timer setup code synchronizes the local APIC timer to the PIT/HPET. This is pointless as the PIT and the local APIC timer frequency are not correlated and the APIC timer calibration can never be accurate enough to avoid that the local APIC timer and the PIT/HPET drift apart. Simply remove it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: prepare apic code for clock eventsThomas Gleixner2007-10-121-8/+15
| | | | | | | | | | | Change __setup_APIC_LVTT so it takes the arguments which are necessary for the later clock events switch. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86: remove never used apic_mappedYinghai Lu2007-10-121-3/+2
| | | | | | | | | | | | | | [ tglx: arch/x86 adaptation ] Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* i386: prepare sharing the PIT codeThomas Gleixner2007-10-121-4/+0
| | | | | | | | | | | | | | | PIT clock events work already and the PIT handling is the same for i386 and x86_64. x86_64 does not support PIT as a clock source, so disable the PIT clocksource for x86_64. Use the i386 i8253.h include file for x86_64 as well to share the exports and the PIT constants. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* i386: prepare sharing the PIT codeThomas Gleixner2007-10-121-1/+3
| | | | | | | | | | | | | | PIT clock events work already and the PIT handling is the same for i386 and x86_64. x86_64 does not support PIT as a clock source, so disable the PIT clocksource for x86_64. Prepare i8253.h to be shared with x8664 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* i386: prepare sharing the hpet code with x86_64Thomas Gleixner2007-10-121-1/+58
| | | | | | | | | | | | | | | | Add the x8664 specific bits (mapping) to share the hpet code later. Move the reserve_platform_timer call to late init. This is necessary for x86_64, as hpet enable() is called before memory is setup. i386 calls it in late_time_init, but it does not hurt to do it later for both. Pull in the x8664 hpet disable command line option as well. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* i386: prepare sharing the hpet code with x86_64Thomas Gleixner2007-10-121-8/+16
| | | | | | | | | | | | | | | The hpet implementations of i386 and x8664 has been mostly the same before the clock events conversion of i386. The clock events conversion of i386 hpet is already done. So it makes sense to share the code for the x86_64 clock events conversion. Abstract out the mapping functions. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: Consolidate tsc calibrationThomas Gleixner2007-10-123-80/+92
| | | | | | | | | | | Move the TSC calibration code to tsc.c. Reimplement it so the pm timer can be used as a reference as well. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86_64: Select clocksource watchdog in KconfigThomas Gleixner2007-10-121-0/+4
| | | | | | | | | | TSC must be verified by a continous and reliable clocksource to allow high resolution timers and or dynamic ticks. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86: Geode MFGPT clock event device supportAndres Salomon2007-10-122-0/+175
| | | | | | | | | | | | | | | Add support for an MFGPT clock event device; this allows us to use MFGPTs as the basis for high-resolution timers. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andres Salomon <dilinger@debian.org> Cc: Andi Kleen <ak@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: Geode Multi-Function General Purpose Timers supportAndres Salomon2007-10-123-1/+202
| | | | | | | | | | | | | | | | | | | This adds support for Multi-Function General Purpose Timers. It detects the available timers during southbridge init, and provides an API for allocating and setting the timers. They're higher resolution than the standard PIT, so the MFGPTs come in handy for quite a few things. Note that we never clobber the timers that the BIOS might have opted to use; we just check for unused timers. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andres Salomon <dilinger@debian.org> Cc: Andi Kleen <ak@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: block irq balancing for timerVenki Pallipadi2007-10-121-1/+1
| | | | | | | | | | | | | | Disable irq balancing on IRQ0. Several SIS chipsets lock up when you try to change affinity of IRQ #0. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* x86: Fix irq0 / local apic timer accountingThomas Gleixner2007-10-122-1/+5
| | | | | | | | | | | | | | | | | | | | | | The clock events merge introduced a change to the nmi watchdog code to handle the not longer increasing local apic timer count in the broadcast mode. This is fine for UP, but on SMP it pampers over a stuck CPU which is not handling the broadcast interrupt due to the unconditional sum up of local apic timer count and irq0 count. To cover all cases we need to keep track on which CPU irq0 is handled. In theory this is CPU#0 due to the explicit disabling of irq balancing for irq0, but there are systems which ignore this on the hardware level. The per cpu irq0 accounting allows us to remove the irq0 to CPU0 binding as well. Add a per cpu counter for irq0 and evaluate this instead of the global irq0 count in the nmi watchdog code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
* missed bio_endio() in axonramAl Viro2007-10-111-2/+2
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'master' of ↵Linus Torvalds2007-10-11417-11985/+24220
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (408 commits) [POWERPC] Add memchr() to the bootwrapper [POWERPC] Implement logging of unhandled signals [POWERPC] Add legacy serial support for OPB with flattened device tree [POWERPC] Use 1TB segments [POWERPC] XilinxFB: Allow fixed framebuffer base address [POWERPC] XilinxFB: Add support for custom screen resolution [POWERPC] XilinxFB: Use pdata to pass around framebuffer parameters [POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pci [POWERPC] 4xx: Kilauea defconfig file [POWERPC] 4xx: Kilauea DTS [POWERPC] 4xx: Add AMCC Kilauea eval board support to platforms/40x [POWERPC] 4xx: Add AMCC 405EX support to cputable.c [POWERPC] Adjust TASK_SIZE on ppc32 systems to 3GB that are capable [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB handlers [POWERPC] 85xx: Enable FP emulation in MPC8560 ADS defconfig [POWERPC] 85xx: Killed <asm/mpc85xx.h> [POWERPC] 85xx: Add cpm nodes for 8541/8555 CDS [POWERPC] 85xx: Convert mpc8560ads to the new CPM binding. [POWERPC] mpc8272ads: Remove muram from the CPM reg property. [POWERPC] Make clockevents work on PPC601 processors ... Fixed up conflict in Documentation/powerpc/booting-without-of.txt manually.
| * [POWERPC] Add memchr() to the bootwrapperDavid Gibson2007-10-122-0/+14
| | | | | | | | | | | | | | | | This adds a memchr() implementation to the bootwrapper, which will be needed when libfdt is merged in. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Implement logging of unhandled signalsOlof Johansson2007-10-124-1/+70
| | | | | | | | | | | | | | | | | | | | Implement show_unhandled_signals sysctl + support to print when a process is killed due to unhandled signals just as i386 and x86_64 does. Default to having it off, unlike x86 that defaults on. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Add legacy serial support for OPB with flattened device treeValentine Barshak2007-10-121-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently find_legacy_serial_ports() can find no serial ports on the OPB with flattened device tree. Thus no legacy boot console can be initialized. Just the early udbg console works, which is initialized with udbg_init_44x_as1 on the UART's physical address specified in kernel config. This happens because we look for ns16750 serial devices only and expect opb node to have a device type property. This patch makes it look for ns16550-compatible devices and use of_device_is_compatible() for opb in case device type is not specified. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Use 1TB segmentsPaul Mackerras2007-10-1218-209/+400
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the kernel use 1TB segments for all kernel mappings and for user addresses of 1TB and above, on machines which support them (currently POWER5+, POWER6 and PA6T). We detect that the machine supports 1TB segments by looking at the ibm,processor-segment-sizes property in the device tree. We don't currently use 1TB segments for user addresses < 1T, since that would effectively prevent 32-bit processes from using huge pages unless we also had a way to revert to using 256MB segments. That would be possible but would involve extra complications (such as keeping track of which segment size was used when HPTEs were inserted) and is not addressed here. Parts of this patch were originally written by Ben Herrenschmidt. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pciValentine Barshak2007-10-121-2/+4
| | | | | | | | | | | | | | | | Add 64-bit physical address support to setup_indirect_pci(). Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * Merge branch 'for-2.6.24' of ↵Paul Mackerras2007-10-1218-287/+255
| |\ | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.24
| | * [POWERPC] Adjust TASK_SIZE on ppc32 systems to 3GB that are capableKumar Gala2007-10-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All ppc32 systems except PReP and 8xx are capable of handling 3G of user address space. Old legacy had set this to 2GB and no one has bothered to fix it. 8xx could be bumped up to 3GB if its SW TLB miss handlers were fixed up to properly determine kernel/user addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB ↵Kumar Gala2007-10-114-22/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | handlers Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or user space address. This mimics how the macro is_kernel_addr() works. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Enable FP emulation in MPC8560 ADS defconfigKumar Gala2007-10-111-5/+18
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Killed <asm/mpc85xx.h>Kumar Gala2007-10-117-142/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | asm-powerpc/mpc85xx.h was really a hold over from arch/ppc. Now that more decoupling has occurred we can remove <asm/mpc85xx.h> and some of its legacy. As part of this we moved the definition of CPM_MAP_ADDR into cpm2.h for 85xx platforms. This is a stop gap until drivers stop using CPM_MAP_ADDR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Add cpm nodes for 8541/8555 CDSScott Wood2007-10-112-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't use any CPM devices on these boards, but the muram node on these chips is different from the 8560, so it's helpful to people working with custom boards based on these chips. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Convert mpc8560ads to the new CPM binding.Scott Wood2007-10-113-116/+134
| | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] mpc8272ads: Remove muram from the CPM reg property.Scott Wood2007-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | This is described by the muram node now. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Merge branch 'for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-mpc52xx ↵Paul Mackerras2007-10-124-98/+65
| |\ \ | | | | | | | | | | | | into for-2.6.24
| | * | [POWERPC] MPC5200: Don't make firmware fixups into common codeGrant Likely2007-10-102-33/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Lite5200 u-boot image doesn't entirely configure the processor correctly and so Linux needs to fixup the cpu setup in setup_arch. Fixing the CPU setup is good, but making it into common code is not a good idea. New board ports should be encouraged not to take the lead of the lite5200 and instead get their firmware to setup the CPU the right way. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
| | * | [POWERPC] MPC52xx: Trim includes on mpc5200 platform support codeGrant Likely2007-10-104-50/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop unnecessary includes for MPC5200 based boards Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
| | * | [POWERPC] MPC52xx: Drop show_cpuinfo platform hooks from Lite5200Grant Likely2007-10-101-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This hook doesn't really add any new information. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
| * | | [POWERPC] 4xx: Kilauea defconfig fileStefan Roese2007-10-111-0/+768
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | [POWERPC] 4xx: Kilauea DTSStefan Roese2007-10-111-0/+252
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | [POWERPC] 4xx: Add AMCC Kilauea eval board support to platforms/40xStefan Roese2007-10-113-2/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the new 405EX and the AMCC eval board Kilauea to arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | [POWERPC] 4xx: Add AMCC 405EX support to cputable.cStefan Roese2007-10-111-0/+11
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | Merge branch 'virtex-for-2.6.24' of ↵Josh Boyer2007-10-112-3/+3
| |\ \ \ | | |_|/ | |/| | | | | | git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.24-4xx
| | * | [POWERPC] Uartlite: bootwrapper bug fix, getc loops foreverGrant Likely2007-10-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fixes inverted logic in uartlite_getc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | [POWERPC] Don't build arch/powerpc/sysdev/dcr.c for ARCH=ppc kernelsGrant Likely2007-10-101-1/+1
| | |/ | | | | | | | | | | | | | | | | | | dcr.c is an arch/powerpc only thing. Compiling ppc405 arch/ppc kernels throws warnings without this change. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-19 16:29:38 +0000