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* Merge tag 'asm-generic-fixes-5.19' of ↵Linus Torvalds2022-06-023-10/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic fixes from Arnd Bergmann: "The header cleanup series from Masahiro Yamada ended up causing some regressions in the ABI because of an ambigous uid_t type. This was only caught after the original patches got merged, but at least the fixes are trivial and hopefully complete" * tag 'asm-generic-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: binder: fix sender_euid type in uapi header sparc: fix mis-use of __kernel_{uid,gid}_t in uapi/asm/stat.h powerpc: use __kernel_{uid,gid}32_t in uapi/asm/stat.h mips: use __kernel_{uid,gid}32_t in uapi/asm/stat.h
| * sparc: fix mis-use of __kernel_{uid,gid}_t in uapi/asm/stat.hMasahiro Yamada2022-06-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 31a088b664d6 ("sparc: add asm/stat.h to UAPI compile-test coverage") converted as follows: uid_t --> __kernel_uid_t gid_t --> __kernel_gid_t It changed the field widths of struct stat because Sparc uses 16-bits for ___kernel_{uid,gid}_t as in arch/sparc/include/uapi/asm/posix_types.h. The safe replacements across all architectures are: uid_t --> __kernel_uid32_t gid_t --> __kernel_gid32_t as defined in include/linux/types.h. A similar issue was reported for the android binder. [1] [1]: https://lore.kernel.org/all/20220601010017.2639048-1-cmllamas@google.com/ Fixes: 31a088b664d6 ("sparc: add asm/stat.h to UAPI compile-test coverage") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * powerpc: use __kernel_{uid,gid}32_t in uapi/asm/stat.hMasahiro Yamada2022-06-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c01013a2f8dd ("powerpc: add asm/stat.h to UAPI compile-test coverage") converted as follows: uid_t --> __kernel_uid_t gid_t --> __kernel_gid_t The bit width of __kernel_{uid,gid}_t is 16 or 32-bits depending on architectures. PPC uses 32-bits for them as in include/uapi/asm-generic/posix_types.h, so the previous conversion is probably fine, but let's stick to the arch-independent conversion just in case. The safe replacements across all architectures are: uid_t --> __kernel_uid32_t gid_t --> __kernel_gid32_t as defined in include/linux/types.h. A similar issue was reported for the android binder. [1] [1]: https://lore.kernel.org/all/20220601010017.2639048-1-cmllamas@google.com/ Fixes: c01013a2f8dd ("powerpc: add asm/stat.h to UAPI compile-test coverage") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * mips: use __kernel_{uid,gid}32_t in uapi/asm/stat.hMasahiro Yamada2022-06-021-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8c1a381a4fbb ("mips: add asm/stat.h to UAPI compile-test coverage") converted as follows: uid_t --> __kernel_uid_t gid_t --> __kernel_gid_t The bit width of __kernel_{uid,gid}_t is 16 or 32-bits depending on architectures. MIPS uses 32-bits for them as in include/uapi/asm-generic/posix_types.h, so the previous conversion is probably fine, but let's stick to the arch-independent conversion just in case. The safe replacements across all architectures are: uid_t --> __kernel_uid32_t gid_t --> __kernel_gid32_t as defined in include/linux/types.h. A similar issue was reported for the android binder. [1] [1]: https://lore.kernel.org/all/20220601010017.2639048-1-cmllamas@google.com/ Fixes: 8c1a381a4fbb ("mips: add asm/stat.h to UAPI compile-test coverage") Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | Merge tag 'arm-late-5.19' of ↵Linus Torvalds2022-06-0248-97/+836
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull more ARM SoC updates from Arnd Bergmann: "This is the second part of the general SoC updates, containing everything that did not make it in the initial pull request, or that came in as a bugfix later. - Devicetree updates for SoCFPGA, ASPEED, AT91 and Rockchip, including a new machine using an ASPEED BMC. - More DT fixes from Krzysztof Kozlowski across platforms - A new SoC platform for the GXP baseboard management controller, used in current server products from HPE" * tag 'arm-late-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (56 commits) ARM: configs: Enable more audio support for i.MX tee: optee: Pass a pointer to virt_addr_valid() arm64: dts: rockchip: rename Quartz64-A bluetooth gpios arm64: dts: rockchip: add clocks property to cru node rk3368 arm64: dts: rockchip: add clocks property to cru node rk3308 arm64: dts: rockchip: add clocks to rk356x cru ARM: dts: rockchip: add clocks property to cru node rk3228 ARM: dts: rockchip: add clocks property to cru node rk3036 ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188 ARM: dts: rockchip: add clocks property to cru node rk3288 ARM: dts: rockchip: Remove "amba" bus nodes from rv1108 ARM: dts: rockchip: add clocks property to cru node rv1108 arm64: dts: sprd: use new 'dma-channels' property ARM: dts: da850: use new 'dma-channels' property ARM: dts: pxa: use new 'dma-channels/requests' properties soc: ixp4xx/qmgr: Fix unused match warning ARM: ep93xx: Make ts72xx_register_flash() static ARM: configs: enable support for Kontron KSwitch D10 ep93xx: clock: Do not return the address of the freed memory arm64: dts: intel: add device tree for n6000 ...
| * | ARM: configs: Enable more audio support for i.MXMark Brown2022-05-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic audio card for Freescale platforms is used by a wide range of i.MX systems and also has selects for the various audio controllers used on them so will help with systems that don't use that specific card too. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20220513121258.168364-1-broonie@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | Merge tag 'socfpga_dts_updates_for_v5.19' of ↵Arnd Bergmann2022-05-306-6/+73
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/late SoCFPGA dts updates for v5.19 - dtschema fix SPI NOR node - correct dt-bindings doc for Altera gpio driver - add support for n6000 Agilex platform and dt-bindings documentation * tag 'socfpga_dts_updates_for_v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: intel: add device tree for n6000 dt-bindings: intel: add binding for Intel n6000 dt-bindings: soc: add bindings for Intel HPS Copy Engine dt-bindings: gpio: altera: correct interrupt-cells ARM: dts: socfpga: align SPI NOR node name with dtschema Link: https://lore.kernel.org/r/20220519232317.16079-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | arm64: dts: intel: add device tree for n6000Matthew Gerlach2022-05-192-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device tree for the n6000 instantiation of Agilex Hard Processor System (HPS). Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | ARM: dts: socfpga: align SPI NOR node name with dtschemaKrzysztof Kozlowski2022-05-124-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| * | | Merge tag 'aspeed-5.19-devicetree' of ↵Arnd Bergmann2022-05-309-55/+431
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/late ASPEED device tree updates for 5.19 - New machine: * Nuvia's DC-SCM BMC - Enable AST2600 GFX, the BMC-driven graphics device - Add a bunch of devices for the AST2600 EVB - Updates to the AST2600 Bletchley machine - Backwards compatible changes to support the new spi-mem based SPI NOR driver * tag 'aspeed-5.19-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed: ast2600-evb: Enable GFX device ARM: dts: aspeed: Add GFX node to AST2600 ARM: dts: aspeed: ast2600-evb: Enable virtual hub ARM: dts: aspeed: ast2600-evb: Enable video engine ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIO ARM: dts: aspeed: Add Nuvia DC-SCM BMC ARM: dts: aspeed: bletchley: add sample averaging for ADM1278 ARM: dts: aspeed: bletchley: add eeprom node on each sled ARM: dts: aspeed: bletchley: add pca9536 node on each sled ARM: dts: aspeed: bletchley: update gpio0 line names ARM: dts: aspeed: bletchley: Enable mdio0 bus ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smc ARM: dts: aspeed: bletchley: enable ehci0 device node ARM: dts: aspeed: Add USB2.0 device controller node ARM: dts: aspeed-g4: Set spi-max-frequency for all flashes ARM: dts: aspeed: Enable Dual SPI RX transfers ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1 Link: https://lore.kernel.org/r/CACPK8XfUmFxU8Y6C+aZ2+=dT7=fCfs2=2_aYqyRjoXCoeQaUWQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | ARM: dts: aspeed: ast2600-evb: Enable GFX deviceJoel Stanley2022-05-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the GFX device with a framebuffer memory region. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220302024930.18758-3-tommy_huang@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: Add GFX node to AST2600Joel Stanley2022-05-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GFX device is present in the AST2600 SoC. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220302024930.18758-2-tommy_huang@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: ast2600-evb: Enable virtual hubHoward Chiu2022-05-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable Aspeed VHub for HID emulation Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23155E8A6193118544A7DBF3E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: ast2600-evb: Enable video engineHoward Chiu2022-05-191-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable video engine and reserve memory for it. Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23159B914BF7EF937FEDD2B5E61E9@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: everest, rainier: Add power-ffs-sync-history GPIOBrandon Wyman2022-05-192-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IBM Everest and Rainier systems have a GPIO line that goes to the power supplies. It has a dual function: 1) Fans Full Speed, and 2) Sync input history. Signed-off-by: Brandon Wyman <bjwyman@gmail.com> Link: https://lore.kernel.org/r/20220421213638.1151193-1-bjwyman@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: Add Nuvia DC-SCM BMCGraeme Gregory2022-05-192-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial version of device tree for Nuvia DC-SCM BMC which is equipped with Aspeed AST2600 BMC SoC. Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Link: https://lore.kernel.org/r/20220325190247.468079-1-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: add sample averaging for ADM1278Potin Lai2022-05-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | set number of sample averaging to 128 for both PWR_AVG and VI_AVG Signed-off-by: Potin Lai <potin.lai@quantatw.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: add eeprom node on each sledPotin Lai2022-05-191-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add eeprom (24c26) on each sled for storing sled fru information. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-7-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: add pca9536 node on each sledPotin Lai2022-05-191-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an ioexp node on each sled baseed on DVT schematic, address at 0x41. P0: SLEDX_SWD_MUX P1: SLEDX_XRES_SWD_N P2: SLEDX_CLKREQ_N P3: SLEDX_PCIE_PWR_EN Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-6-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: update gpio0 line namesPotin Lai2022-05-191-15/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update GPIO line names based on DVT schematic Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-5-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: Enable mdio0 busPotin Lai2022-05-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable mdio0 bus based on DVT schematic. TODO: Add Marvell 88E6191 Switch Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-4-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: switch spi2 driver to aspeed-smcPotin Lai2022-05-191-20/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to DVT schematic has stable spi signal, switch back to aspeed-smc driver for improving performance. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: bletchley: enable ehci0 device nodePotin Lai2022-05-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable ehci0 node for USB2 host feature Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Reviewed-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20220509151118.4899-2-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: Add USB2.0 device controller nodeNeal Liu2022-05-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB2.0 device controller(udc) node to device tree for AST2600. Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Link: https://lore.kernel.org/r/20220518062043.1075360-3-neal_liu@aspeedtech.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed-g4: Set spi-max-frequency for all flashesTao Ren2022-05-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set "spi-max-frequency" to 50 MHz for all the flashes under the FMC controller to ensure the clock frequency is calculated correctly. Suggested-by: Cédric Le Goater <clg@kaod.org> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-11-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: Enable Dual SPI RX transfersCédric Le Goater2022-05-193-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All these controllers support at least Dual SPI. Update the DTs. Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Tao Ren <rentao.bupt@gmail.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-10-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllersCédric Le Goater2022-05-193-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is compatible with the current driver and addresses issues when running 'make dt_binding_check'. Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Tao Ren <rentao.bupt@gmail.com> Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Link: https://lore.kernel.org/r/20220509175616.1089346-2-clg@kaod.org Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1Howard Chiu2022-05-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mac0/1 and mac2/3 are physically located on different die, they have different properties by nature, which is mac0/1 has smaller delay step. The property 'phy-mode' on ast2600 mac0 and mac1 is recommended to set to 'rgmii-rxid' which enables the RX interface delay from the PHY chip. Refer page 45 of SDK User Guide v08.00 https://github.com/AspeedTech-BMC/openbmc/releases/download/v08.00/SDK_User_Guide_v08.00.pdf Fixes: 2ca5646b5c2f ("ARM: dts: aspeed: Add AST2600 and EVB") Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23152A548AAE81140B57DD69E6E09@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
| * | | | Merge tag 'v5.19-rockchip-dts64-2' of ↵Arnd Bergmann2022-05-274-4/+9
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late Clock properties for cru nodes to match the yaml-converted bindings and renaming of Quartz-A bluetooth pin nodename to not conflict with Yaml constraints. * tag 'v5.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: rename Quartz64-A bluetooth gpios arm64: dts: rockchip: add clocks property to cru node rk3368 arm64: dts: rockchip: add clocks property to cru node rk3308 arm64: dts: rockchip: add clocks to rk356x cru Link: https://lore.kernel.org/r/7695907.Sb9uPGUboI@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | arm64: dts: rockchip: rename Quartz64-A bluetooth gpiosPeter Geis2022-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bluetooth binding for the Quartz64 Model A has incorrectly named host-wakeup and device-wakeup gpios. Rename them to clear some dtbs_check warnings. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-4-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | arm64: dts: rockchip: add clocks property to cru node rk3368Johan Jonker2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names because the device has to have at least one input clock. Also in case someone wants to add properties that start with assign-xxx to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329180550.31043-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | arm64: dts: rockchip: add clocks property to cru node rk3308Johan Jonker2022-05-271-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names to the rk3308 cru node, because the device has to have at least one input clock. Also in case someone wants to add properties that start with assign-xxx to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' With the addition of new properties also sort the node properties a little bit. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329184339.1134-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | arm64: dts: rockchip: add clocks to rk356x cruPeter Geis2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rk356x cru requires a 24m clock input to function. Add the clocks properties to the cru to clear some dtbs_check warnings. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220511150117.113070-3-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | | | Merge tag 'v5.19-rockchip-dts32-2' of ↵Arnd Bergmann2022-05-276-20/+23
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late Amba and clock fixes to conform better to actual dt-bindings. * tag 'v5.19-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add clocks property to cru node rk3228 ARM: dts: rockchip: add clocks property to cru node rk3036 ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188 ARM: dts: rockchip: add clocks property to cru node rk3288 ARM: dts: rockchip: Remove "amba" bus nodes from rv1108 ARM: dts: rockchip: add clocks property to cru node rv1108 Link: https://lore.kernel.org/r/4798587.jE0xQCEvom@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | ARM: dts: rockchip: add clocks property to cru node rk3228Johan Jonker2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names to the rk3228 cru node, because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220330121923.24240-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | ARM: dts: rockchip: add clocks property to cru node rk3036Johan Jonker2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names to the rk3036 cru node, because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220330114847.18633-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | ARM: dts: rockchip: add clocks property to cru node rk3066a/rk3188Johan Jonker2022-05-272-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks property to rk3066a/rk3188 cru node to fix warnings like: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329111323.3569-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | ARM: dts: rockchip: add clocks property to cru node rk3288Johan Jonker2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks property to rk3288 cru node to fix warnings like: 'clocks' is a dependency of 'assigned-clocks'. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220329113657.4567-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | ARM: dts: rockchip: Remove "amba" bus nodes from rv1108Johan Jonker2022-05-271-18/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful purpose, and certainly bear no relation at all to the actual underlying interconnect topology. They appear to be cargo-cult copying from a design misstep in the very early days of FDT adoption on ARM, which was righted with the "arm,primecell" compatible, and the last trace of the idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus""). As such, they can simply be removed and the DMA-330 nodes fitted into the normal sort order. The node names should be generic, so rename it to "dma-controller". Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220330131608.30040-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | ARM: dts: rockchip: add clocks property to cru node rv1108Johan Jonker2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clocks and clock-names to the rv1108 cru node, because the device has to have at least one input clock. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20220330131608.30040-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | | | | arm64: dts: sprd: use new 'dma-channels' propertyKrzysztof Kozlowski2022-05-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The '#dma-channels' property was deprecated in favor of one defined by generic dma-common DT bindings. Add new property while keeping old one for backwards compatibility. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/20220516142857.6419-4-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | ARM: dts: da850: use new 'dma-channels' propertyKrzysztof Kozlowski2022-05-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The '#dma-channels' property was deprecated in favor of one defined by generic dma-common DT bindings. Add new property while keeping old one for backwards compatibility. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220516142857.6419-3-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | ARM: dts: pxa: use new 'dma-channels/requests' propertiesKrzysztof Kozlowski2022-05-274-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The '#dma-channels' and '#dma-requests' properties were deprecated in favor of these defined by generic dma-common DT bindings. Add new properties while keeping old ones for backwards compatibility. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220516142857.6419-2-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | ARM: ep93xx: Make ts72xx_register_flash() staticAlexander Sverdlin2022-05-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ... and fix the warning/error: arch/arm/mach-ep93xx/ts72xx.c:154:13: error: no previous prototype for function 'ts72xx_register_flash' [-Werror,-Wmissing-prototypes] void __init ts72xx_register_flash(struct mtd_partition *parts, int n, ^ arch/arm/mach-ep93xx/ts72xx.c:154:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void __init ts72xx_register_flash(struct mtd_partition *parts, int n, ^ static Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/lkml/202202140141.HRZ3WZwi-lkp@intel.com/T/ Link: https://lore.kernel.org/r/20220523065616.325052-1-alexander.sverdlin@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | ARM: configs: enable support for Kontron KSwitch D10Michael Walle2022-05-271-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kontron KSwitch D10 is based on a Microchip LAN9668 SoC. It is a managed ethernet network switch with either 8 copper ports or 6 copper ports and 2 SFP cages. Enable all required kconfig symbols, either as module where possible or compiled-in where it is not possible. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220518141542.531148-1-michael@walle.cc' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | Merge tag 'at91-dt-5.19-2' of ↵Arnd Bergmann2022-05-276-3/+58
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late AT91 DT #2 for 5.19: - at91: more DT compliance updates for RTC and RTT nodes - at91: sama7g5: add microphone support * tag 'at91-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5ek: add node for PDMC0 ARM: dts: at91: sama7g5: add nodes for PDMC ARM: dts: at91: Use the generic "rtc" node name for the rtt IPs ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' property Link: https://lore.kernel.org/r/20220517153252.92393-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | | ARM: dts: at91: sama7g5ek: add node for PDMC0Codrin Ciubotariu2022-05-171-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SAMA7G5-EK has 4 PDM microphones connected to PDMC0. PDMC0 pinmux is in conflict with gmac1, gmac1 being enabled by default. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220307122202.2251639-6-codrin.ciubotariu@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
| | * | | | | | ARM: dts: at91: sama7g5: add nodes for PDMCCodrin Ciubotariu2022-05-171-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microchip's SAMA7G5 embeds two PDMCs. The PDMCs can be used to connect 2x4 PDM microphones. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220307122202.2251639-5-codrin.ciubotariu@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
| | * | | | | | ARM: dts: at91: Use the generic "rtc" node name for the rtt IPsSergiu Moga2022-05-172-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the DT specification recommends, the node names should be of a generic nature. Thus, the most appropriate generic node name for the at91 rtt IPs is the "rtc" node name. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220304161159.147784-3-sergiu.moga@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
| | * | | | | | ARM: dts: at91: Add the required 'atmel, rtt-rtc-time-reg' propertySergiu Moga2022-05-173-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required 'atmel,rtt-rtc-time-reg' property to the "rtt" nodes of the board files that were missing it. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/all/20220304161159.147784-2-sergiu.moga@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>