| Commit message (Collapse) | Author | Age | Files | Lines |
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Build Qualcomm MSM Power Manager driver, which is needed for QCM2290
platform, otherwise the TLMM pin controller driver probe fails on boot.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601075650.1437184-2-vladimir.zapolskiy@linaro.org
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Enabled sc828x0xp lpasscc clock controller driver required for X13s laptop.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-7-srinivas.kandagatla@linaro.org
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig
Qualcomm ARM64 defconfig updates for v6.5
Enable the FSA4480 driver to enable USB Type-C altmode on devices such
as SM8350 and SM8450 HDK. Enable the IPQ6018 APSS clock and PLL
controller for CPU scaling, and enable GPU clock river for SA8775P.
* tag 'qcom-arm64-defconfig-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: Enable ipq6018 apss clock and PLL controller
arm64: defconfig: enable FSA4480 driver as module
arm64: defconfig: enable the SA8775P GPUCC driver
Link: https://lore.kernel.org/r/20230610170955.2478831-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The PLL and IPQ6018 APSS clock controller are used on several
IPQ platforms to clock the CPU. Hence it should be enabled and built-in.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230406061314.10916-6-quic_devipriy@quicinc.com
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Enable the FSA4480 driver as module for Qualcomm HDK8350 and HDK8450
platforms to permit USB-C Altmode support.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-5-6c43d293995f@linaro.org
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Enable the GPUCC module for SA8775P platforms in the arm64 defconfig.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230417125844.400782-2-brgl@bgdev.pl
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/defconfig
i.MX defconfig changes for 6.5:
- Remove KERNEL_LZO and FW_LOADER_USER_HELPER from imx_v6_v7_defconfig.
- Enable i.MX8M video capture drivers and TI SN65DSI83 driver for arm64
defconfig.
* tag 'imx-defconfig-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: defconfig: Enable the TI SN65DSI83 driver
ARM: imx_v6_v7_defconfig: Remove KERNEL_LZO config
arm64: defconfig: Enable video capture drivers on imx8mm/imx8mn
ARM: imx_v6_v7_defconfig: Remove firmware loader helper
Link: https://lore.kernel.org/r/20230610072530.418847-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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There are some imx8mm-based boards that contain an SN65DSI83 MIPI
DSI to LVDS bridge chip.
Add support for it so that the LVDS output can be functional by default.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The KERNEL_GZIP is used in most config and is the default, there is no
clear reason to diverge so let default be used.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The imx8m Mini and imx8m Nano both use the same CSIS driver for
interfacing with sensors and cameras. The Mini routes the CSIS
output to the imx7-CSI driver, and the Nano routes the CSIS
through the imx8-isi driver like the one used on the imx8mp.
Enable the drivers necessary to facilitate capture on both of
these two platforms.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Testing on a imx6dl board with a QCA9377 SDIO Wifi chip shows that the
QCA9377 firmware takes more than three minutes to start getting loaded,
which is a very inconvenient behavior.
CONFIG_FW_LOADER_USER_HELPER and CONFIG_FW_LOADER_USER_HELPER_FALLBACK
were selected by commit 30fdd51be161 ("ARM: imx_v6_v7_defconfig:
add CONFIG_FW_LOADER_USER_HELPER")
By removing the CONFIG_FW_LOADER_USER_HELPER and
CONFIG_FW_LOADER_USER_HELPER_FALLBACK options the QCA9377 firmware is
loaded around 10 seconds after boot, which is the expected behavior.
The motivation for commit 30fdd51be161 ("ARM: imx_v6_v7_defconfig:
add CONFIG_FW_LOADER_USER_HELPER") was related to loading the SDMA
firmware,and at the time of that commit, the SDMA driver was loaded
as built-in.
Now that the SDMA driver is selected as a kernel module, its firmware can
be successfully loaded as well without the need of
CONFIG_FW_LOADER_USER_HELPER and CONFIG_FW_LOADER_USER_HELPER_FALLBACK.
Remove the selection of these two options.
Also, successfully tested the loading of the VPU firmware without
these options.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/defconfig
Renesas ARM defconfig updates for v6.5 (take two)
- Enable support for the Renesas MTU3a counter in the arm64 defconfig.
* tag 'renesas-arm-defconfig-for-v6.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable Renesas MTU3a counter config
Link: https://lore.kernel.org/r/cover.1686304611.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable MFD & counter related configs for Renesas MTU3a Counter as
it is populated on RZ/{G2L, LC, UL} and RZ/V2L SMARC EVKs.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230417100607.309068-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Enable Microchip SparX-5 (ARCH_SPARX5) with its MMC controller and
Realtek (ARCH_REALTEK) so their DTS will get built with defconfig and
maybe platforms could be booted from it.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230517143011.549319-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/defconfig
Renesas ARM defconfig updates for v6.5
- Refresh shmobile_defconfig for v6.4-rc1.
* tag 'renesas-arm-defconfig-for-v6.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: shmobile: defconfig: Refresh for v6.4-rc1
Link: https://lore.kernel.org/r/cover.1685094240.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Refresh the defconfig for Renesas ARM systems:
- Move CONFIG_PCI_RCAR_GEN2=y (moved in commit 81c362e798d41592
("PCI: Sort controller Kconfig entries by vendor")),
- Drop CONFIG_SERIAL_8250_PCI1XXXX=n (no longer auto-enabled since
commit 5d943b5d69c032de ("serial: 8250_pci1xxxx: Disable
SERIAL_8250_PCI1XXXX config by default")).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/420669d925bf4a8527c80dd294568df3b0556058.1683705341.git.geert+renesas@glider.be
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Nothing surprising in the SoC specific drivers, with the usual
updates:
- Added or improved SoC driver support for Tegra234, Exynos4121,
RK3588, as well as multiple Mediatek and Qualcomm chips
- SCMI firmware gains support for multiple SMC/HVC transport and
version 3.2 of the protocol
- Cleanups amd minor changes for the reset controller, memory
controller, firmware and sram drivers
- Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
amlogic and renesas SoC specific drivers"
* tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits)
dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
MAINTAINERS: add PHY-related files to Amlogic SoC file list
drivers: meson: secure-pwrc: always enable DMA domain
tee: optee: Use kmemdup() to replace kmalloc + memcpy
soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
dt-bindings: sram: qcom,imem: document qdu1000
soc: qcom: icc-bwmon: Fix MSM8998 count unit
dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
soc: qcom: socinfo: Add Soc ID for IPQ5300
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
soc: qcom: Fix a IS_ERR() vs NULL bug in probe
soc: qcom: socinfo: Add support for new fields in revision 19
soc: qcom: socinfo: Add support for new fields in revision 18
dt-bindings: firmware: scm: Add compatible for SDX75
soc: qcom: mdt_loader: Fix split image detection
dt-bindings: memory-controllers: drop unneeded quotes
soc: rockchip: dtpm: use C99 array init syntax
firmware: tegra: bpmp: Add support for DRAM MRQ GSCs
soc/tegra: pmc: Use devm_clk_notifier_register()
soc/tegra: pmc: Simplify debugfs initialization
...
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers
Memory controller drivers for v6.5
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
* tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-bindings: memory-controllers: drop unneeded quotes
memory: atmel-sdramc: remove the driver
memory: brcmstb_dpfe: fix testing array offset after use
memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
Link: https://lore.kernel.org/r/20230612175508.288775-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Driver does only clock request + enable for DDR clocks. DDR clocks are
enabled by bootloader and need to stay that way in Linux. To avoid having
these clocks disabled by clock subsystem in case there are no Linux
consumers for them the clocks were marked as critical in clock drivers
(in commit 68b3b6f1773d ("clk: at91: mark ddr clocks as critical")).
With this, there is no need to have a separate driver that only does
clock request + enable.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230516072405.2696225-1-claudiu.beznea@microchip.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new ARM SoC support from Arnd Bergmann:
"There are two new SoC families this time, and both appear fairly
similar: The Nuvoton MA35D1 and the STMicroelectronics STM32MP2 are
both dual-core Cortex-A35 based chips for the low-power industrial
embedded market, and they mark the first 64-bit product in a widely
used family of 32-bit Arm MCUs and SoCs.
The way into the kernel is completely different here: The team at ST
has a long history of working upstream with their STM32MP1 and other
SoCs, and they produced a complete port to arm64 together with the
initial announcement. Nuvoton also has multiple SoC product lines with
current or previous upstream support, but those are maintained by
third parties and are unrelated. The patch series from Nuvoton's Jacky
Huang had to go through many revisisions to get to this point and is
still missing a few drivers including the serial port for the moment.
The branch contains the devicetree files as well as all the code
changes, in order to have something that can be tested standalone"
* tag 'soc-newsoc-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
clk: nuvoton: Use clk_parent_data instead of string for parent clock
clk: nuvoton: Update all constant hex values to lowercase
clk: nuvoton: Add clk-ma35d1.h for driver extern functions
remoteproc: stm32: use correct format strings on 64-bit
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
Documentation/process: add soc maintainer handbook
reset: RESET_NUVOTON_MA35D1 should depend on ARCH_MA35
reset: Add Nuvoton ma35d1 reset driver support
clk: nuvoton: Add clock driver for ma35d1 clock controller
arm64: dts: nuvoton: Add initial ma35d1 device tree
dt-bindings: serial: Document ma35d1 uart controller
...
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
...
Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Allow a basic boot on STM32MP257 SoC.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC,
with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2 typeC,
SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Three packages exist for stm32mp25 dies. As ball-out is different between
them, this patch covers those differences by introducing dedicated pinctrl
dtsi files. Each dtsi pinctrl package file describes the package ball-out
through gpio-ranges.
Available packages are:
STM32MP25xAI: 18*18/FCBGA 172 ios
STM32MP25xAK: 14*14/FCBGA 144 ios
STM32MP25xAL: 10*10/TFBGA 144 ios
It includes also the common file used for pin groups definition.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like
SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and
LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add a dedicated ARCH_STM32 for STM32 SoCs config. First STM32 Armv8 SoC
family is the STM32MP25 which is composed of STM32MP251, STM32MP253,
STM32MP255, STM32MP257 SoCs.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Add initial device tree support for Nuvoton ma35d1 SoC, including
cpu, clock, reset, and serial controllers.
Add reference boards som-256m and iot-512m.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds support for the Nuvoton MA35 family SoCs which
are based on the Cortex-A35 Armv8-A 64-bit architecture.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add ARCH_NUVOTON configuration option for Nuvoton MA35 family SoCs.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for
each SoC vendor, following the same scheme that is used on arm64, mips
and riscv. This has been discussed for many years, but so far we never
did this as there was a plan to move the files out of the kernel
entirely, which has never happened.
The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along with
their device drivers.
- The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the
time.
- Amlogic C3 is a Cortex-A35 based smart IP camera chip
- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.
- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.
- Qualcomm SDX75 is the latest generation modem chip that is used as
a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
Xuantie C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those
included there are 39 new board files, but only five more 32-bit this
time, probably a new low:
- Marantec Maveo board based on dhcor imx6ull module
- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
- Epson Moverio BT-200 AR glasses based on TI OMAP4
- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
- ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than we had
in the recent releases:
- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.
- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234
- Qualcomm gains support for 6 reference boards on various members of
their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
of the various reference platforms for their new chips.
- Rockchips support for several newer boards: Indiedroid Nova
(rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
Fastrhino R66S/R68S (rk3568)
- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
Verdin family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements
along with
- continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names
- support for devicetree overlays on at91, bcm283x
- significant additions to existing SoC support on mediatek,
qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
STM32MP1
As usual, a lot more detail is available in the individual merge
commits"
* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
ARM: mvebu: fix unit address on armada-390-db flash
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
arm: dts: Enable device-tree overlay support for AT91 boards
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
ARM: dts: at91: use generic name for shutdown controller
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
...
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The unit address needs to be changed to match the reg property:
arch/arm/boot/dts/marvell/armada-390-db.dts:84.10-106.4: Warning (spi_bus_reg): /soc/spi@10680/flash@1: SPI bus unit address format error, expected "0"
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into soc/dt
ARM: dts: Move .dts files to vendor sub-directories
The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.
* tag 'arm-dts-mv-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
Link: https://lore.kernel.org/r/20230621185025.GA3197738-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.
There's no change to dtbs_install as the flat structure is maintained on
install.
The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
company (e.g. gemini, nspire)
The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
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In preparation to move Arm .dts files into sub-directories grouped
by vendor/family, the current flat tree of DTBs generated by
dtbs_install needs to be maintained. Moving the installed DTBs to
sub-directories would break various consumers using 'make dtbs_install'.
This is a NOP until sub-directories are introduced.
Signed-off-by: Rob Herring <robh@kernel.org>
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Comparing .dts files to built .dtb files yielded a few .dts files which
are never built. Add them to the build.
Signed-off-by: Rob Herring <robh@kernel.org>
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In preparation to move .dts files into subdirectories, include
sunxi-h3-h5-emlid-neutis.dtsi from the current directory rather than the
symlinked include path.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
AT91 DT for 6.5 #2
It contains:
- generic names for shutdown controller nodes
- enablement of DT overlay support for some AT91 boards
- fix reset and SPI CS for lan966x-kontron-kswitch-d10-mmt based boards
- addition of PHY interrupts for lan966x-kontron-kswitch-d10-mmt-8g
board
* tag 'at91-dt-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
ARM: dts: at91: use generic name for shutdown controller
Link: https://lore.kernel.org/r/20230621093853.1575312-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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With interrupt handling fixed in the MaxLinear PHY driver, see commit
97a89ed101bb ("net: phy: mxl-gpy: disable interrupts on GPY215 by
default"), we can finally add the correct interrupt description to the
device tree.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230616-feature-d10-dt-cleanups-v1-3-50dd0452b8fe@kernel.org
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The pinctrl node was missing which change the pin mux to GPIO mode.
Add it so we don't have to rely on the bootloader to set the correct
mode.
Fixes: 79d83b3a458e ("ARM: dts: lan966x: add basic Kontron KSwitch D10 support")
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230616-feature-d10-dt-cleanups-v1-2-50dd0452b8fe@kernel.org
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The pinctrl node was missing which change the pin mux to GPIO mode. Add
it.
Fixes: 79d83b3a458e ("ARM: dts: lan966x: add basic Kontron KSwitch D10 support")
Signed-off-by: Michael Walle <mwalle@kernel.org>
[claudiu.beznea: moved pinctrl-* bindings after compatible]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230616-feature-d10-dt-cleanups-v1-1-50dd0452b8fe@kernel.org
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Add the '-@' DTC option for AT91 boards that have device-tree overlays.
This option populates the '__symbols__' node that contains all the
necessary symbols for supporting device-tree overlays (from bootloader)
on these devices.
This change increases the size of the resulting DTB with ~30%-40%. Below
are the measurements performed v6.4-rc6:
at91-sam9x60_curiosity.dtb 28499 -> 36641 bytes
at91-sam9x60ek.dtb 30867 -> 39609 bytes
at91-sama5d27_som1_ek.dtb 26086 -> 34166 bytes
at91-sama5d27_wlsom1_ek.dtb 26045 -> 33184 bytes
at91-sama5d2_icp.dtb 27521 -> 36155 bytes
at91-sama5d2_ptc_ek.dtb 23237 -> 29612 bytes
at91-sama5d2_xplained.dtb 27262 -> 35326 bytes
at91-sama5d3_eds.dtb 27924 -> 39939 bytes
at91-sama5d3_xplained.dtb 28400 -> 40650 bytes
at91-sama5d4_xplained.dtb 26456 -> 36107 bytes
at91-sama7g5ek.dtb 29212 -> 37289 bytes
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[claudiu.beznea: s/arm: dts/ARM: dts: at91/ in commit title]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230616152932.1484154-1-cristian.birsan@microchip.com
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Use poweroff generic name for shdwc node to cope with device tree
specifications.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20230616101646.879480-2-claudiu.beznea@microchip.com
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https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.5 Part 2
T-Head:
Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head
1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a,
for which a minimal dts is added.
Misc:
Re-sort the dts Makefile to be in alphanumerical order by directory.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
dt-bindings: riscv: Add T-HEAD TH1520 board compatibles
dt-bindings: timer: Add T-HEAD TH1520 clint
dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC
Link: https://lore.kernel.org/r/20230620-fidelity-variety-60b47c889e31@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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New additions to the list have tried to respect alphanumeric ordering,
but the thing was out of order to start with. Sort it.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Jisheng Zhang <jszhang@kernel.org> says:
Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
module which is powered by T-HEAD's TH1520 SoC. Add minimal device
tree files for the core module and the development board.
Support basic uart/gpio/dmac drivers, so supports booting to a basic
shell.
This also pulls in -rc2, because of some maintainers re-jigging that
went on in the interim in commit 80e62bc8487b ("MAINTAINERS: re-sort
all entries and fields").
Link: https://lore.kernel.org/r/20230617161529.2092-1-jszhang@kernel.org
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Enable T-HEAD SoC config in defconfig to allow the default
upstream kernel to boot on Sipeed Lichee Pi 4A board.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
module which is powered by T-HEAD's TH1520 SoC. Add minimal device
tree files for the core module and the development board.
Support basic uart/gpio/dmac drivers, so supports booting to a basic
shell.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Add initial device tree for the TH1520 RISC-V SoC by T-HEAD.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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The first SoC in the T-HEAD series is TH1520, containing quad T-HEAD
C910 cores.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM64-based SoCs changes for 6.5,
please pull the following:
- Krzysztof fixes the BCMBCA DTS files to have correct cache properties
- Tony unifies the pinctrl-single pin group(s) for the Stingray SoCs
- Aurelien enables the BCM283x DTS files to be built with relocation
information to make them usable with DT overlays
* tag 'arm-soc/for-6.5/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Enable device-tree overlay support for RPi devices
arm64: dts: broadcom: Unify pinctrl-single pin group nodes for stingray
arm64: dts: broadcom: add missing cache properties
Link: https://lore.kernel.org/r/20230619134920.3384844-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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