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* ACPI: SPCR: Add support for NVIDIA 16550-compatible port subtypeJeff Brasen2022-04-131-0/+1
| | | | | | | | | Add support for the NVIDIA specific 16550 subtype to SPCR table parsing routine. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: SPCR: check if table->serial_port.access_width is too wideMark Langsdorf2022-01-111-2/+7
| | | | | | | | | | | | | | | If table->serial_port.access_width is more than 29, it causes undefined behavior when ACPI_ACCESS_BIT_WIDTH shifts it to (1 << ((size) + 2)): [ 0.000000] UBSAN: Undefined behaviour in drivers/acpi/spcr.c:114:11 [ 0.000000] shift exponent 102 is too large for 32-bit type 'int' Use the new ACPI_ACCESS_ defines to test that serial_port.access_width is less than 30 and set it to 6 if it is not. Signed-off-by: Mark Langsdorf <mlangsdo@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: SPCR: Add support for the new 16550-compatible Serial Port SubtypeMarcin Wojtas2021-08-161-0/+1
| | | | | | | | | | | | | The Microsoft Debug Port Table 2 (DBG2) specification revision May 31, 2017 added definition of the 16550-compatible Serial Port Subtype with parameters defined in Generic Address Structure (GAS) [1] Add its support in the SPCR table parsing routine. [1] https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-07-091-2/+2
| | | | | | | | | | Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. Link: https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through # [1] Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ACPI: Fix comment typosBjorn Helgaas2019-03-261-1/+1
| | | | | | | Fix some misspellings in comments. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: SPCR: Consider baud rate 0 as preconfigured stateAndy Shevchenko2018-11-261-0/+11
| | | | | | | | | | | Since SPCR 1.04 [1] the baud rate of 0 means a preconfigured state of UART. Assume firmware or bootloader configures console correctly. [1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: SPCR: Mark expected switch fall-through in acpi_parse_spcrGustavo A. R. Silva2018-02-121-0/+1
| | | | | | | | | In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1465078 Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: SPCR: Make SPCR available to x86Prarit Bhargava2018-02-071-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | SPCR is currently only enabled or ARM64 and x86 can use SPCR to setup an early console. General fixes include updating Documentation & Kconfig (for x86), updating comments, and changing parse_spcr() to acpi_parse_spcr(), and earlycon_init_is_deferred to earlycon_acpi_spcr_enable to be more descriptive. On x86, many systems have a valid SPCR table but the table version is not 2 so the table version check must be a warning. On ARM64 when the kernel parameter earlycon is used both the early console and console are enabled. On x86, only the earlycon should be enabled by by default. Modify acpi_parse_spcr() to allow options for initializing the early console and console separately. Signed-off-by: Prarit Bhargava <prarit@redhat.com> Acked-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Mark Salter <msalter@redhat.com> Tested-by: Mark Salter <msalter@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
*---. Merge branches 'acpi-video', 'acpi-battery', 'acpi-spcr' and 'acpi-misc'Rafael J. Wysocki2017-09-031-6/+21
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * acpi-video: ACPI / video: Add force_none quirk for Dell OptiPlex 9020M * acpi-battery: ACPI: make device_attribute const * acpi-spcr: ACPI: SPCR: work around clock issue on xgene UART ACPI: SPCR: extend XGENE 8250 workaround to m400 * acpi-misc: ACPI / dock: constify attribute_group structure MAINTAINERS: Add Tony and Boris as ACPI/APEI reviewers ACPI / lpat: Fix typos in comments and kerneldoc style MAINTAINERS: device property: ACPI: add fwnode.h
| | | * ACPI: SPCR: work around clock issue on xgene UARTGraeme Gregory2017-08-161-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xgene v1/v2 8250 UARTs don't run at the standard clock rate expected by the driver and there is no information on clocking available from the SPCR table. As there has been no progress on relevant vendors updating DBG2/SPCR specifications to fix this work around this using the previous xgene quirk handling to avoid setting a baud rate and therefore using the UART as configured by firmware. Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org> Tested-by: Mark Salter <msalter@redhat.com> Reviewed-by: Mark Salter <msalter@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
| | | * ACPI: SPCR: extend XGENE 8250 workaround to m400Graeme Gregory2017-08-151-3/+10
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xgene v1/v2 chips are also used on moonshot cartridges that have different table headers to the ones on Mustang. Extend the quirk so it also recognises the Moonshot M400 variant too. Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org> Tested-by: Mark Salter <msalter@redhat.com> Reviewed-by: Mark Salter <msalter@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | | Merge branch 'acpica'Rafael J. Wysocki2017-09-031-4/+5
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * acpica: (32 commits) ACPICA: Update version to 20170728 ACPICA: Revert "Update resource descriptor handling" ACPICA: Resources: Allow _DMA method in walk resources ACPICA: Ensure all instances of AE_AML_INTERNAL have error messages ACPICA: Implement deferred resolution of reference package elements ACPICA: Debugger: Improve support for Alias objects ACPICA: Interpreter: Update handling for Alias operator ACPICA: EFI/EDK2: Cleanup to enable /WX for MSVC builds ACPICA: acpidump: Add DSDT/FACS instance support for Linux and EFI ACPICA: CLib: Add short multiply/shift support ACPICA: EFI/EDK2: Sort acpi.h inclusion order ACPICA: Add a comment, no functional change ACPICA: Namespace: Update/fix an error message ACPICA: iASL: Add support for the SDEI table ACPICA: Divergences: reduce access size definitions ACPICA: Update version to 20170629 ACPICA: Update resource descriptor handling ACPICA: iasl: Update to IORT SMMUv3 disassembling ACPICA: Disassembler: skip parsing of incorrect external declarations ACPICA: iASL: Ensure that the target node is valid in acpi_ex_create_alias ...
| * | ACPICA: Divergences: reduce access size definitionsLv Zheng2017-08-031-4/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPICA commit cf27b3c98883d2a15d932016792fcb8272ace96d The following commit introduces definition of access width to ACPICA. Commit: 2bece49394872d36bbc5767fd643deac05920c55 Subject: ACPI: SPCR: Use access width to determine mmio usage Actually the access bit width can be calculated via access width. It would be better to define a macro calculating bit width rather than defining fixed values. This patch thus cleans up the definitions to reduce divergences. Link: https://github.com/acpica/acpica/commit/cf27b3c9 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* / tty: pl011: fix initialization order of QDF2400 E44Timur Tabi2017-07-301-2/+34
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The work-around for Qualcomm Technologies QDF2400 Erratum 44 hinges on a global variable defined in the pl011 driver. The ACPI SPCR parsing code determines whether the work-around is needed, and if so, it changes the console name from "pl011" to "qdf2400_e44". The expectation is that the pl011 driver will implement the work-around when it sees the console name. The global variable qdf2400_e44_present is set when that happens. The problem is that work-around needs to be enabled when the pl011 driver probes, not when the console name is queried. However, sbsa_probe() is called before pl011_console_match(). The work-around appeared to work previously because the default console on QDF2400 platforms was always ttyAMA1. The first time sbsa_probe() is called (for ttyAMA0), qdf2400_e44_present is still false. Then pl011_console_match() is called, and it sets qdf2400_e44_present to true. All subsequent calls to sbsa_probe() enable the work-around. The solution is to move the global variable into spcr.c and let the pl011 driver query it during probe time. This works because all QDF2400 platforms require SPCR, so parse_spcr() will always be called. pl011_console_match still checks for the "qdf2400_e44" console name, but it doesn't do anything else special. Fixes: 5a0722b898f8 ("tty: pl011: use "qdf2400_e44" as the earlycon name for QDF2400 E44") Tested-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ACPI: SPCR: Workaround for APM X-Gene 8250 UART 32-alignment errataLoc Ho2017-07-041-0/+22
| | | | | | | | | | | | | APM X-Gene verion 1 and 2 have an 8250 UART with its register aligned to 32-bit. In addition, the latest released BIOS encodes the access field as 8-bit access instead 32-bit access. This causes no console with ACPI boot as the console will not match X-Gene UART port due to the lack of mmio32 option. Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: SPCR: Use access width to determine mmio usageLoc Ho2017-07-041-2/+16
| | | | | | | | | | | | | | The current SPCR code does not check the access width of the MMIO, and uses a default of 8bit register accesses. This prevents devices that only do 16 or 32bit register accesses from working. By simply checking this field and setting the MMIO string appropriately, this issue can be corrected. To prevent any legacy issues, the code will default to 8bit accesses if the value is anything but 16 or 32. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* tty: acpi/spcr: QDF2400 E44 checks for wrong OEM revisionTimur Tabi2017-03-141-1/+1
| | | | | | | | | | | For Qualcomm Technologies QDF2400 SOCs that are affected by erratum E44, the ACPI oem_revision field is actually set to 1, not 0. Fixes: d8a4995bcea1 ("tty: pl011: Work around QDF2400 E44 stuck BUSY bit") Tested-by: Manoj Iyer <manoj.iyer@canonical.com> Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* scripts/spelling.txt: add "intialization" pattern and fix typo instancesMasahiro Yamada2017-02-271-1/+1
| | | | | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: intialization||initialization The "inintialization" in drivers/acpi/spcr.c is a different pattern but I fixed it as well in this commit. Link: http://lkml.kernel.org/r/1481573103-11329-16-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* tty: pl011: Work around QDF2400 E44 stuck BUSY bitChristopher Covington2017-02-151-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1 and 2400v1 SoCs.Checking that the Transmit FIFO Empty (TXFE) bit is 0, instead of checking that the BUSY bit is 1, works around the issue. To facilitate this substitution of flags and values, introduce vendor-specific inversion of Feature Register bits when UART AMBA Port (UAP) data is available. For the earlycon case, prior to UAP availability, implement alternative putc and early_write functions. Similar to what how ARMv8 ACPI PCI quirks are detected during MCFG parsing, check the OEM fields of the Serial Port Console Redirection (SPCR) ACPI table to determine if the current platform is known to be affected by the erratum. Signed-off-by: Christopher Covington <cov@codeaurora.org> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Timur Tabi <timur@codeaurora.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ACPI / osl: Remove acpi_get_table_with_size()/early_acpi_os_unmap_memory() usersLv Zheng2016-12-211-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the users of the deprectated APIs: acpi_get_table_with_size() early_acpi_os_unmap_memory() The following APIs should be used instead of: acpi_get_table() acpi_put_table() The deprecated APIs are invented to be a replacement of acpi_get_table() during the early stage so that the early mapped pointer will not be stored in ACPICA core and thus the late stage acpi_get_table() won't return a wrong pointer. The mapping size is returned just because it is required by early_acpi_os_unmap_memory() to unmap the pointer during early stage. But as the mapping size equals to the acpi_table_header.length (see acpi_tb_init_table_descriptor() and acpi_tb_validate_table()), when such a convenient result is returned, driver code will start to use it instead of accessing acpi_table_header to obtain the length. Thus this patch cleans up the drivers by replacing returned table size with acpi_table_header.length, and should be a no-op. Reported-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* ACPI: parse SPCR and enable matching consoleAleksey Makarov2016-09-281-0/+111
'ARM Server Base Boot Requiremets' [1] mentions SPCR (Serial Port Console Redirection Table) [2] as a mandatory ACPI table that specifies the configuration of serial console. Defer initialization of DT earlycon until ACPI/DT decision is made. Parse the ACPI SPCR table, setup earlycon if required, enable specified console. Thanks to Peter Hurley for explaining how this should work. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044a/index.html [2] https://msdn.microsoft.com/en-us/library/windows/hardware/dn639132(v=vs.85).aspx Signed-off-by: Aleksey Makarov <aleksey.makarov@linaro.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Tested-by: Kefeng Wang <wangkefeng.wang@huawei.com> Tested-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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