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* Merge tag 'arm-soc-drivers-5.11' of ↵Linus Torvalds2020-12-161-11/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs" * tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits) soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS firmware: xilinx: Properly align function parameter firmware: xilinx: Add a blank line after function declaration firmware: xilinx: Remove additional newline firmware: xilinx: Fix kernel-doc warnings firmware: xlnx-zynqmp: fix compilation warning soc: xilinx: vcu: add missing register NUM_CORE soc: xilinx: vcu: use vcu-settings syscon registers dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding soc: xilinx: vcu: drop useless success message clk: samsung: mark PM functions as __maybe_unused soc: samsung: exynos-chipid: initialize later - with arch_initcall soc: samsung: exynos-chipid: order list of SoCs by name memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: tegra30: Support interconnect framework memory: tegra20: Support hardware versioning and clean up OPP table initialization dt-bindings: memory: tegra20-emc: Document opp-supported-hw property soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe() reset-controller: ti: force the write operation when assert or deassert ...
| * bus: ti-sysc: Implement GPMC debug quirk to drop platform dataTony Lindgren2020-11-161-0/+10
| | | | | | | | | | | | | | | | We need to enable no-reset-on-init quirk for GPMC if the config option for CONFIG_OMAP_GPMC_DEBUG is set. Otherwise the GPMC driver code is unable to show the bootloader configured timings. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * bus: ti-sysc: Support modules without control registersTony Lindgren2020-11-161-0/+7
| | | | | | | | | | | | | | | | Some modules like MPU have a powerdomain and functional clock but not necessarily any control registers. Let's allow configuring interconnect target modules with no control registers. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * bus: ti-sysc: Assert reset only after disabling clocksTony Lindgren2020-11-161-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | The rstctrl reset must be asserted after gating the module clock as described in the TRM at least for IVA. Otherwise the rstctrl reset done with module clock enabled can hang the system. Note that this issue is has been only seen with related IVA changes that we do not currently have merged. So probably no need to apply this patch as a fix. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: suppress err msg for timers used as clockevent/sourceGrygorii Strashko2020-11-191-1/+1
|/ | | | | | | | | | | | | | | GP Timers used as clockevent/source are not available for ti-sysc bus and handled by Kernel timekeeping core. Now ti-sysc produces error message every time such timer is detected: "ti-sysc: probe of 48040000.target-module failed with error -16" Such messages are not necessary, so suppress them by returning -ENXIO instead of -EBUSY. Fixes: 6cfcd5563b4f ("clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Fix bogus resetdone warning on enable for cpswTony Lindgren2020-10-261-0/+3
| | | | | | | | | | | | | | | | | Bail out early from sysc_wait_softreset() just like we do in sysc_reset() if there's no sysstatus srst_shift to fix a bogus resetdone warning on enable as suggested by Grygorii Strashko <grygorii.strashko@ti.com>. We do not currently handle resets for modules that need writing to the sysstatus register. If we at some point add that, we also need to add SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low when reset is done as described in the am335x TRM "Table 14-202 SOFT_RESET Register Field Descriptions" Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Fix reset status check for modules with quirksTony Lindgren2020-10-261-9/+15
| | | | | | | | | | | | | | | | | | | Commit d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") started showing a "OCP softreset timed out" warning on enable if the interconnect target module is not out of reset. This caused the warning to be often triggered for i2c and hdq while the devices are working properly. Turns out that some interconnect target modules seem to have an unusable reset status bits unless the module specific reset quirks are activated. Let's just skip the reset status check for those modules as we only want to activate the reset quirks when doing a reset, and not on enable. This way we don't see the bogus "OCP softreset timed out" warnings during boot. Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") Signed-off-by: Tony Lindgren <tony@atomide.com>
* treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-231-1/+1
| | | | | | | | | | Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
* Merge tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-08-031-2/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC DT updates from Arnd Bergmann: "As usual, there are many patches addressing minor issues in existing DTS files, such as DTC warnings, or adding support for additional peripherals. There are three added SoCs in existing product families: - Amazon: Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs, otherwise known as AL73400 or first-generation Graviton, and following the already supported Cortex-A1`5 and Cortex-A57 based Alpine chips. This one is added together with the official Evaluation platform. - Qualcomm: The Snapdragon SDM630 platform is a family of mid-range mobile phone chips from 2017 based on Cortex-A53 or Kryo 260 CPUs. A total of five end-user products are added based on these, all Android phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra. - Renesas: RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G family, and apparently closely related to the RZ/G2N and RZ/G2M models we already support but has a faster GPU and additional on-chip peripherals. It is added along with the HopeRun HiHope RZ/G2H development board A small number of new boards for already supported SoCs also debut: - Allwinner sunxi: Only one new machine, revision v1.2 of the Pine64 PinePhone (non-Android) smartphone, containing minor changes compared to earlier versions. - Amlogic Meson: WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box - Aspeed: EthanolX is AMD's EPYC data center rerence platform, using an ASpeed AST2600 baseboard management controller. - Mediatek: Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook based on the MT8183 (Helio P60t) SoC. - Nvidia Tegra: ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android tablets from around 2012 using Tegra 3 and Tegra 2, respectively. Thanks to PostmarketOS, these can now run mainline kernels and become useful again. The Jetson Xavier NX Developer Kit uses a SoM and carrier board for the Tegra194, their latest 64-bit chip based on Carmel CPU cores and Volta graphics. - NXP i.MX: Five new boards based on the 32-bit i.MX6 series are added: The MYiR MYS-6ULX single-board computer, and four different models of industrial computers from Protonic. - Qualcomm: MikroTik RouterBoard 3011 is a rackmounted router based on the 32-bit IPQ8064 networking SoC Three older phones get added, the Snapdragon 808 (msm8992) based Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running Windows Phone, and the Snapdragon 810 (msm8994) based Sony Xperia Z5. - Renesas: In addition to the HiHope RZ/G2H board mentioned above, we gain support for board versions 3.0 and 4.0 of the earlier RZ/G2M and RZ/G2N reference boards. Beacon EmbeddedWorks adds another SoM+Carrier development board for RZ/G2M. - Rockchips: Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it is based on, using the high-end 32-bit rk3288 SoC. Notable updates to existing platforms are usually for added on-chip peripherals, including: - ASpeed AST2xxx (various) - Allwinner (cpufreq, thermal, Pinephone touchscreen) - Amlogic Meson (audio, gpu dvdfs, board updates) - Arm Versatile - Broadcom (board updates for switch ports, Raspberry pi clock updates) - Hisilicon (various) - Intel/Altera SoCFPGA (various) - Marvell Armada 7xxx/8xxx (smmu) - Marvell MMP (GPU on mmp2/mmp3) - Mediatek mt8183 (USB, pericfg) - NXP Layerscape (VPU, thermal, DSPI) - NXP i.MX (VPU, bindings, board updates) - Nvidia Tegra194 (GPU) - Qualcomm (GPU, Interconnect, ...) - Renesas R-Car (SPI, IPMMU, board updates) - STMicroelectronics STM32 (various) - Samsung Exynos (various) - Socionext Uniphier (updates to serial, and pcie) - TI K3 (serdes, usb3, audio, sd, chipid) - TI OMAP (IPU/DSP remoteproc changes, dropping platform data)" * tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (605 commits) arm64: dts: meson: odroid-n2: add jack audio output support arm64: dts: meson: odroid-n2: enable audio loopback ARM: dts: berlin: Align L2 cache-controller nodename with dtschema arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree arm64: dts: qcom: msm8992: Add RPMCC node arm64: dts: qcom: msm8992: Add PSCI support. arm64: dts: qcom: msm8992: Add PMU node arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device arm64: dts: qcom: msm8992: Add a SCM node arm64: dts: qcom: msm8992: Add a proper CPU map arm64: dts: qcom: bullhead: Move UART pinctrl to SoC arm64: dts: qcom: bullhead: Add qcom,msm-id arm64: dts: qcom: msm8992: Fix SDHCI1 arm64: dts: qcom: msm8992: Modernize the DTS style arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW) arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead. arm64: dts: qcom: msm8994: Add support for SMD RPM arm64: dts: qcom: msm8992: Add a label to rpm-requests ...
| * bus: ti-sysc: Add missing quirk flags for usb_host_hsTony Lindgren2020-07-131-2/+4
| | | | | | | | | | | | | | | | | | Similar to what we have for the legacy platform data, we need to configure SWSUP_SIDLE and SWSUP_MSTANDBY quirks for usb_host_hs. These are needed to drop the legacy platform data for usb_host_hs. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge tag 'timers-urgent-2020-07-25' of ↵Linus Torvalds2020-07-251-0/+22
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into master Pull timer fix from Ingo Molnar: "Fix a suspend/resume regression (crash) on TI AM3/AM4 SoC's" * tag 'timers-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4
| * | clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4Tony Lindgren2020-07-211-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Carlos Hernandez <ceh@ti.com> reported that we now have a suspend and resume regresssion on am3 and am4 compared to the earlier kernels. While suspend and resume works with v5.8-rc3, we now get errors with rtcwake: pm33xx pm33xx: PM: Could not transition all powerdomains to target state ... rtcwake: write error This is because we now fail to idle the system timer clocks that the idle code checks and the error gets propagated to the rtcwake. Turns out there are several issues that need to be fixed: 1. Ignore no-idle and no-reset configured timers for the ti-sysc interconnect target driver as otherwise it will keep the system timer clocks enabled 2. Toggle the system timer functional clock for suspend for am3 and am4 (but not for clocksource on am3) 3. Only reconfigure type1 timers in dmtimer_systimer_disable() 4. Use of_machine_is_compatible() instead of of_device_is_compatible() for checking the SoC type Fixes: 52762fbd1c47 ("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support") Reported-by: Carlos Hernandez <ceh@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Carlos Hernandez <ceh@ti.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200713162601.6829-1-tony@atomide.com
| * | Merge tag 'omap-for-v5.8/fixes-merge-window-signed' of ↵Arnd Bergmann2020-06-281-24/+74
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes Fixes for omaps for v5.8 The recent display subsystem (DSS) related platform data changes caused display related regressions for suspend and resume. Looks like I only tested suspend and resume before dropping the legacy platform data, and forgot to test it after dropping it. Turns out the main issue was that we no longer have platform code calling pm_runtime_suspend for DSS like we did for the legacy platform data case, and that fix is still being discussed on the dri-devel list and will get merged separately. The DSS related testing exposed a pile other other display related issues that also need fixing though: - Fix ti-sysc optional clock handling and reset status checks for devices that reset automatically in idle like DSS - Ignore ti-sysc clockactivity bit unless separately requested to avoid unexpected performance issues - Init ti-sysc framedonetv_irq to true and disable for am4 - Avoid duplicate DSS reset for legacy mode with dts data - Remove LCD timings for am4 as they cause warnings now that we're using generic panels Then there is a pile of other fixes not related to the DSS: - Fix omap_prm reset deassert as we still have drivers setting the pm_runtime_irq_safe() flag - Flush posted write for ti-sysc enable and disable - Fix droid4 spi related errors with spi flags - Fix am335x USB range and a typo for softreset - Fix dra7 timer nodes for clocks for IPU and DSP - Drop duplicate mailboxes after mismerge for dra7 * tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: Revert "bus: ti-sysc: Increase max softreset wait" ARM: dts: am437x-epos-evm: remove lcd timings ARM: dts: am437x-gp-evm: remove lcd timings ARM: dts: am437x-sk-evm: remove lcd timings ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag ARM: dts: Fix am33xx.dtsi USB ranges length bus: ti-sysc: Increase max softreset wait ARM: OMAP2+: Fix legacy mode dss_reset bus: ti-sysc: Fix uninitialized framedonetv_irq bus: ti-sysc: Ignore clockactivity unless specified as a quirk bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit ARM: dts: omap4-droid4: Fix spi configuration and increase rate bus: ti-sysc: Flush posted write on enable and disable soc: ti: omap-prm: use atomic iopoll instead of sleeping one Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | bus: ti-sysc: Do not disable on suspend for no-idleTony Lindgren2020-07-021-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | If we have "ti,no-idle" specified for a module we must not disable the the module on suspend to keep things backwards compatible. Fixes: 386cb76681ca ("bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-init") Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirkTony Lindgren2020-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_DEBUG_ATOMIC_SLEEP enabled we can see the following with RTC probe: BUG: sleeping function called from invalid context at drivers/bus/ti-sysc.c:1736 ... (sysc_quirk_rtc) from [<c060d01c>] (sysc_write_sysconfig+0x1c/0x60) (sysc_write_sysconfig) from [<c060d9f4>] (sysc_enable_module+0x11c/0x274) (sysc_enable_module) from [<c060f37c>] (sysc_probe+0xe9c/0x1380) (sysc_probe) from [<c06e9384>] (platform_drv_probe+0x48/0x98) Fixes: e8639e1c986a ("bus: ti-sysc: Handle module unlock quirk needed for some RTC") Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | bus: ti-sysc: Fix wakeirq sleeping function called from invalid contextTony Lindgren2020-07-021-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_DEBUG_ATOMIC_SLEEP enabled we can see the following with wakeirqs and serial console idled: BUG: sleeping function called from invalid context at drivers/bus/ti-sysc.c:242 ... (sysc_wait_softreset) from [<c0606894>] (sysc_enable_module+0x48/0x274) (sysc_enable_module) from [<c0606c5c>] (sysc_runtime_resume+0x19c/0x1d8) (sysc_runtime_resume) from [<c0606cf0>] (sysc_child_runtime_resume+0x58/0x84) (sysc_child_runtime_resume) from [<c06eb7bc>] (__rpm_callback+0x30/0x12c) (__rpm_callback) from [<c06eb8d8>] (rpm_callback+0x20/0x80) (rpm_callback) from [<c06eb434>] (rpm_resume+0x638/0x7fc) (rpm_resume) from [<c06eb658>] (__pm_runtime_resume+0x60/0x9c) (__pm_runtime_resume) from [<c06edc08>] (handle_threaded_wake_irq+0x24/0x60) (handle_threaded_wake_irq) from [<c01befec>] (irq_thread_fn+0x1c/0x78) (irq_thread_fn) from [<c01bf30c>] (irq_thread+0x140/0x26c) We have __pm_runtime_resume() call the sysc_runtime_resume() with spinlock held and interrupts disabled. Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | Merge tag 'v5.8-rc1' into fixesTony Lindgren2020-06-161-7/+18
|\| | | |/ |/| | | Linux 5.8-rc1
| * bus: ti-sysc: Timers no longer need legacy quirk handlingTony Lindgren2020-05-191-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As timers no longer need legacy quirk handling, let's move them to the CONFIG_DEBUG section to make it easier to see which drivers still need more work. Let's also add detection for few more older timer revisions while at it as that makes CONFIG_DEBUG output easier to read with proper names. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * bus: ti-sysc: Ignore timer12 on secure omap3Tony Lindgren2020-05-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some early omap3 boards use timer12 for system timer, but for secure SoCs like on n900 it's not accessible. Likely we will be configuring unavailable devices for other SoCs too based on runtime SoC detection, so let's use a switch to start with. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Revert "bus: ti-sysc: Increase max softreset wait"Tony Lindgren2020-06-101-1/+1
| | | | | | | | | | | | | | | | | | This reverts commit 636338d7968e47c7f2e0b772a2a825ad932883fb. This patch is not a proper fixes the i2c2 timeouts are still happening in some cases. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Increase max softreset waitTony Lindgren2020-06-031-1/+1
| | | | | | | | | | | | | | | | | | Otherwise we can get "OCP softreset timed out" warnings occasionally at least for i2c2 on omap4 now that we check the OCP softreset completed bit on enable. Reported-by: Merlijn Wajer <merlijn@wizzup.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Fix uninitialized framedonetv_irqTony Lindgren2020-06-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | We are currently only setting the framedonetv_irq disabled for the SoCs that don't have it. But we are never setting it enabled for the SoCs that have it. Let's initialized it to true by default. Fixes: 7324a7a0d5e2 ("bus: ti-sysc: Implement display subsystem reset quirk") Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Ignore clockactivity unless specified as a quirkTony Lindgren2020-06-031-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | We must ignore the clockactivity bit for most modules and not set it unless specified for the module with SYSC_QUIRK_USE_CLOCKACT. Otherwise the interface clock can be automatically gated constantly causing unexpected performance issues. Fixes: ae9ae12e9daa ("bus: ti-sysc: Handle clockactivity for enable and disable") Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Use optional clocks on for enable and wait for softreset bitTony Lindgren2020-06-031-20/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some modules reset automatically when idled, and when re-enabled, we must wait for the automatic OCP softreset to complete. And if optional clocks are configured, we need to keep the clocks on while waiting for the reset to complete. Let's fix the issue by moving the OCP softreset code to a separate function sysc_wait_softreset(), and call it also from sysc_enable_module() with the optional clocks enabled. This is based on what we're already doing for legacy platform data booting in _enable_sysc(). Fixes: 7324a7a0d5e2 ("bus: ti-sysc: Implement display subsystem reset quirk") Reported-by: Faiz Abbas <faiz_abbas@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Flush posted write on enable and disableTony Lindgren2020-05-301-0/+6
|/ | | | | | | | | | | | | | | | | | | | | | | Looks like we're missing flush of posted write after module enable and disable. I've seen occasional errors accessing various modules, and it is suspected that the lack of posted writes can also cause random reboots. The errors we can see are similar to the one below from spi for example: 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Read): Data Access in User mode during Functional access ... mcspi_wait_for_reg_bit omap2_mcspi_transfer_one spi_transfer_one_message ... We also want to also flush posted write for disable. The clkctrl clock disable happens after module disable, and we don't want to have the module potentially stay active while we're trying to disable the clock. Fixes: d59b60564cbf ("bus: ti-sysc: Add generic enable/disable functions") Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge branch 'fix-lcdc-quirk' into omap-for-v5.7/ti-syscTony Lindgren2020-03-101-1/+2
|\
| * bus: ti-sysc: Fix quirk flags for lcdc on am335xTony Lindgren2020-03-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit adb72394e2ab ("ARM: OMAP2+: Drop legacy platform data for am3 lcdc") dropped legacy platform data but we never added the quirks for SWSUP_SIDLE and SWSUP_MSTANDBY for lcdc for ti-sysc driver. This breaks suspend/resume. Let's fix the issue by enabling the same quirks for ti-sysc driver as we had earlier with platform data. Fixes: adb72394e2ab ("ARM: OMAP2+: Drop legacy platform data for am3 lcdc") Fixes: 23731eac9848 ("bus: ti-sysc: Detect devices on am335x when DEBUG is enabled") Reported-by: Keerthy <j-keerthy@ti.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Add support for PRUSS SYSC typeSuman Anna2020-03-041-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PRU-ICSS present on AM33xx/AM43xx/AM57xx has a very unique SYSCFG register. The register follows the OMAP4-style SYSC_TYPE3 for Master Standby and Slave Idle, but also has two additional unique fields - STANDBY_INIT and SUB_MWAIT. The STANDBY_INIT is a control bit that is used to initiate a Standby sequence (when set) and trigger a MStandby request to the SoC's PRCM module. This same bit is also used to enable the OCP master ports (when cleared) to allow the PRU cores to access any peripherals or memory beyond the PRU subsystem. The SUB_MWAIT is a ready status field for the external access. Add support for this SYSC type. The STANDBY_INIT has to be set during suspend, without which it results in a hang in the resume sequence on AM33xx/AM43xx boards and requires a board reset to come out of the hang. Any PRU applications requiring external access are supposed to clear the STANDBY_INIT bit. Note that the PRUSS context is lost during a suspend sequence because the PRUSS module is reset and/or disabled. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> [tony@atomide.com: updated quirk define number and to use -ENODEV] Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Detect EDMA and set quirk flags for tptcTony Lindgren2020-03-041-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to probe EDMA with ti-sysc interconnect target module and with device tree data, we need to properly detect EDMA and set the flags for SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY for tptc. We have these flags currently set for am4 and dra7, but not for am335x. Let's set them for all the SoCs as the tptc module should behave the same for all of them. It's likely that am335x was never tested to idle EDMA tptc. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Fix wrong offset for display subsystem reset quirkTony Lindgren2020-03-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7324a7a0d5e2 ("bus: ti-sysc: Implement display subsystem reset quirk") added support for DSS reset, but is using dispc offset also for DSS also registers as reported by Tomi Valkeinen <tomi.valkeinen@ti.com>. Also, we're not using dispc_offset for dispc IRQSTATUS register so let's fix that too. Fixes: 7324a7a0d5e2 ("bus: ti-sysc: Implement display subsystem reset quirk") Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Implement display subsystem reset quirkTony Lindgren2020-02-261-3/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The display subsystem (DSS) needs the child outputs disabled for reset. In order to prepare to probe DSS without legacy platform data, let's implement sysc_pre_reset_quirk_dss() similar to what we have for the platform data with omap_dss_reset(). Note that we cannot directly use the old omap_dss_reset() without platform data callbacks and updating omap_dss_reset() to understand struct device. And we will be dropping omap_dss_reset() anyways when all the SoCs are probing with device tree, so let's not mess with the legacy code at all. Cc: Jyri Sarha <jsarha@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Detect display subsystem related devicesTony Lindgren2020-02-261-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to prepare probing display subsystem (DSS) with ti-sysc interconnect target module driver and device tree data, let's detect DSS related modules. We need to also add reset quirk handling for DSS, but until that's done, let's just enable the optional clock quirks for DSS and omap4 HDMI. The rest is just naming of modules if CONFIG_DEBUG is set. Cc: Jyri Sarha <jsarha@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Handle module unlock quirk needed for some RTCTony Lindgren2020-02-261-6/+68
| | | | | | | | | | | | | | | | | | The RTC modules on am3 and am4 need quirk handling to unlock and lock them for reset so let's add the quirk handling based on what we already have for legacy platform data. In later patches we will simply drop the RTC related platform data and the old quirk handling. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Implement SoC revision handlingTony Lindgren2020-02-261-1/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to know SoC type and features for cases where the same SoC may be installed in various versions on the same board and would need a separate dts file otherwise for the different variants. For example, am3703 is pin compatible with omap3630, but has sgx and iva accelerators disabled. We must not try to access the sgx or iva module registers on am3703, and need to set the unavailable devices disabled early. Let's also detect omap3430 as that is needed for display subsystem (DSS) reset later on, and GP vs EMU or HS devices. Further SoC specific disabled device detection can be added as needed, such as dra71x vs dra76x rtc and usb4. Cc: Adam Ford <aford173@gmail.com> Cc: André Hentschel <nerv@dawncrow.de> Cc: H. Nikolaus Schaller <hns@goldelico.com> Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Don't warn about legacy property for nested ti-sysc devicesTony Lindgren2020-02-261-1/+1
| | | | | | | | | | | | | | In some cases we can have nested ti-sysc instances that may still use the legacy "ti,hwmods" property. Let's not warn if that's the case. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Consider non-existing registers too when matching quirksTony Lindgren2020-02-261-63/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We are currently setting -1 for non-existing sysconfig related registers for quirks, but setting -ENODEV elsewhere. And for matching the quirks, we're now just ignoring the non-existing registers. This will cause issues with misdetecting DSS registers as the hardware revision numbers can have duplicates. To avoid this, let's standardize on using -ENODEV also for the quirks instead of -1. That way we can always just test for a match without adding any more complicated logic. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Improve reset to work with modules with no sysconfigTony Lindgren2020-02-261-4/+6
| | | | | | | | | | | | | | | | At least display susbsystem (DSS) has modules with no sysconfig registers and rely on custom function for module reset handling. Let's make reset work with that too. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Rename clk related quirks to pre_reset and post_reset quirksTony Lindgren2020-02-261-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | The clk_disable_quirk and clk_enable_quirk should really be called pre_reset_quirk and post_reset_quirk to avoid confusion like we had with hdq1w reset. Let's also rename the related functions so the code is easier to follow. Note that we also have reset_done_quirk that is needed in some cases after checking the separate register for reset done bit. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Fix 1-wire reset quirkTony Lindgren2020-02-261-2/+2
|/ | | | | | | | | Because of the i2c quirk we have the reset quirks named in a confusing way. Let's fix the 1-wire quirk accordinlyg. Then let's switch to using better naming later on. Fixes: 4e23be473e30 ("bus: ti-sysc: Add support for module specific reset quirks") Signed-off-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2020-02-081-9/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms: - Nvidia: Fuse support for Tegra194, continued memory controller pieces for Tegra30 - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC - NXP/FSL: i.MX8MP SoC driver pieces - TI Keystone: ring accelerator driver - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs. - Xilinx ZynqMP: feature checking interface for firmware. Mailbox communication for power management - Overall support patch set for cpuidle on more complex hierarchies (PSCI-based) and misc cleanups, refactorings of Marvell, TI, other platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits) drivers: soc: xilinx: Use mailbox IPI callback dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists MAINTAINERS: Add brcmstb PCIe controller entry soc/tegra: fuse: Unmap registers once they are not needed anymore soc/tegra: fuse: Correct straps' address for older Tegra124 device trees soc/tegra: fuse: Warn if straps are not ready soc/tegra: fuse: Cache values of straps and Chip ID registers memory: tegra30-emc: Correct error message for timed out auto calibration memory: tegra30-emc: Firm up hardware programming sequence memory: tegra30-emc: Firm up suspend/resume sequence soc/tegra: regulators: Do nothing if voltage is unchanged memory: tegra: Correct reset value of xusb_hostr soc/tegra: fuse: Add APB DMA dependency for Tegra20 bus: tegra-aconnect: Remove PM_CLK dependency dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define memory: tegra: Add support for the Tegra194 memory controller memory: tegra: Only include support for enabled SoCs memory: tegra: Support DVFS on Tegra186 and later ...
| * bus: ti-sysc: Use PTR_ERR_OR_ZERO() to simplify codezhengbin2019-12-121-3/+1
| | | | | | | | | | | | | | | | | | | | Fixes coccicheck warning: drivers/bus/ti-sysc.c:506:1-3: WARNING: PTR_ERR_OR_ZERO can be used Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * bus: ti-sysc: Drop MMU quirksSuman Anna2019-12-121-4/+0
| | | | | | | | | | | | | | | | | | | | The OMAP IOMMU driver no longer uses the pm_runtime_irq_safe() API after commit 1432ebbd6003 ("iommu/omap: remove pm_runtime_irq_safe flag for OMAP IOMMUs"), so the SYSC_QUIRK_LEGACY_IDLE quirk is no longer needed for MMU devices. Drop the same. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * bus: ti-sysc: Implement quirk handling for CLKDM_NOAUTOTony Lindgren2019-12-121-2/+8
| | | | | | | | | | | | | | | | | | | | | | For dra7 dcan and dwc3 instances we need to block clockdomain autoidle. Let's do this with CLKDM_NOAUTO quirk flag and enable it for dcan and dwc3. Cc: Keerthy <j-keerthy@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | bus: ti-sysc: Fix iterating over clocksTony Lindgren2019-12-161-2/+8
|/ | | | | | | | | | | | | | | | | | | Commit d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") separated handling of optional clocks from the main clocks, but introduced an issue where we do not necessarily allocate a slot for both fck and ick clocks, but still assume fixed slots for enumerating over the clocks. Let's fix the issue by ensuring we always have slots for both fck and ick even if we don't use ick, and don't attempt to enumerate optional clocks if not allocated. In the long run we might want to simplify things a bit by only allocating space only for the optional clocks as we have only few devices with optional clocks. Fixes: d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Fix missing reset delay handlingTony Lindgren2019-12-121-0/+4
| | | | | | | | | | | We have dts property for "ti,sysc-delay-us", and we're using it, but the wait after OCP softreset only happens if devices are probed in legacy mode. Let's add a delay after writing the OCP softreset when specified. Fixes: e0db94fe87da ("bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits") Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Fix missing force mstandby quirk handlingTony Lindgren2019-12-101-1/+2
| | | | | | | | | | | | | Commit 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") added quirk handling for mstandby quirk but did not consider that we also need a quirk variant for SYSC_QUIRK_FORCE_MSTANDBY. We need to use forced idle mode for both SYSC_QUIRK_SWSUP_MSTANDBY and SYSC_QUIRK_FORCE_MSTANDBY, but SYSC_QUIRK_SWSUP_MSTANDBY also need to additionally also configure no-idle mode when enabled. Fixes: 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Adjust exception handling in sysc_child_add_named_clock()Markus Elfring2019-11-141-4/+3
| | | | | | | | Add a jump target so that a call of the function “clk_put” can be better reused at the end of this function. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Add module enable quirk for audio AESSTony Lindgren2019-11-141-1/+13
| | | | | | | | | | We must set the autogating bit on enable for AESS (Audio Engine SubSystem) when probed with ti-sysc interconnect target module driver. Otherwise it won't idle properly. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Use swsup quirks also for am335x musbTony Lindgren2019-10-211-0/+2
| | | | | | Also on am335x we need the swsup quirks for musb. Signed-off-by: Tony Lindgren <tony@atomide.com>
* bus: ti-sysc: Handle mstandby quirk and use it for musbTony Lindgren2019-10-211-2/+8
| | | | | | | We need swsup quirks for sidle and mstandby for musb to work properly. Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-01 20:42:56 +0000