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| | * clk: at91: clk-sam9x60-pll: remove unused variableClaudiu Beznea2020-10-131-2/+1
| | * clk: at91: clk-main: update key before writing AT91_CKGR_MORClaudiu Beznea2020-10-131-3/+8
| | * clk: at91: remove the checking of parent_nameClaudiu Beznea2020-10-131-2/+2
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* / clk: at91: drop unused at91sam9g45_pcr_layoutKrzysztof Kozlowski2020-09-221-7/+0
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* clk: at91: sama7g5: add clock support for sama7g5Claudiu Beznea2020-07-242-0/+1060
* clk: at91: clk-utmi: add utmi support for sama7g5Claudiu Beznea2020-07-242-5/+102
* clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputsClaudiu Beznea2020-07-243-186/+433
* clk: at91: clk-programmable: add mux_table optionClaudiu Beznea2020-07-2413-17/+38
* clk: at91: clk-peripheral: add support for changeable parent rateClaudiu Beznea2020-07-249-16/+119
* clk: at91: clk-master: add master clock support for SAMA7G5Claudiu Beznea2020-07-242-5/+312
* clk: at91: clk-generated: add mux_table optionClaudiu Beznea2020-07-245-8/+16
* clk: at91: clk-generated: pass the id of changeable parent at registrationClaudiu Beznea2020-07-245-35/+37
* clk: at91: replace conditional operator with double logical notClaudiu Beznea2020-07-245-8/+8
* clk: at91: sckc: register slow_rc with accuracy optionClaudiu Beznea2020-07-241-2/+3
* clk: at91: sam9x60: fix main rc oscillator frequencyClaudiu Beznea2020-07-241-1/+1
* clk: at91: sam9x60-pll: use frac when setting frequencyClaudiu Beznea2020-07-241-4/+8
* clk: at91: sam9x60-pll: check fcore against rangesClaudiu Beznea2020-07-242-2/+12
* clk: at91: sam9x60-pll: use logical or for range checkClaudiu Beznea2020-07-241-1/+1
* clk: at91: clk-sam9x60-pll: fix mul maskClaudiu Beznea2020-07-241-1/+1
* clk: at91: clk-generated: check best_rate against rangesClaudiu Beznea2020-07-241-2/+2
* clk: at91: clk-generated: continue if __clk_determine_rate() returns errorClaudiu Beznea2020-07-241-1/+2
* clk: at91: fix possible dead lock in new driversAhmad Fatoum2020-07-244-4/+4
* clk: at91: allow setting all PMC clock parents via DTMichał Mirosław2020-05-2610-10/+38
* clk: at91: allow setting PCKx parent via DTMichał Mirosław2020-05-2612-13/+45
* clk: at91: optimize pmc data allocationMichał Mirosław2020-05-2612-37/+20
* clk: at91: pmc: decrement node's refcountClaudiu Beznea2020-05-261-0/+1
* clk: at91: pmc: do not continue if compatible not locatedClaudiu Beznea2020-05-261-0/+2
* clk: at91: Add peripheral clock for PTCCodrin Ciubotariu2020-05-261-0/+1
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2020-04-057-11/+913
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| * clk: at91: add at91rm9200 pmc driverAlexandre Belloni2020-03-202-0/+200
| * clk: at91: add at91sam9n12 pmc driverAlexandre Belloni2020-02-122-0/+239
| * clk: at91: add sama5d3 pmc driverAlexandre Belloni2020-02-122-0/+241
| * clk: at91: add at91sam9g45 pmc driverAlexandre Belloni2020-02-122-0/+221
| * clk: at91: usb: introduce num_parents in driver's structureClaudiu Beznea2020-02-121-1/+3
| * clk: at91: usb: use proper usbs_maskClaudiu Beznea2020-02-121-1/+1
| * clk: at91: sam9x60: fix usb clock parentsClaudiu Beznea2020-02-121-3/+2
| * clk: at91: usb: continue if clk_hw_round_rate() return zeroClaudiu Beznea2020-02-121-0/+3
| * clk: at91: sam9x60: Don't use audio PLLCodrin Ciubotariu2020-02-121-6/+3
* | clk: at91: move sam9x60's PLL register offsets to PMC headerClaudiu Beznea2020-02-181-54/+37
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*-. Merge branches 'clk-uniphier', 'clk-warn-critical', 'clk-ux500', 'clk-kconfig...Stephen Boyd2020-01-318-8/+13
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| | * clk: at91: sam9x60: fix programmable clock prescalerEugen Hristev2020-01-051-0/+1
| | * clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default valueEugen Hristev2020-01-051-2/+6
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| * clk: at91: fix possible deadlockAlexandre Belloni2019-12-166-6/+6
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-12-011-2/+1
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| * drivers/clk: convert VL struct to struct_sizeStephen Kitt2019-11-081-2/+1
* | clk: at91: avoid sleeping earlyAlexandre Belloni2019-10-282-5/+20
* | clk: at91: sam9x60: fix programmable clockEugen Hristev2019-10-031-0/+1
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* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-09-202-5/+9
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| * clk: at91: allow 24 Mhz clock as input for PLLEugen Hristev2019-09-171-1/+1
| * clk: at91: select parent if main oscillator or bypass is enabledEugen Hristev2019-09-161-3/+7
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-12 21:23:50 +0000