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* clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bitDong Aisheng2020-05-101-4/+4
| | | | | | | | | | | | | | | commit b3e76bdc0b2190e67427d31cd740debd01c03631 upstream. After commit f53947456f98 ("ARM: clk: imx: update pllv3 to support imx7"), the former used BM_PLL_POWER bit is not correct anymore for IMX7 ENET. Instead, pll->powerdown holds the correct bit, so using powerdown bit in clk_pllv3_{prepare | unprepare} functions. Fixes: f53947456f98 ("ARM: clk: imx: update pllv3 to support imx7") Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* clk: vf610: fix refcount leak in vf610_clocks_init()Yangtao Li2020-01-291-0/+1
| | | | | | | | | | | | | [ Upstream commit 567177024e0313e4f0dcba7ba10c0732e50e655d ] The of_find_compatible_node() returns a node pointer with refcount incremented, but there is the lack of use of the of_node_put() when done. Add the missing of_node_put() to release the refcount. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Fixes: 1f2c5fd5f048 ("ARM: imx: add VF610 clock support") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* clk: imx7d: fix refcount leak in imx7d_clocks_init()Yangtao Li2020-01-291-0/+1
| | | | | | | | | | | | | [ Upstream commit 5f8c183a996b76bb09748073c856e4246fd4ce95 ] The of_find_compatible_node() returns a node pointer with refcount incremented, but there is the lack of use of the of_node_put() when done. Add the missing of_node_put() to release the refcount. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Fixes: 8f6d8094b215 ("ARM: imx: add imx7d clk tree support") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* clk: imx6sx: fix refcount leak in imx6sx_clocks_init()Yangtao Li2020-01-291-0/+1
| | | | | | | | | | | | | [ Upstream commit 1731e14fb30212dd8c1e9f8fc1af061e56498c55 ] The of_find_compatible_node() returns a node pointer with refcount incremented, but there is the lack of use of the of_node_put() when done. Add the missing of_node_put() to release the refcount. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Fixes: d55135689019 ("ARM: imx: add clock driver for imx6sx") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* clk: imx6q: fix refcount leak in imx6q_clocks_init()Yangtao Li2020-01-291-0/+1
| | | | | | | | | | | | | [ Upstream commit c9ec1d8fef31b5fc9e90e99f9bd685db5caa7c5e ] The of_find_compatible_node() returns a node pointer with refcount incremented, but there is the lack of use of the of_node_put() when done. Add the missing of_node_put() to release the refcount. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Fixes: 2acd1b6f889c ("ARM: i.MX6: implement clocks using common clock framework") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* clk: imx6sl: ensure MMDC CH0 handshake is bypassedAnson Huang2019-02-201-0/+6
| | | | | | | | | | | | | [ Upstream commit 0efcc2c0fd2001a83240a8c3d71f67770484917e ] Same as other i.MX6 SoCs, ensure unused MMDC channel's handshake is bypassed, this is to make sure no request signal will be generated when periphe_clk_sel is changed or SRC warm reset is triggered. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* clk: imx6q: reset exclusive gates on initLucas Stach2019-01-261-1/+5
| | | | | | | | | | | | | | | | | [ Upstream commit f7542d817733f461258fd3a47d77da35b2d9fc81 ] The exclusive gates may be set up in the wrong way by software running before the clock driver comes up. In that case the exclusive setup is locked in its initial state, as the complementary function can't be activated without disabling the initial setup first. To avoid this lock situation, reset the exclusive gates to the off state and allow the kernel to provide the proper setup. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Dong Aisheng <Aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* clk: imx6ul: fix missing of_node_put()Nicholas Mc Guire2018-09-261-0/+1
| | | | | | | | | | | | | | [ Upstream commit 11177e7a7aaef95935592072985526ebf0a3df43 ] of_find_compatible_node() is returning a device node with refcount incremented and must be explicitly decremented after the last use which is right after the us in of_iomap() here. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Fixes: 787b4271a6a0 ("clk: imx: add imx6ul clk tree support") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPUSébastien Szymanski2017-12-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [ Upstream commit c68ee58d9ee7b856ac722f18f4f26579c8fbd2b4 ] On i.MX6 SoCs without VPU (in my case MCIMX6D4AVT10AC), the hdmi driver fails to probe: [ 2.540030] dwhdmi-imx 120000.hdmi: Unsupported HDMI controller (0000:00:00) [ 2.548199] imx-drm display-subsystem: failed to bind 120000.hdmi (ops dw_hdmi_imx_ops): -19 [ 2.557403] imx-drm display-subsystem: master bind failed: -19 That's because hdmi_isfr's parent, video_27m, is not correctly ungated. As explained in commit 5ccc248cc537 ("ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate"), video_27m is gated by CCM_CCGR3[CG8]. On i.MX6 SoCs with VPU, the hdmi is working thanks to the CCM_CMEOR[mod_en_ov_vpu] bit which makes the video_27m ungated whatever is in CCM_CCGR3[CG8]. The issue can be reproduced by setting CCMEOR[mod_en_ov_vpu] to 0. Make the HDMI work in every case by setting hdmi_isfr's parent to mipi_core_cfg. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* clk: imx31: fix rewritten input argument of mx31_clocks_init()Vladimir Zapolskiy2017-01-121-3/+1
| | | | | | | | | | | | | | | | | | | | | | commit bae203d58b7dce89664071b3fafe20cedaa3e4f6 upstream. Function mx31_clocks_init() is called during clock intialization on legacy boards with reference clock frequency passed as its input argument, this can be verified by examination of the function declaration found in arch/arm/mach-imx/common.h and actual function users which include that header file. Inside CCF driver the function ignores its input argument, by chance the used value in the function body is the same as input arguments on side of all callers. Fixes: d9388c843237 ("clk: imx31: Do not call mxc_timer_init twice when booting with DT") Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: clk-imx35: fix name for ckil clkUwe Kleine-König2016-10-311-1/+1
| | | | | | | | | | | | | | | commit fcff03813a7c612873303037cef5ba0329850c35 upstream. This fixes [ 0.000000] i.MX clk 82: register failed with -17 because the name is duplicated. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Fixes: 3713e3f5e927 ("clk: imx35: define two clocks for rtc") Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* clk: imx6: initialize GPU clocksLucas Stach2016-10-281-0/+18
| | | | | | | | | | | | | | | | | | commit d8846023aed1293e54d33499558fc2aa2b2f393f upstream. Initialize the GPU clock muxes to sane inputs. Until now they have not been changed from their default values, which means that both GPU3D shader and GPU2D core were fed by clock inputs whose rates exceed the maximium allowed frequency of the cores by as much as 200MHz. This fixes a severe GPU stability issue on i.MX6DL. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ARM: dts: imx35: restore existing used clock enumerationAlexander Kurz2016-06-071-2/+2
| | | | | | | | | | | | | | | | | | commit 3397c2c45b1b6f54834dfeae30a73046f33ca943 upstream. A new element got inserted into enum mx35_clks with commit 3713e3f5e927 ("clk: imx35: define two clocks for rtc"). This insertion shifted most nummerical clock assignments to a new nummerical value which in turn rendered most hardcoded nummeric values in imx35.dtsi incorrect. Restore the existing order by moving the newly introduced clock to the end of the enum. Update the dts documentation accordingly. Signed-off-by: Alexander Kurz <akurz@blala.de> Fixes: 3713e3f5e927 ("clk: imx35: define two clocks for rtc") Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'fixes-for-linus' of ↵Linus Torvalds2015-12-121-4/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "Here are a bunch of small bug fixes for various ARM platforms, nothing really sticks out this week, most of either fixes bugs in code that was just added in 4.4, or that has been broken for many years without anyone noticing. at91/sama5d2: - fix sama5de hardware setup of sd/mmc interface - proper selection of pinctrl drivers. PIO4 is necessary for sama5d2 berlin: - fix incorrect clock input for SDIO exynos: - Fix potential NULL pointer dereference in Exynos PMU driver. imx: - Fix vf610 SAI clock configuration bug which is discovered by the newly added master mode support in SAI audio driver. - Fix buggy L2 cache latency values in vf610 device trees, which may cause system hang when cpu runs at a higher frequency. ixp4xx: - fix prototypes for readl/writel functions ls2080a: - use little-endian register access for GPIO and SDHCI omap: - Fix clock source for ARM TWD and global timers on am437x - Always select REGULATOR_FIXED_VOLTAGE for omap2+ instead of when MACH_OMAP3_PANDORA is selected - Fix SPI DMA handles for dm816x as only some were mapped - Fix up mbox cells for dm816x to make mailbox usable pxa: - use PWM lookup table for all ezx machines s3c24xx: - Remove incorrect __init annotation from s3c24xx cpufreq driver structures. versatile: - fix PCI IRQ mapping on Versatile PB" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ls2080a/dts: Add little endian property for GPIO IP block dt-bindings: define little-endian property for QorIQ GPIO ARM64: dts: ls2080a: fix eSDHC endianness ARM: dts: vf610: use reset values for L2 cache latencies ARM: pxa: use PWM lookup table for all machines ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1 ARM: dts: berlin: correct BG2Q's sdhci2 2nd clock ARM: dts: am4372: fix clock source for arm twd and global timers ARM: at91: fix pinctrl driver selection ARM: at91/dt: add always-on to 1.8V regulator ARM: dts: vf610: fix clock definition for SAI2 ARM: imx: clk-vf610: fix SAI clock tree ARM: ixp4xx: fix read{b,w,l} return types irqchip/versatile-fpga: Fix PCI IRQ mapping on Versatile PB ARM: OMAP2+: enable REGULATOR_FIXED_VOLTAGE ARM: dts: add dm816x missing spi DT dma handles ARM: dts: add dm816x missing #mbox-cells cpufreq: s3c24xx: Do not mark s3c2410_plls_add as __init ARM: EXYNOS: Fix potential NULL pointer access in exynos_sys_powerdown_conf
| * ARM: imx: clk-vf610: fix SAI clock treeStefan Agner2015-12-021-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Synchronous Audio Interface (SAI) instances are clocked by independent clocks: The bus clock and the audio clock (as shown in Figure 51-1 in the Vybrid Reference Manual). The clock gates in CCGR0/CCGR1 for SAI0 through SAI3 are bus clock gates, as access tests to the registers with/without gating those clocks have shown. The audio clock is gated by the SAIx_EN gates in CCM_CSCDR1, followed by a clock divider (SAIx_DIV). Currently, the parent of the bus clock gates has been assigned to SAIx_DIV, which is not involved in the bus clock path for the SAI instances (see chapter 9.10.12, SAI clocking in the Vybrid Reference Manual). Fix this by define the parent clock of VF610_CLK_SAIx to be the bus clock. If the driver needs the audio clock (when used in master mode), a fixed device tree is required which assign the audio clock properly to VF610_CLK_SAIx_DIV. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | imx/clk-pllv2: fix wrong do_div() usageNicolas Pitre2015-11-301-4/+5
| | | | | | | | | | | | | | | | do_div() is meant to be used with an unsigned dividend. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | imx/clk-pllv1: fix wrong do_div() usageNicolas Pitre2015-11-301-7/+7
|/ | | | | | | | do_div() is meant to be used with an unsigned dividend. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: imx31: add missing of_node_putJulia Lawall2015-10-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for_each_compatible_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. The semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ local idexpression n; expression e; @@ for_each_compatible_node(n,...) { ... ( of_node_put(n); | e = n | + of_node_put(n); ? break; ) ... } ... when != n // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: imx27: add missing of_node_putJulia Lawall2015-10-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for_each_compatible_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. The semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ local idexpression n; expression e; @@ for_each_compatible_node(n,...) { ... ( of_node_put(n); | e = n | + of_node_put(n); ? break; ) ... } ... when != n // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'imx-clk-4.4' of ↵Stephen Boyd2015-10-1613-31/+209
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next Pull i.MX updates from Shawn Guo: "The i.MX clock updates for 4.4: - A couple of fixes on i.MX31 and i.MX35 clock initialization functions which makes mxc_timer_init() currently be called twice for DT boot. - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal design target. - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for Vybrid, and SPDIF_GCLK for i.MX6. - A series from Lucas to fix early debug UART clock setup. This is currently a one-off fix for i.MX platform, and can be extended to become a generic solution later." * tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: clk: imx6: Add SPDIF_GCLK clock in clock tree clk: imx7d: add ADC root clock clk: imx31: Do not call mxc_timer_init twice when booting with DT clk: imx7d: retain early UART clocks during kernel init clk: imx6: retain early UART clocks during kernel init clk: imx5: retain early UART clocks during kernel init clk: imx35: retain early UART clocks during kernel init clk: imx31: retain early UART clocks during kernel init clk: imx27: retain early UART clocks during kernel init clk: imx25: retain early UART clocks during kernel init clk: imx: add common logic to detect early UART usage clk: imx35: Do not call mxc_timer_init twice when booting with DT clk: clk-vf610: Add clock for Vybrid OCOTP controller clk: imx: increase AXI clock rate to 264MHz for i.MX6UL
| * clk: imx6: Add SPDIF_GCLK clock in clock treeShengjiu Wang2015-10-123-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also one clock of SPDIF, which is missed before. We found an issue that imx can't enter low power mode with spdif if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe, so its parent clock (PLL clock) is prepared, the prepare operation of PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled, then it can enter low power mode. So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock. SPDIF_GCLK's parent clock is ipg clock. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx7d: add ADC root clockHaibo Chen2015-10-091-0/+1
| | | | | | | | | | | | | | | | Add ADC root clock support in imx7d clock tree. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx31: Do not call mxc_timer_init twice when booting with DTAlexander Stein2015-09-301-8/+17
| | | | | | | | | | | | | | | | | | | | mxc_timer_init must not be called from within mx31_clocks_init_dt. It will eventually be called by imx31_timer_init_dt (drivers/clocksource/timer-imx-gpt.c). This arranges the initialization code similar to clk-imx27.c Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx7d: retain early UART clocks during kernel initLucas Stach2015-09-251-0/+13
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx6: retain early UART clocks during kernel initLucas Stach2015-09-253-0/+24
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx5: retain early UART clocks during kernel initLucas Stach2015-09-251-0/+16
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx35: retain early UART clocks during kernel initLucas Stach2015-09-251-0/+10
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx31: retain early UART clocks during kernel initLucas Stach2015-09-251-0/+12
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx27: retain early UART clocks during kernel initLucas Stach2015-09-251-0/+13
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx25: retain early UART clocks during kernel initLucas Stach2015-09-251-0/+12
| | | | | | | | | | | | | | | | Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx: add common logic to detect early UART usageLucas Stach2015-09-252-0/+39
| | | | | | | | | | | | | | | | | | | | | | Both earlycon and eralyprintk depend on the bootloader setup UART clocks being retained. This patch adds the common logic to detect such situations and make the information available to the clock drivers, as well as adding the facilities to disable those clocks at the end of the kernel init. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx35: Do not call mxc_timer_init twice when booting with DTAlexander Stein2015-09-221-22/+27
| | | | | | | | | | | | | | | | | | | | mxc_timer_init must not be called from within mx35_clocks_init_dt. It will eventually be called by imx31_timer_init_dt (drivers/clocksource/timer-imx-gpt.c). This arranges the initialization code similar to clk-imx27.c Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: clk-vf610: Add clock for Vybrid OCOTP controllerSanchayan Maity2015-09-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock support for Vybrid On-Chip One Time Programmable (OCOTP) controller. While the OCOTP block does not require explicit clock gating, for programming the OCOTP timing register the clock rate of ipg clock is required for timing calculations related to fuse and shadow register read sequence. We explicitly specify the ipg clock for OCOTP as a result. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * clk: imx: increase AXI clock rate to 264MHz for i.MX6ULAnson Huang2015-09-171-0/+18
| | | | | | | | | | | | | | | | | | | | | | On i.MX6UL, AXI clock rate's design target is 264MHz, but by default it is only set to 198MHz which is NOT good enough for performance, this patch increases AXI clock rate from 198MHz to 264MHz to meet the design target, this is done by switching its parent clock "periph" from 396MHz PFD to 528MHz PLL. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* | clk: imx: use sign_extend32() and abs()Martin Kepplinger2015-10-011-8/+4
|/ | | | | | | | | This simplifies the given function by getting rid of the manual sign extension as well as saving an absolute value in an extra variable. Signed-off-by: Martin Kepplinger <martink@posteo.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds2015-08-311-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull crypto updates from Herbert Xu: "Here is the crypto update for 4.3: API: - the AEAD interface transition is now complete. - add top-level skcipher interface. Drivers: - x86-64 acceleration for chacha20/poly1305. - add sunxi-ss Allwinner Security System crypto accelerator. - add RSA algorithm to qat driver. - add SRIOV support to qat driver. - add LS1021A support to caam. - add i.MX6 support to caam" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (163 commits) crypto: algif_aead - fix for multiple operations on AF_ALG sockets crypto: qat - enable legacy VFs MPI: Fix mpi_read_buffer crypto: qat - silence a static checker warning crypto: vmx - Fixing opcode issue crypto: caam - Use the preferred style for memory allocations crypto: caam - Propagate the real error code in caam_probe crypto: caam - Fix the error handling in caam_probe crypto: caam - fix writing to JQCR_MS when using service interface crypto: hash - Add AHASH_REQUEST_ON_STACK crypto: testmgr - Use new skcipher interface crypto: skcipher - Add top-level skcipher interface crypto: cmac - allow usage in FIPS mode crypto: sahara - Use dmam_alloc_coherent crypto: caam - Add support for LS1021A crypto: qat - Don't move data inside output buffer crypto: vmx - Fixing GHASH Key issue on little endian crypto: vmx - Fixing AES-CTR counter bug crypto: null - Add missing Kconfig tristate for NULL2 crypto: nx - Add forward declaration for struct crypto_aead ...
| * ARM: clk-imx6q: Add CAAM clock supportVictoria Milhoan2015-08-101-0/+3
| | | | | | | | | | | | | | | | Add CAAM clock support to the i.MX6 clocking infrastructure. Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com> Tested-by: Horia Geantă <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* | Merge tag 'imx-clk-4.3' of ↵Michael Turquette2015-08-125-2/+444
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next The i.MX clock updates for 4.3: - Provide a better IPU clock initial settings on imx6dl for getting HDMI and LVDS at the same time. - Add clock driver support for i.MX6UL SoC - Add a second clock for RTC device on i.MX31 and i.MX35
| * | clk: imx35: define two clocks for rtcPhilippe Reynes2015-08-051-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The imx35 don't define clocks for rtc. This patch add two clocks, as needed by the mxc rtc driver. Signed-off-by: Philippe Reynes <tremyfr@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | clk: imx31: add a second rtc clockPhilippe Reynes2015-08-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The mxc rtc driver needs two clock. It was defined only one clock, so we define the second clock. Signed-off-by: Philippe Reynes <tremyfr@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | clk: imx: add imx6ul clk tree supportFrank Li2015-07-142-0/+433
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add imx6ul clock driver support. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Bai Ping <b51503@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | clk: imx: clk-imx6q: Provide initial IPU clock settings for mx6dlFabio Estevam2015-07-131-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Currently it is not possible to use HDMI and LVDS at the same time on a imx6dl-sabresd board. Fix this usecase by setting IMX6QDL_CLK_PLL3_PFD1_540M to 540MHz and also by setting it as the parent of IMX6QDL_CLK_IPU1_SEL. Based on the configuration done in the FSL kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* / clk: i.MX: Remove clk.h includeStephen Boyd2015-07-205-5/+0
|/ | | | | | | | | | | Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Remove the include here because this is a provider driver. Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2015-06-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ...
* ARM: imx: define an enum for gpt timer device typeShawn Guo2015-06-036-12/+10
| | | | | | | | | | | Define an enum for gpt timer device type in include/soc/imx/timer.h to tell the gpt block differences among SoCs. Update non-DT users (clock drivers) to pass the device type. As we now have include/soc/imx/timer.h, the declaration of mxc_timer_init() is moved into there as the best fit. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: clk-imx6q: refine sata's parentSébastien Szymanski2015-06-031-1/+1
| | | | | | | | According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: clk-v610: Add clock for I2C2 and I2C3Mirza Krak2015-06-031-0/+2
| | | | | | | | Add support for clock gating of I2C2 and I2C3. We use I2C2 in a (not yet mainlined) device tree. Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add imx7d clk tree supportFrank Li2015-06-032-0/+861
| | | | | | | | | | | | | | | | | | Add i.MX7D clk tree support. Enable all clock to bring up imx7. Clock framework need be modified a little since imx7d change clock design. otherwise system will halt and block the other part upstream. All clock refine need wait for Dong Aisheng's patch clk: support clocks which requires parent clock on during operation Or other solution ready. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: clk: imx: update pllv3 to support imx7Frank Li2015-06-032-1/+9
| | | | | | | Add type IMX_PLLV3_ENET_IMX7 Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: clk-vf610: enable debug access port by defaultStefan Agner2015-06-031-0/+2
| | | | | | | | | | | | | | | | | Enabled DAP (debug access port) by default. This enables the hw- breakpoint framework to make use of the breakpoints and watchpoints supported by hardware. [ 0.215805] hw-breakpoint: found 2 (+1 reserved) breakpoint and 1 watchpoint registers. [ 0.224624] hw-breakpoint: maximum watchpoint size is 4 bytes. Without this clock, the hw-breakpoint driver claims an undefined instruction during initialization: [ 0.227380] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 0 [ 0.227519] hw-breakpoint: CPU 0 failed to disable vector catch Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-24 22:49:37 +0000