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* docs: Fix some broken referencesMauro Carvalho Chehab2018-06-151-1/+1
| | | | | | | | | | | | | | | | | | As we move stuff around, some doc references are broken. Fix some of them via this script: ./scripts/documentation-file-ref-check --fix Manually checked if the produced result is valid, removing a few false-positives. Acked-by: Takashi Iwai <tiwai@suse.de> Acked-by: Masami Hiramatsu <mhiramat@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Coly Li <colyli@suse.de> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: Jonathan Corbet <corbet@lwn.net>
* clk: ingenic: jz4770: Add 150us delay after enabling VPU clockPaul Cercueil2018-06-011-1/+1
| | | | | | | This is required, as we must not use the AHB1 bus before it is stable. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clockPaul Cercueil2018-06-011-2/+2
| | | | | | | | This was broken before, because the AHB1 bus was enabled before the VPU clock was ungated, while it must be done afterwards. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idlePaul Cercueil2018-06-011-1/+2
| | | | | | | | | | When the main processor goes idle, by default its clock is stopped. However, this also stops the clock of the co-processor. Here, if the C1CLK clock is enabled, we disable this functionality. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ingenic: jz4770: Change OTG from custom to standard gated clockPaul Cercueil2018-06-011-37/+5
| | | | | | | | We now have the means to express the specificities of the OTG clock with the common CGU code. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ingenic: Support specifying "wait for clock stable" delayPaul Cercueil2018-06-012-0/+5
| | | | | | | | Some clocks need a small delay after being ungated to run stable, as using them too soon might result in hardware lockups. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ingenic: Add support for clocks whose gate bit is invertedPaul Cercueil2018-06-012-2/+5
| | | | | | | | Support the clocks which are gated when their gate bit is cleared instead of set. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: Add Ingenic jz4770 CGU driverPaul Cercueil2018-01-182-0/+484
| | | | | | | | | | | | | Add support for the clocks provided by the CGU in the Ingenic JZ4770 SoC. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18482/ Signed-off-by: James Hogan <jhogan@kernel.org>
* clk: ingenic: Add code to enable/disable PLLsPaul Cercueil2018-01-181-15/+74
| | | | | | | | | | | | | This commit permits the PLLs to be dynamically enabled and disabled when their children clocks are enabled and disabled. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18480/ Signed-off-by: James Hogan <jhogan@kernel.org>
* clk: ingenic: support PLLs with no bypass bitPaul Cercueil2018-01-182-1/+4
| | | | | | | | | | | | | | The second PLL of the JZ4770 does not have a bypass bit. This commit makes it possible to support it with the current common CGU code. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18479/ Signed-off-by: James Hogan <jhogan@kernel.org>
* clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil2018-01-181-0/+2
| | | | | | | | | | | | | | | | | Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour. This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18477/ Signed-off-by: James Hogan <jhogan@kernel.org>
* clk: ingenic: Use const pointer to clk_ops in structPaul Cercueil2018-01-182-2/+2
| | | | | | | | | | | | | The CGU common code does not modify the pointed clk_ops structure, so it should be marked as const. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18476/ Signed-off-by: James Hogan <jhogan@kernel.org>
* Update MIPS email addressesPaul Burton2017-11-034-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS will soon not be a part of Imagination Technologies, and as such many @imgtec.com email addresses will no longer be valid. This patch updates the addresses for those who: - Have 10 or more patches in mainline authored using an @imgtec.com email address, or any patches dated within the past year. - Are still with Imagination but leaving as part of the MIPS business unit, as determined from an internal email address list. - Haven't already updated their email address (ie. JamesH) or expressed a desire to be excluded (ie. Maciej). - Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt & myself. New addresses are of the form firstname.lastname@mips.com, and all verified against an internal email address list. An entry is added to .mailmap for each person such that get_maintainer.pl will report the new addresses rather than @imgtec.com addresses which will soon be dead. Instances of the affected addresses throughout the tree are then mechanically replaced with the new @mips.com address. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@mips.com> Acked-by: Dengcheng Zhu <dengcheng.zhu@mips.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Matt Redfearn <matt.redfearn@mips.com> Acked-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* clk: ingenic: Allow divider value to be dividedHarvey Hunt2016-05-124-34/+47
| | | | | | | | | | | | | The JZ4780's MSC clock divider registers multiply the clock divider by 2. This means that MMC devices run at half their expected speed. Add the ability to divide the clock divider in order to solve this. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: ingenic: Include clk.hStephen Boyd2015-07-201-0/+1
| | | | | | | | | | This clock provider uses the consumer API, so include clk.h explicitly. Cc: Paul Burton <paul.burton@imgtec.com> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: ingenic: add JZ4780 CGU supportPaul Burton2015-06-212-0/+734
| | | | | | | | | | | | | | | | Add support for the clocks provided by the CGU in the Ingenic JZ4780 SoC, making use of the SoC-agnostic CGU code to do the heavy lifting. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10157/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton2015-06-211-0/+37
| | | | | | | | | | | | | | | | | | | The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move the jz4740_clock_{suspend,resume} functions there for such consistency. The arch/mips/jz4740/clock.c file now contains nothing more of use & so is removed. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10158/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton2015-06-211-0/+22
| | | | | | | | | | | | | | | | | The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move the jz4740_clock_udc_{dis,en}able_auto_suspend functions there for such consistency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10154/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton2015-06-211-0/+22
| | | | | | | | | | | | | | | | The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move jz4740_clock_set_wait_mode for such consistency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10153/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton2015-06-212-0/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Migrate the JZ4740 & the qi_lb60 board to use common clock framework via the new Ingenic SoC CGU driver. Note that the JZ4740-specific debugfs code is removed since common clock framework provides its own debug capabilities. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Fabian Frederick <fabf@skynet.be> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10151/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clk: ingenic: add driver for Ingenic SoC CGU clocksPaul Burton2015-06-213-0/+935
This driver supports the CGU clocks for Ingenic SoCs. It is generic enough to be usable across at least the JZ4740 to the JZ4780, and will be made use of on such devices in subsequent commits. This patch by itself only adds the SoC-agnostic infrastructure that forms the bulk of the CGU driver for the aforementioned further commits to make use of. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10150/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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