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path: root/drivers/clk/mediatek
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| * | clk: mediatek: Allow building most MT6797 clock drivers as modulesAngeloGioacchino Del Regno2023-03-131-4/+4
| * | clk: mediatek: Allow building most MT6765 clock drivers as modulesAngeloGioacchino Del Regno2023-03-131-13/+13
| * | clk: mediatek: Allow all MT8183 clocks to be built as modulesAngeloGioacchino Del Regno2023-03-131-12/+12
| * | clk: mediatek: Allow all MT8167 clocks to be built as modulesAngeloGioacchino Del Regno2023-03-131-8/+8
| * | clk: mediatek: Allow MT7622 clocks to be built as modulesAngeloGioacchino Del Regno2023-03-131-4/+4
| * | clk: mediatek: Allow building MT8192 non-critical clocks as modulesAngeloGioacchino Del Regno2023-03-131-12/+12
| * | clk: mediatek: Split MT8195 clock drivers and allow module buildAngeloGioacchino Del Regno2023-03-132-7/+113
| * | clk: mediatek: mt2712: Change Kconfig options to allow module buildAngeloGioacchino Del Regno2023-03-131-8/+8
| * | clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno2023-03-13109-1/+109
| * | clk: mediatek: Switch to module_platform_driver() where possibleAngeloGioacchino Del Regno2023-03-1396-149/+98
| * | clk: mediatek: mt8186-mcu: Migrate to common probe mechanismAngeloGioacchino Del Regno2023-03-131-55/+13
| * | clk: mediatek: mt7986-eth: Migrate to common probe mechanismAngeloGioacchino Del Regno2023-03-131-51/+32
| * | clk: mediatek: mt7986-infracfg: Migrate to common probe mechanismAngeloGioacchino Del Regno2023-03-131-44/+17
| * | clk: mediatek: mt7986-apmixed: Use PLL_AO flag to set critical clockAngeloGioacchino Del Regno2023-03-131-3/+1
| * | clk: mediatek: Propagate struct device with mtk_clk_register_dividers()AngeloGioacchino Del Regno2023-03-134-6/+9
| * | clk: mediatek: mt8516: Allow building clock drivers as modulesAngeloGioacchino Del Regno2023-03-131-2/+2
| * | clk: mediatek: mt8516: Convert to platform driver and simple probeAngeloGioacchino Del Regno2023-03-132-66/+57
| * | clk: mediatek: mt8516: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-82/+122
| * | clk: mediatek: mt7622: Convert to platform driver and simple probeAngeloGioacchino Del Regno2023-03-131-94/+31
| * | clk: mediatek: mt7622: Move infracfg to clk-mt7622-infracfg.cAngeloGioacchino Del Regno2023-03-133-74/+134
| * | clk: mediatek: mt7622-apmixedsys: Add .remove() callback for module buildAngeloGioacchino Del Regno2023-03-131-1/+15
| * | clk: mediatek: mt7622: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-88/+138
| * | clk: mediatek: mt7622: Properly use CLK_IS_CRITICAL flagAngeloGioacchino Del Regno2023-03-131-20/+15
| * | clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno2023-03-1347-839/+223
| * | clk: mediatek: mt8183: Convert all remaining clocks to common probeAngeloGioacchino Del Regno2023-03-131-132/+34
| * | clk: mediatek: mt8183: Compress clocks arrays entries where possibleAngeloGioacchino Del Regno2023-03-131-300/+150
| * | clk: mediatek: mt8183: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-154/+194
| * | clk: mediatek: mt8167: Convert to mtk_clk_simple_{probe,remove}()AngeloGioacchino Del Regno2023-03-135-113/+101
| * | clk: mediatek: mt8167: Remove __initconst annotation from arraysAngeloGioacchino Del Regno2023-03-135-54/+54
| * | clk: mediatek: mt8167: Move apmixedsys as platform_driver in new fileAngeloGioacchino Del Regno2023-03-133-103/+144
| * | clk: mediatek: mt8167: Compress GATE_TOPx macrosAngeloGioacchino Del Regno2023-03-131-64/+16
| * | clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()AngeloGioacchino Del Regno2023-03-131-204/+37
| * | clk: mediatek: mt8365: Join top_misc_mux_gates and top_misc_muxes arraysAngeloGioacchino Del Regno2023-03-131-32/+14
| * | clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocksAngeloGioacchino Del Regno2023-03-131-107/+82
| * | clk: mediatek: mt8365: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-144/+165
| * | clk: mediatek: mt2712: Change to use module_platform_driver macroAngeloGioacchino Del Regno2023-03-131-11/+5
| * | clk: mediatek: mt2712-apmixedsys: Add .remove() callback for module buildAngeloGioacchino Del Regno2023-03-131-1/+14
| * | clk: mediatek: mt2712: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno2023-03-133-165/+154
| * | clk: mediatek: mt2712: Add error handling to clk_mt2712_apmixed_probe()AngeloGioacchino Del Regno2023-03-131-4/+14
| * | clk: mediatek: mt2712: Compress clock arrays entries to 90 columnsAngeloGioacchino Del Regno2023-03-131-435/+246
| * | clk: mediatek: mt2712: Migrate topckgen/mcucfg to mtk_clk_simple_probe()AngeloGioacchino Del Regno2023-03-131-106/+21
| * | clk: mediatek: Add divider clocks to mtk_clk_simple_{probe,remove}()AngeloGioacchino Del Regno2023-03-132-2/+19
| * | clk: mediatek: Migrate to mtk_clk_pdev_probe() for multimedia clocksAngeloGioacchino Del Regno2023-03-1315-480/+165
| * | clk: mediatek: clk-mtk: Introduce clk_mtk_pdev_{probe,remove}()AngeloGioacchino Del Regno2023-03-132-8/+48
| * | clk: mediatek: clk-mtk: Switch to device_get_match_data()AngeloGioacchino Del Regno2023-03-131-3/+2
| * | clk: mediatek: mt8195: Add support for frequency hopping through FHCTLAngeloGioacchino Del Regno2023-03-131-3/+66
| * | clk: mediatek: mt8192: Add support for frequency hopping through FHCTLAngeloGioacchino Del Regno2023-03-131-2/+65
| * | clk: mediatek: mt8173: Add support for frequency hopping through FHCTLAngeloGioacchino Del Regno2023-03-131-3/+62
| * | clk: mediatek: mt6795: Add support for frequency hopping through FHCTLAngeloGioacchino Del Regno2023-03-131-3/+60
| * | clk: mediatek: clk-pllfh: Export register/unregister/parse functionsAngeloGioacchino Del Regno2023-03-131-0/+3
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-09 14:53:36 +0000