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path: root/drivers/clk/meson
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* clk: meson: use hhi syscon if availableJerome Brunet2018-03-133-24/+60
* clk: meson: remove obsolete cpu_clkJerome Brunet2018-03-133-190/+1
* clk: meson: rework meson8b cpu clockJerome Brunet2018-03-132-61/+119
* clk: meson: split divider and gate part of mpllJerome Brunet2018-03-138-118/+197
* clk: meson: migrate plls clocks to clk_regmapJerome Brunet2018-03-135-530/+535
* clk: meson: migrate the audio divider clock to clk_regmapJerome Brunet2018-03-133-68/+30
* clk: meson: migrate mplls clocks to clk_regmapJerome Brunet2018-03-135-354/+313
* clk: meson: add regmap helpers for parmJerome Brunet2018-03-131-0/+16
* clk: meson: migrate muxes to clk_regmapJerome Brunet2018-03-133-213/+184
* clk: meson: migrate dividers to clk_regmapJerome Brunet2018-03-133-159/+142
* clk: meson: migrate gates to clk_regmapJerome Brunet2018-03-135-195/+206
* clk: meson: add regmap to the clock controllersJerome Brunet2018-03-134-12/+52
* clk: meson: remove superseded aoclk_gate_regmapJerome Brunet2018-03-132-56/+0
* clk: meson: switch gxbb ao_clk to clk_regmapJerome Brunet2018-03-134-12/+12
* clk: meson: add regmap clocksJerome Brunet2018-03-134-0/+282
* clk: meson: remove obsolete commentsJerome Brunet2018-03-133-12/+0
* clk: meson: only one loop index is necessary in probeJerome Brunet2018-03-133-15/+14
* clk: meson: use devm_of_clk_add_hw_providerJerome Brunet2018-03-133-6/+7
* clk: meson: use dev pointer where possibleJerome Brunet2018-03-132-5/+5
* clk: meson: add axg misc bit to the mpll driverJerome Brunet2018-02-123-0/+28
* clk: meson: axg: fix the od shift of the sys_pllYixun Lan2018-02-121-1/+1
* clk: meson: axg: add the fractional part of the fixed_pllJerome Brunet2018-02-121-0/+5
* clk: meson: gxbb: add the fractional part of the fixed_pllJerome Brunet2018-02-121-0/+5
* clk: meson: fix rate calculation of plls with a fractional partJerome Brunet2018-02-123-3/+15
* clk: meson: add the gxl hdmi pllJerome Brunet2018-02-121-2/+48
* clk: meson: add od3 to the pll driverJerome Brunet2018-02-123-3/+23
* clk: meson: use the frac parameter width instead of a constantJerome Brunet2018-02-121-1/+1
* clk: meson: remove unnecessary rounding in the pll clockJerome Brunet2018-02-121-8/+9
* clk: meson: remove useless pll rate params tablesJerome Brunet2018-02-122-188/+0
* clk: meson: check pll rate param table before using itJerome Brunet2018-02-121-0/+10
* clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()weiyongjun (A)2018-01-101-0/+2
* Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into...Stephen Boyd2018-01-021-1/+1
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| * clk: meson: mpll: use 64-bit maths in params_from_rateMartin Blumenstingl2017-12-231-1/+1
* | clk: meson-axg: make local symbol axg_gp0_params_table staticweiyongjun (A)2017-12-281-1/+1
* | clk: meson-axg: fix return value check in axg_clkc_probe()weiyongjun (A)2017-12-281-1/+1
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* clk: meson-axg: add clock controller driversQiufang Dai2017-12-144-0/+1071
* clk: meson: make the spinlock naming more specificYixun Lan2017-12-143-69/+69
* clk: meson: gxbb: remove IGNORE_UNUSED from mmc clocksJerome Brunet2017-12-081-13/+3
* clk: meson: gxbb: fix wrong clock for SARADC/SANAYixun Lan2017-11-271-2/+2
* clk: meson: gxbb: Add VPU and VAPB clocks dataNeil Armstrong2017-10-201-0/+292
* clk: meson: gxbb: Add VPU and VAPB clockidsNeil Armstrong2017-10-201-1/+5
* Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into cl...Stephen Boyd2017-08-2310-251/+685
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| * clk: meson: gxbb-aoclk: Add CEC 32k clockNeil Armstrong2017-08-044-2/+231
| * clk: meson: gxbb-aoclk: Switch to regmap for register accessNeil Armstrong2017-08-044-23/+95
| * clk: meson: gxbb: Add sd_emmc clk0 clocksJerome Brunet2017-08-041-0/+177
| * clk: meson: gxbb: fix clk_mclk_i958 divider flagsJerome Brunet2017-08-041-3/+4
| * clk: meson: gxbb: fix meson cts_amclk divider flagsJerome Brunet2017-08-041-1/+2
| * clk: meson: meson8b: register the built-in reset controllerMartin Blumenstingl2017-08-043-13/+156
| * clk: meson: gxbb: Add sd_emmc clk0 clkidsJerome Brunet2017-08-041-2/+8
| * clk: meson-gxbb: expose almost every clock in the bindingsJerome Brunet2017-08-041-110/+7