| Commit message (Expand) | Author | Age | Files | Lines |
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| * | clk: tegra: Do not warn unnecessarily | Thierry Reding | 2019-06-25 | 1 | -2/+3 |
| * | clk: tegra210: fix PLLU and PLLU_OUT1 | JC Kuo | 2019-06-25 | 1 | -4/+4 |
* | | Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/... | Linus Torvalds | 2019-06-28 | 1 | -0/+2 |
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| * | | clk: tegra210: Fix default rates for HDA clocks | Jon Hunter | 2019-06-14 | 1 | -0/+2 |
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* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 2019-06-19 | 1 | -4/+1 |
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 | Thomas Gleixner | 2019-06-05 | 1 | -9/+1 |
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 | Thomas Gleixner | 2019-05-30 | 20 | -240/+20 |
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 | Thomas Gleixner | 2019-05-30 | 5 | -49/+5 |
* | | treewide: Add SPDX license identifier - Makefile/Kconfig | Thomas Gleixner | 2019-05-21 | 1 | -0/+1 |
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* | clk: Remove io.h from clk-provider.h | Stephen Boyd | 2019-05-15 | 4 | -0/+4 |
*-. | Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and... | Stephen Boyd | 2019-05-07 | 4 | -40/+77 |
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| | * | clk: tegra: divider: Mark Memory Controller clock as read-only | Dmitry Osipenko | 2019-04-25 | 1 | -1/+2 |
| | * | clk: tegra: emc: Replace BUG() with WARN_ONCE() | Dmitry Osipenko | 2019-04-25 | 1 | -1/+4 |
| | * | clk: tegra: emc: Fix EMC max-rate clamping | Dmitry Osipenko | 2019-04-25 | 1 | -7/+10 |
| | * | clk: tegra: emc: Support multiple RAM codes | Dmitry Osipenko | 2019-04-25 | 1 | -14/+23 |
| | * | clk: tegra: emc: Don't enable EMC clock manually | Dmitry Osipenko | 2019-04-25 | 1 | -2/+0 |
| | * | clk: tegra124: Remove lock-enable bit from PLLM | Dmitry Osipenko | 2019-04-25 | 1 | -2/+1 |
| | * | clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider | Dmitry Osipenko | 2019-04-25 | 1 | -2/+2 |
| | * | clk: tegra: Don't enable already enabled PLLs | Dmitry Osipenko | 2019-04-19 | 1 | -13/+37 |
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*-. | | Merge branches 'clk-sa', 'clk-aspeed', 'clk-samsung', 'clk-ingenic' and 'clk-... | Stephen Boyd | 2019-05-07 | 1 | -1/+1 |
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| * | | clk: tegra: Make tegra_clk_super_mux_ops static | YueHaibing | 2019-04-11 | 1 | -1/+1 |
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* / | clk: core: replace clk_{readl,writel} with {readl,writel} | Jonas Gorski | 2019-04-23 | 2 | -5/+5 |
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* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 2019-03-14 | 1 | -9/+9 |
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| *-. | Merge branches 'clk-qcom-msm8998', 'clk-fractional-parent', 'clk-x86-mv' and ... | Stephen Boyd | 2019-03-08 | 1 | -9/+9 |
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| | | * | clk: tegra: dfll: Fix debugfs_simple_attr.cocci warnings | YueHaibing | 2019-02-22 | 1 | -9/+9 |
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* | | | clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static | Wei Yongjun | 2019-02-18 | 1 | -1/+1 |
* | | | Merge tag 'tegra-for-5.1-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Arnd Bergmann | 2019-02-15 | 7 | -98/+913 |
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| * | | clk: tegra: dfll: build clk-dfll.c for Tegra124 and Tegra210 | Peter De Schrijver | 2019-02-06 | 2 | -1/+6 |
| * | | clk: tegra: dfll: add CVB tables for Tegra210 | Joseph Lo | 2019-02-06 | 2 | -0/+427 |
| * | | clk: tegra: dfll: round down voltages based on alignment | Joseph Lo | 2019-02-06 | 1 | -8/+13 |
| * | | clk: tegra: dfll: support PWM regulator control | Joseph Lo | 2019-02-06 | 1 | -67/+377 |
| * | | clk: tegra: dfll: CVB calculation alignment with the regulator | Joseph Lo | 2019-02-06 | 4 | -14/+59 |
| * | | clk: tegra: dfll: registration for multiple SoCs | Peter De Schrijver | 2019-02-06 | 1 | -11/+34 |
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* / | clk: tegra: dfll: Fix a potential Oop in remove() | Dan Carpenter | 2019-01-09 | 1 | -1/+3 |
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*-. | Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and '... | Stephen Boyd | 2018-12-14 | 10 | -32/+80 |
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| | * | clk: tegra: Return the exact clock rate from clk_round_rate | Robert Yang | 2018-12-14 | 1 | -3/+4 |
| | * | clk: tegra30: Use Tegra CPU powergate helper function | Jon Hunter | 2018-12-14 | 1 | -3/+3 |
| | * | clk: tegra: Fix maximum audio sync clock for Tegra124/210 | Jon Hunter | 2018-12-14 | 7 | -13/+37 |
| | * | clk: tegra: get rid of duplicate defines | Marcel Ziswiler | 2018-12-14 | 1 | -3/+0 |
| | * | clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC | Dmitry Osipenko | 2018-11-08 | 1 | -0/+10 |
| | * | clk: tegra20: Turn EMC clock gate into divider | Dmitry Osipenko | 2018-11-08 | 1 | -10/+26 |
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* / | clk: tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro | Yangtao Li | 2018-11-28 | 1 | -11/+1 |
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* | clk: tegra210: Include size.h for compilation ease | Stephen Boyd | 2018-10-16 | 1 | -0/+1 |
* | clk: tegra: Fixes for MBIST work around | Joseph Lo | 2018-10-16 | 1 | -3/+3 |
* | clk: tegra: probe deferral error reporting | Marcel Ziswiler | 2018-10-16 | 1 | -2/+6 |
*-. | Merge branches 'clk-imx6-ocram', 'clk-missing-put', 'clk-tegra-sdmmc-jitter',... | Stephen Boyd | 2018-08-14 | 8 | -40/+343 |
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| | * | clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks | Peter De-Schrijver | 2018-07-25 | 3 | -15/+12 |
| | * | clk: tegra: Add sdmmc mux divider clock | Peter De-Schrijver | 2018-07-25 | 3 | -0/+278 |
| | * | clk: tegra: Refactor fractional divider calculation | Peter De Schrijver | 2018-07-25 | 4 | -25/+52 |
| | * | clk: tegra: Fix includes required by fence_udelay() | Aapo Vienamo | 2018-07-25 | 1 | -0/+1 |
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