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* clk: sprd: add missing kfreeChunyan Zhang2019-10-071-0/+2
* clk: Make clk_bulk_get_all() return a valid "id"Bjorn Andersson2019-10-071-1/+4
* clk: imx: clk-pll14xx: unbypass PLL by defaultPeng Fan2019-10-071-0/+5
* clk: imx: pll14xx: avoid glitch when set ratePeng Fan2019-10-071-1/+21
* clk: at91: select parent if main oscillator or bypass is enabledEugen Hristev2019-10-071-3/+7
* clk: qcom: gcc-sdm845: Use floor ops for sdcc clksStephen Boyd2019-10-071-2/+2
* clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven2019-10-071-1/+2
* clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven2019-10-071-1/+2
* clk: zx296718: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-60/+49
* clk: sprd: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-2/+3
* clk: meson: axg-audio: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-2/+5
* clk: sirf: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-4/+8
* clk: actions: Don't reference clk_init_data after registrationStephen Boyd2019-10-071-2/+3
* clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocksIcenowy Zheng2019-10-071-0/+3
* clk: qoriq: Fix -Wunused-const-variableNathan Huckleberry2019-10-071-1/+1
* clk: imx8mq: Mark AHB clock as criticalAbel Vesa2019-10-071-1/+2
* clk: imx: imx8mm: fix audio pll settingPeng Fan2019-10-011-2/+2
* clk: rockchip: Don't yell about bad mmc phases when gettingDouglas Anderson2019-09-191-3/+1
* clk: Simplify debugfs printing and add a newlineStephen Boyd2019-09-191-19/+15
* clk: Fix debugfs clk_possible_parents for clks without parent string namesChen-Yu Tsai2019-09-191-3/+41
* clk: Fix potential NULL dereference in clk_fetch_parent_index()Martin Blumenstingl2019-09-101-1/+2
* clk: Fix falling back to legacy parent string matchingStephen Boyd2019-09-101-12/+34
* clk: samsung: exynos542x: Move MSCL subsystem clocks to its sub-CMUMarek Szyprowski2019-09-101-14/+34
* clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMUSylwester Nawrocki2019-09-101-11/+43
* clk: samsung: Change signature of exynos5_subcmus_init() functionSylwester Nawrocki2019-09-104-36/+49
* clk: socfpga: stratix10: fix rate caclulationg for cnt_clksDinh Nguyen2019-08-291-1/+1
* clk: renesas: cpg-mssr: Fix reset control race conditionGeert Uytterhoeven2019-08-251-14/+2
* clk: sprd: Select REGMAP_MMIO to avoid compile errorsChunyan Zhang2019-08-251-0/+1
* clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1Codrin Ciubotariu2019-08-251-0/+2
* clk: mediatek: mt8183: Register 13MHz clock earlier for clocksourceWeiyi Lu2019-08-061-12/+34
* clk: sprd: Add check for return value of sprd_clk_regmap_init()Chunyan Zhang2019-08-061-1/+4
* clk: tegra210: fix PLLU and PLLU_OUT1JC Kuo2019-08-061-4/+4
* clk: meson: mpll: properly handle spread spectrumJerome Brunet2019-08-062-3/+7
* clk: imx: imx8mm: correct audio_pll2_clk to audio_pll2_outPeng Fan2019-07-261-3/+3
* Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2019-06-287-13/+18
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| * clk: socfpga: stratix10: fix divider entry for the emac clocksDinh Nguyen2019-06-251-2/+2
| * clk: Do a DT parent lookup even when index < 0Stephen Boyd2019-06-171-1/+1
| * clk: tegra210: Fix default rates for HDA clocksJon Hunter2019-06-141-0/+2
| * Merge tag 'clk-meson-5.2-1-fixes' of https://github.com/BayLibre/clk-meson in...Stephen Boyd2019-06-123-8/+8
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| | * clk: meson: meson8b: fix a typo in the VPU parent names array variableMartin Blumenstingl2019-05-201-5/+5
| | * clk: meson: fix MPLL 50M binding id typoJerome Brunet2019-05-202-3/+3
| * | clk: ti: clkctrl: Fix returning uninitialized dataTony Lindgren2019-06-061-2/+5
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-1964-264/+64
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 460Thomas Gleixner2019-06-191-7/+1
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 459Thomas Gleixner2019-06-191-12/+1
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 445Thomas Gleixner2019-06-053-27/+3
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 441Thomas Gleixner2019-06-055-23/+5
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422Thomas Gleixner2019-06-055-20/+5
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401Thomas Gleixner2019-06-052-25/+2
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 372Thomas Gleixner2019-06-051-5/+1
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