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* clk: uniphier: Add SCSSI clock gate for each channelKunihiko Hayashi2020-02-241-5/+8
* clk: sunxi-ng: add mux and pll notifiers for A64 CPU clockIcenowy Zheng2020-02-241-1/+27
* clk: qcom: rcg2: Don't crash if our parent can't be found; return an errorDouglas Anderson2020-02-241-0/+3
* clk: tegra: Mark fuse clock as criticalStephen Warren2020-02-111-1/+5
* clk: mmp2: Fix the order of timer mux parentsLubomir Rintel2020-02-051-1/+1
* clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent orderSamuel Holland2020-02-051-2/+2
* clk: actions: Fix factor clk struct member accessManivannan Sadhasivam2020-01-271-4/+3
* clk: sunxi-ng: v3s: add the missing PLL_DDR1Icenowy Zheng2020-01-272-6/+19
* clk: qcom: Fix -Wunused-const-variableNathan Huckleberry2020-01-271-36/+0
* clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate registerOndrej Jirman2020-01-271-1/+1
* clk: meson: axg: spread spectrum is on mpll2Jerome Brunet2020-01-271-5/+5
* clk: meson: gxbb: no spread spectrum on mpll0Jerome Brunet2020-01-271-5/+0
* clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998Marc Gonzalez2020-01-271-1/+1
* clk: ingenic: jz4740: Fix gating of UDC clockPaul Cercueil2020-01-271-1/+1
* clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating itChen-Yu Tsai2020-01-271-1/+1
* clk: dove: fix refcount leak in dove_clk_init()Yangtao Li2020-01-271-2/+6
* clk: mv98dx3236: fix refcount leak in mv98dx3236_clk_init()Yangtao Li2020-01-271-1/+3
* clk: armada-xp: fix refcount leak in axp_clk_init()Yangtao Li2020-01-271-1/+3
* clk: kirkwood: fix refcount leak in kirkwood_clk_init()Yangtao Li2020-01-271-0/+2
* clk: armada-370: fix refcount leak in a370_clk_init()Yangtao Li2020-01-271-1/+3
* clk: vf610: fix refcount leak in vf610_clocks_init()Yangtao Li2020-01-271-0/+1
* clk: imx7d: fix refcount leak in imx7d_clocks_init()Yangtao Li2020-01-271-0/+1
* clk: imx6sx: fix refcount leak in imx6sx_clocks_init()Yangtao Li2020-01-271-0/+1
* clk: imx6q: fix refcount leak in imx6q_clocks_init()Yangtao Li2020-01-271-0/+1
* clk: samsung: exynos4: fix refcount leak in exynos4_get_xom()Yangtao Li2020-01-271-0/+1
* clk: socfpga: fix refcount leakYangtao Li2020-01-272-0/+2
* clk: ti: fix refcount leak in ti_dt_clocks_register()Yangtao Li2020-01-271-2/+6
* clk: qoriq: fix refcount leak in clockgen_init()Yangtao Li2020-01-271-0/+1
* clk: highbank: fix refcount leak in hb_clk_init()Yangtao Li2020-01-271-0/+1
* clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_...Baolin Wang2020-01-231-1/+1
* clk: Don't try to enable critical clocks if prepare failedGuenter Roeck2020-01-231-2/+8
* clk: qcom: gcc-sdm845: Add missing flag to votable GDSCsGeorgi Djakov2020-01-231-0/+7
* clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/re...Marian Mihailescu2020-01-171-0/+2
* clk: pxa: fix one of the pxa RTC clocksRobert Jarzmik2020-01-041-0/+1
* clk: clk-gpio: propagate rate change to parentMichael Hennerich2020-01-041-1/+1
* clk: qcom: Allow constant ratio freq tables for rcgJeffrey Hugo2020-01-042-0/+5
* clk: renesas: rcar-gen3: Set state when registering SD clocksNiklas Söderlund2019-12-131-12/+4
* clk: qcom: gcc-msm8998: Disable halt check of UFS clocksBjorn Andersson2019-12-131-3/+3
* clk: renesas: r8a77995: Correct parent clock of DUGeert Uytterhoeven2019-12-131-2/+2
* clk: renesas: r8a77990: Correct parent clock of DUTakeshi Kihara2019-12-131-2/+2
* clk: qcom: Fix MSM8998 resetsJeffrey Hugo2019-12-131-19/+19
* clk: sunxi-ng: h3/h5: Fix CSI_MCLK parentChen-Yu Tsai2019-12-131-1/+1
* clk: meson: meson8b: fix the offset of vid_pll_dco's N valueMartin Blumenstingl2019-12-131-1/+1
* clk: mediatek: Drop more __init markings for driver probeStephen Boyd2019-12-131-2/+2
* clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()Stephen Boyd2019-12-131-4/+4
* clk: meson: Fix GXL HDMI PLL fractional bits widthNeil Armstrong2019-12-131-1/+7
* clk: rockchip: fix I2S1 clock gate register for rk3328Katsuhiro Suzuki2019-12-131-1/+1
* clk: rockchip: fix rk3188 sclk_mac_lbtest parameter orderingHeiko Stuebner2019-12-131-2/+2
* clk: rockchip: fix rk3188 sclk_smc gate dataFinley Xiao2019-12-131-2/+2
* clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki2019-12-131-1/+1