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| | | * | clk: imx: gate2: Add cgr_mask for more flexible number of control bitsAbel Vesa2020-11-032-18/+22
| | | * | clk: imx: gate2: Check if clock is enabled against cgr_valAbel Vesa2020-11-031-3/+3
| | | * | clk: imx: gate2: Keep the register writing in on placeAbel Vesa2020-11-031-17/+16
| | | * | clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special caseAbel Vesa2020-11-032-25/+8
| | | * | clk: imx: scu: fix build break when compiled as modulesDong Aisheng2020-11-031-2/+2
| | | * | clk: imx: remove redundant assignment to pointer npColin Ian King2020-11-011-1/+1
| | | * | clk: imx: remove unneeded semicolonTom Rix2020-11-011-1/+1
| | | * | clk: imx: lpcg: add suspend/resume supportDong Aisheng2020-10-263-0/+39
| | | * | clk: imx: clk-imx8qxp-lpcg: add runtime pm supportDong Aisheng2020-10-261-5/+19
| | | * | clk: imx: lpcg: allow lpcg clk to take device pointerDong Aisheng2020-10-262-8/+24
| | | * | clk: imx: imx8qxp-lpcg: add parsing clocks from device treeDong Aisheng2020-10-263-0/+133
| | | * | clk: imx: scu: add suspend/resume supportDong Aisheng2020-10-261-0/+49
| | | * | clk: imx: scu: add runtime pm supportDong Aisheng2020-10-261-2/+20
| | | * | clk: imx: scu: allow scu clk to take device pointerDong Aisheng2020-10-262-8/+10
| | | * | clk: imx: scu: bypass cpu power domainsDong Aisheng2020-10-261-0/+4
| | | * | clk: imx: scu: add two cells binding supportDong Aisheng2020-10-263-67/+252
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| | * | clk: tegra: Fix duplicated SE clock entryDmitry Osipenko2020-12-102-1/+2
| | * | clk: tegra: bpmp: Clamp clock rates on requestsSivaram Nair2020-11-261-3/+3
| | * | clk: tegra: Do not return 0 on failureNicolin Chen2020-11-201-2/+2
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| *-------. \ Merge branches 'clk-amlogic', 'clk-rockchip', 'clk-of', 'clk-freescale' and '...Stephen Boyd2020-12-2023-47/+1199
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| | | | | | * clk: scpi: mark scpi_clk_match as maybe unusedKrzysztof Kozlowski2020-12-101-1/+1
| | | | | | * clk: pwm: drop of_match_ptr from of_device_id tableKrzysztof Kozlowski2020-12-101-1/+1
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| | | | | * clk: fsl-flexspi: new driverMichael Walle2020-12-073-0/+115
| | | | | * clk: divider: add devm_clk_hw_register_divider_table()Michael Walle2020-12-071-0/+34
| | | | | * clk: qoriq: provide constants for the typeMichael Walle2020-12-071-6/+7
| | | | | * clk: fsl-sai: use devm_clk_hw_register_composite_pdata()Michael Walle2020-12-071-19/+7
| | | | | * clk: composite: add devm_clk_hw_register_composite_pdata()Michael Walle2020-12-071-0/+50
| | | | | * clk: fsl-sai: fix memory leakMichael Walle2020-12-071-0/+12
| | | | | * clk: qoriq: Add platform dependenciesGeert Uytterhoeven2020-12-071-1/+2
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| | | * | clk: rockchip: fix i2s gate bits on rk3066 and rk3188Johan Jonker2020-11-291-3/+4
| | | * | clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocksJohan Jonker2020-11-291-14/+14
| | | * | clk: rockchip: Remove redundant null check before clk_prepare_enableXu Wang2020-11-291-2/+1
| | | * | clk: rockchip: Add appropriate arch dependenciesRobin Murphy2020-10-261-1/+11
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| | * | clk: meson: g12a: add MIPI DSI Host Pixel ClockNeil Armstrong2020-11-262-1/+76
| | * | clk: meson: enable building as modulesKevin Hilman2020-11-239-9/+34
| | * | clk: meson: Kconfig: fix dependency for G12AKevin Hilman2020-11-231-0/+1
| | * | clk: meson: axg: add MIPI DSI Host clockNeil Armstrong2020-11-232-1/+69
| | * | clk: meson: axg: add Video ClocksNeil Armstrong2020-11-232-1/+773
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| *-------. \ \ Merge branches 'clk-doc', 'clk-qcom', 'clk-simplify', 'clk-hw', 'clk-renesas'...Stephen Boyd2020-12-2025-317/+4456
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| | | | | | * clk: samsung: Prevent potential endless loop in the PLL opsSylwester Nawrocki2020-11-231-76/+71
| | | | | | * clk: samsung: Allow compile testing of Exynos, S3C64xx and S5Pv210Krzysztof Kozlowski2020-11-232-13/+76
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| | | | | * clk: renesas: sh73a0: Stop using __raw_*() I/O accessorsGeert Uytterhoeven2020-12-101-1/+1
| | | | | * clk: renesas: r8a774c0: Add RPC clocksLad Prabhakar2020-12-103-0/+42
| | | | | * clk: renesas: r8a779a0: Fix R and OSC clocksGeert Uytterhoeven2020-12-101-3/+10
| | | | | * clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_privKrzysztof Kozlowski2020-12-101-1/+2
| | | | | * clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get()Yejune Deng2020-12-101-1/+1
| | | | | * clk: renesas: r8a774b1: Add RPC clocksBiju Das2020-12-101-0/+8
| | | | | * clk: renesas: r8a774a1: Add RPC clocksBiju Das2020-12-101-0/+8
| | | | | * clk: renesas: r8a779a0: Add VIN clocksJacopo Mondi2020-12-101-0/+32
| | | | | * clk: renesas: r8a779a0: Add CSI4[0-3] clocksJacopo Mondi2020-12-101-0/+4
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