summaryrefslogtreecommitdiffstats
path: root/drivers/clk
Commit message (Collapse)AuthorAgeFilesLines
* clk: clk-divider: fix divisor > 255 bugJames Hogan2014-01-081-1/+1
| | | | | | | | | | | | | | | | | | Commit 6d9252bd9a4bb (clk: Add support for power of two type dividers) merged in v3.6 added the _get_val function to convert a divisor value to a register field value depending on the flags. However it used the type u8 for the div field, causing divisors larger than 255 to be masked and the resultant clock rate to be too high. E.g. in my case an 11bit divider was supposed to divide 24.576 MHz down to 32.768KHz. The divisor was correctly calculated as 750 (0x2ee). This was masked to 238 (0xee) resulting in a frequency of 103.26KHz. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: linux-arm-kernel@lists.infradead.org Cc: stable@vger.kernel.org Signed-off-by: Mike Turquette <mturquette@linaro.org>
* Merge tag 'samsung-clk-fixes' of ↵Mike Turquette2014-01-053-11/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-fixes Samsung Clock fixes for 3.13-rc7 * Several patches fixing up incorrectly defined register addresses and bitfield offsets that could lead to undefined operation when accessing respective registers or bitfields. 1) clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks 2a) clk: samsung: exynos5250: Fix ACP gate register offset 2b) clk: samsung: exynos5250: Add MDMA0 clocks 2c) ARM: dts: exynos5250: Fix MDMA0 clock number 3) clk: samsung: exynos4: Correct SRC_MFC register All three issues have been present since Exynos5250 and Exynos4 clock drivers were added by commits 6e3ad26816b72 ("clk: exynos5250: register clocks using common clock framework") and e062b571777f5 ("clk: exynos4: register clocks using common clock framework") respectively. * Patch to fix automatic disabling of Exynos5250 sysreg clock that could cause undefined operation of several peripherals, such as USB, I2C, MIPI or display block. 4) clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clock Present since Exynos5250 clock drivers was added by commits 6e3ad26816b72 ("clk: exynos5250: register clocks using common clock framework"). * Patch fixing compilation warning in clk-exynos-audss driver when CONFIG_PM_SLEEP is disabled. 5) clk: exynos: File scope reg_save array should depend on PM_SLEEP Present since the driver was added by commit 1241ef94ccc3 ("clk: samsung: register audio subsystem clocks using common clock framework").
| * clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski2013-12-301-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Move reg_save[] into CONFIG_PM_SLEEP dependency block as it is used only by suspend and resume functions. This fixes the warning on CONFIG_PM_SLEEP=n: drivers/clk/samsung/clk-exynos-audss.c:29:22: warning: ‘reg_save’ defined but not used [-Wunused-variable] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan2013-12-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The sysreg (system register) generates control signals for various blocks like disp1blk, i2c, mipi, usb etc. However, it gets disabled as an unused clock at boot-up. This can lead to failures in operation of above blocks, because they can not be configured properly if this clock is disabled. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan2013-12-301-1/+4
| | | | | | | | | | | | | | | | | | | | | | Adds gate clock for MDMA0 on Exynos5250 SoC. This is needed to ensure that the clock is enabled when MDMA0 is used on systems on which firmware gates the clockby default. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan2013-12-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The CLK_GATE_IP_ACP register offset is incorrectly listed making definition of g2d clock incorrect, which may lead to system failures when trying to use G2D on systems on which firmware gates this clock by default. Fix this and the register ordering as well. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker2013-12-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | The gate clocks for the MFC sysmmus appear to be flipped, i.e. GATE_IP_MFC[2] gates sysmmu_mfcl and GATE_IP_MFC[1] gates sysmmu_mfcr. Fix this so that the MFC will start up. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| * clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim2013-12-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | The SRC_MFC register offset was incorrect, which could cause have caused wrong calculation of rate of sclk_mfc clock, that could in turn lead to incorrect operation of MFC. This patch corrects it. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description] Signed-off-by: Tomasz Figa <t.figa@samsung.com>
* | mfd: s2mps11: Fix build after regmap field rename in sec-core.cKrzysztof Kozlowski2013-12-161-3/+3
|/ | | | | | | | | | | Fix building of s2mps11 regulator and clock drivers after renaming regmap field in struct sec_pmic_dev in commit: - "mfd/rtc: s5m: Fix register updating by adding regmap for RTC" Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2013-11-151-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree updates from Jiri Kosina: "Usual earth-shaking, news-breaking, rocket science pile from trivial.git" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits) doc: usb: Fix typo in Documentation/usb/gadget_configs.txt doc: add missing files to timers/00-INDEX timekeeping: Fix some trivial typos in comments mm: Fix some trivial typos in comments irq: Fix some trivial typos in comments NUMA: fix typos in Kconfig help text mm: update 00-INDEX doc: Documentation/DMA-attributes.txt fix typo DRM: comment: `halve' -> `half' Docs: Kconfig: `devlopers' -> `developers' doc: typo on word accounting in kprobes.c in mutliple architectures treewide: fix "usefull" typo treewide: fix "distingush" typo mm/Kconfig: Grammar s/an/a/ kexec: Typo s/the/then/ Documentation/kvm: Update cpuid documentation for steal time and pv eoi treewide: Fix common typo in "identify" __page_to_pfn: Fix typo in comment Correct some typos for word frequency clk: fixed-factor: Fix a trivial typo ...
| * clk: fixed-factor: Fix a trivial typoEzequiel Garcia2013-10-141-1/+1
| | | | | | | | | | | | | | Just a trivial print message typo fix. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | Merge tag 'devicetree-for-3.13' of ↵Linus Torvalds2013-11-121-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DeviceTree updates for 3.13. This is a bit larger pull request than usual for this cycle with lots of clean-up. - Cross arch clean-up and consolidation of early DT scanning code. - Clean-up and removal of arch prom.h headers. Makes arch specific prom.h optional on all but Sparc. - Addition of interrupts-extended property for devices connected to multiple interrupt controllers. - Refactoring of DT interrupt parsing code in preparation for deferred probe of interrupts. - ARM cpu and cpu topology bindings documentation. - Various DT vendor binding documentation updates" * tag 'devicetree-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (82 commits) powerpc: add missing explicit OF includes for ppc dt/irq: add empty of_irq_count for !OF_IRQ dt: disable self-tests for !OF_IRQ of: irq: Fix interrupt-map entry matching MIPS: Netlogic: replace early_init_devtree() call of: Add Panasonic Corporation vendor prefix of: Add Chunghwa Picture Tubes Ltd. vendor prefix of: Add AU Optronics Corporation vendor prefix of/irq: Fix potential buffer overflow of/irq: Fix bug in interrupt parsing refactor. of: set dma_mask to point to coherent_dma_mask of: add vendor prefix for PHYTEC Messtechnik GmbH DT: sort vendor-prefixes.txt of: Add vendor prefix for Cadence of: Add empty for_each_available_child_of_node() macro definition arm/versatile: Fix versatile irq specifications. of/irq: create interrupts-extended property microblaze/pci: Drop PowerPC-ism from irq parsing of/irq: Create of_irq_parse_and_map_pci() to consolidate arch code. of/irq: Use irq_of_parse_and_map() ...
| * | powerpc: add missing explicit OF includes for ppcRob Herring2013-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b5b4bb3f6a11f9 (of: only include prom.h on sparc) removed implicit includes of of_*.h headers by powerpc's prom.h. Some components were missed in initial clean-up patch, so add the necessary includes to fix powerpc builds. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Tejun Heo <tj@kernel.org> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-ide@vger.kernel.org Cc: linux-crypto@vger.kernel.org
* | | Merge tag 'clk-for-linus-3.13' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-11-1210-29/+1238
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull clock framework changes from Mike Turquette: "The clock changes for 3.13 are an even mix of framework improvements & bug fixes along with updates to existing clock drivers and the additional of new clock drivers" * tag 'clk-for-linus-3.13' of git://git.linaro.org/people/mturquette/linux: clk: new driver for efm32 SoC clk: of: helper for determining number of parent clocks clk/zynq: Fix possible memory leak clk: keystone: Build Keystone clock drivers clk: keystone: Add gate control clock driver clk: keystone: add Keystone PLL clock driver Documentation: Add documentation for APM X-Gene clock binding clk: arm64: Add DTS clock entry for APM X-Gene Storm SoC clk: Add APM X-Gene SoC clock driver clk: wm831x: get rid of the implementation of remove function clk: Correct lookup logic in clk_fetch_parent_index() clk: Use kcalloc() to allocate arrays clk: Add error handling to clk_fetch_parent_index()
| * | | clk: new driver for efm32 SoCUwe Kleine-König2013-11-042-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the clocks provided by the Clock Management Unit of Energy Micro's efm32 Giant Gecko SoCs including device tree bindings. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: of: helper for determining number of parent clocksMike Turquette2013-10-071-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Walks the "clocks" array of parent clock phandles and returns the number. Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk/zynq: Fix possible memory leakFelipe Pena2013-10-071-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The zynq_clk_register_fclk function can leak memory (fclk_lock) when unable to alloc memory for fclk_gate_lock Signed-off-by: Felipe Pena <felipensp@gmail.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: keystone: Build Keystone clock driversSantosh Shilimkar2013-10-073-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now build the keystone common clock drivers. The build is made conditional based on COMMON_CLK_KEYSTONE Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: keystone: Add gate control clock driverSantosh Shilimkar2013-10-071-0/+264
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the driver for the clock gate control which uses PSC (Power Sleep Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and disabling of the clocks for different IPs present in the SoC. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: keystone: add Keystone PLL clock driverSantosh Shilimkar2013-10-071-0/+305
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the driver for the PLL IPs found on Keystone 2 devices. The PLL IP typically has a multiplier, a divider and a post-divider. The PLL IPs like ARMPLL, DDRPLL and PAPLL are controlled by the memory mapped register where as the Main PLL is controlled by a PLL controller and memory map registers. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: Add APM X-Gene SoC clock driverLoc Ho2013-10-073-0/+529
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: Add APM X-Gene SoC clock driver for reference, PLL, and device clocks. Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Kumar Sankaran <ksankaran@apm.com> Signed-off-by: Vinayak Kale <vkale@apm.com> Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: wm831x: get rid of the implementation of remove functionLaxman Dewangan2013-10-021-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The remove function implemented for platform driver's remove callback just return 0 as part of its implementation. Remove this APIs and do not pass the valid .remove for platform driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: Correct lookup logic in clk_fetch_parent_index()Tomasz Figa2013-10-011-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function is supposed to iterate over all parents of given child clock to find the index of given parent clock in its parent list, using parent cache if possible and falling back to string compare otherwise. However currently the logic falls back to string compare in every iteration in which clock cache entry does not match given parent, due to wrong check conditions. This patch corrects the logic to continue the loop if parent cache entry is present and does not match requested parent clock. In addition, redundant checks for parent cache array presence are removed, because it is always allocated in the beginning of the function. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: Use kcalloc() to allocate arraysTomasz Figa2013-10-011-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of calculating sizes of arrays manually, kcalloc() can be used to allocate arrays of elements with defined size. This is just a cleanup patch without any functional changes. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: Add error handling to clk_fetch_parent_index()Tomasz Figa2013-10-011-11/+14
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are at least two different error cases that can happen in clk_fetch_parent_index() function: - allocation failure, - parent clock lookup failure, however it returns only an u8, which is supposed to contain parent clock index. This patch modified the function to return full int instead allowing positive clock indices and negative error codes to be returned. All users of this function are adjusted as well to handle the return value correctly. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | Merge tag 'dt-for-linus' of ↵Linus Torvalds2013-11-113-1/+561
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "Most of this branch consists of updates, additions and general churn of the device tree source files in the kernel (arch/arm/boot/dts). Besides that, there are a few things to point out: - Lots of platform conversion on OMAP2+, with removal of old board files for various platforms. - Final conversion of a bunch of ux500 (ST-Ericsson) platforms as well - Some updates to pinctrl and other subsystems. Most of these are for DT-enablement of the various platforms and acks have been collected" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (385 commits) ARM: dts: bcm11351: Use GIC/IRQ defines for sdio interrupts ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx) ARM: dts: bcm281xx: Add card detect GPIO ARM: dts: rename ARCH_BCM to ARCH_BCM_MOBILE (dt) ARM: bcm281xx: Add device node for the GPIO controller ARM: mvebu: Add Netgear ReadyNAS 104 board ARM: tegra: fix Tegra114 IOMMU register address ARM: kirkwood: add support for OpenBlocks A7 platform ARM: dts: omap4-panda: add DPI pinmuxing ARM: dts: AM33xx: Add RNG node ARM: dts: AM33XX: Add hwspinlock node ARM: dts: OMAP5: Add hwspinlock node ARM: dts: OMAP4: Add hwspinlock node ARM: dts: use 'status' property for PCIe nodes ARM: dts: sirf: add missed address-cells and size-cells for prima2 I2C ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts ARM: mvebu: Add the core-divider clock to Armada 370/XP ...
| * \ \ Merge tag 'ux500-dt-for-v3.13-3' of ↵Olof Johansson2013-10-271-1/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt From Linus Walleij: Five incremental device tree patches around the clock handling, and adding SSP/SPI devices to the device tree. * tag 'ux500-dt-for-v3.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: register all SSP and SPI blocks ARM: ux500: fix I2C4 clock bit ARM: ux500: fix clock for GPIO blocks 6 and 7 clk: ux500: fix erroneous bit assignment ARM: ux500: fix clock for GPIO block 8 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | clk: ux500: fix erroneous bit assignmentLinus Walleij2013-10-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to a typo or similar, the peripheral group 2 clock 11 gate was set to bit 1 instead of bit 11. We need to fix this to be able to set the correct enable bit in the device tree: when trying to correct the bit assignment in the device tree, the system would hang. Cc: Mike Turquette <mturquette@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge tag 'ux500-dt-for-v3.13-2' of ↵Olof Johansson2013-09-303-1/+561
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt From Linus Walleij: This is a huge device tree and ATAG removal series for ux500: - Move all the clock definitions over to the device tree - Remove all now-redundant AUXDATA and make the ux500 device tree only * tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (92 commits) ARM: ux500: delete devices-common remnants clk: ux500: Provide a look-up for the ARMSS clock ARM: ux500: Enable CPUFreq on Snowball ARM: ux500: Provide a Device Tree node for CPUFreq in the DBx500 ARM: ux500: Provide a clock lookup for the Hash driver ARM: ux500: Provide a clock lookup for the Crypto driver ARM: ux500: Fix trivial white-space error in the DBX500 DTSI file ARM: ux500: Remove ATAG booting support for Snowball ARM: ux500: Remove ATAG booting support for HREF ARM: ux500: Remove ATAG booting support for U8520 ARM: ux500: Remove ATAG booting support for MOP500 ARM: ux500: Purge UIB framework when booting with ATAGs ARM: ux500: Take out STUIB support when not booting with Device Tree ARM: ux500: Remove BU21013 ROHM TS support when booting with only ATAGs ARM: ux500: Don't register the STMPE/SKE when booting with ATAG support ARM: ux500: Delete U8500 UIB support when booting with ATAGs ARM: ux500: Don't register Synaptics RMI4 TS when booting with ATAGs ARM: ux500: Purge DB8500 PRCMU registration when not booting with DT ARM: ux500: Stop requesting the SoC device to play 'parent' role ARM: ux500: Remove UART support when booting without Device Tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | clk: ux500: Provide a look-up for the ARMSS clockLee Jones2013-09-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARMSS clock is used by the newly DT enabled CPUFreq driver. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Add Device Tree support for the TWD clockLee Jones2013-09-261-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the TWD fixed factor clock to be specified from Device Tree via phandles to the "smp-twd-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Add Device Tree support for the RTC clockLee Jones2013-09-261-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the RTC fixed frequency clock to be specified from Device Tree via phandles to the "rtc32k-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Add Device Tree support for the PRCC Kernel clockLee Jones2013-09-261-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables clocks to be specified from Device Tree via phandles to the "prcc-kernel-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Add Device Tree support for the PRCC Peripheral clockLee Jones2013-09-261-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables clocks to be specified from Device Tree via phandles to the "prcc-periph-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Add Device Tree support for the PRCMU clockLee Jones2013-09-261-2/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables clocks to be specified from Device Tree via phandles to the "prcmu-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Add a 2-cell Device Tree parser for obtaining PRCC clocksLee Jones2013-09-261-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PRCC (peripheral and kernel) clocks are specified using a property tuple <&phandle base bit>, where 'base' is the peripheral (1, 2, 3, 5 or 6), and bit is read-in value into that peripheral stipulated by the hardware specification. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Provide u8500_clk with skeleton Device Tree supportLee Jones2013-09-261-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functional components will be added on a per-clock basis. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Copy u8500_clk_init() ready for DT enablementLee Jones2013-09-262-0/+382
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here we're using the old clock initialisation function as a template. It's necessary to remove all of the clk_register_clkdev() calls as they don't make sense when booting with Device Tree. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | clk: ux500: Remove BML8580 clockLee Jones2013-09-261-1/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no mention of the PRCMU_BML8580CLK in any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT] 0x108 instead of the correct value 0x04C). Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | | Merge tag 'soc-for-linus' of ↵Linus Torvalds2013-11-111-2/+0
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "New and updated SoC support. Among the things new for this release are: - More support for the AM33xx platforms from TI - Tegra 124 support, and some updates to older tegra families as well - imx cleanups and updates across the board - A rename of Broadcom's Mobile platforms which were introduced as ARCH_BCM, and turned out to be too broad a name. New name is ARCH_BCM_MOBILE. - A whole bunch of updates and fixes for integrator, making the platform code more modern and switches over to DT-only booting. - Support for two new Renesas shmobile chipsets. Next up for them is more work on consolidation instead of introduction of new non-multiplatform SoCs, we're all looking forward to that! - Misc cleanups for older Samsung platforms, some Allwinner updates, etc" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (159 commits) ARM: bcm281xx: Add ARCH_BCM_MOBILE to bcm config ARM: bcm_defconfig: Run "make savedefconfig" ARM: bcm281xx: Add ARCH Timers to config rename ARCH_BCM to ARCH_BCM_MOBILE (mach-bcm) ARM: vexpress: Enable platform-specific options in defconfig ARM: vexpress: Make defconfig work again ARM: sunxi: remove .init_time hooks ARM: imx: enable suspend for imx6sl ARM: imx: ensure dsm_request signal is not asserted when setting LPM ARM: imx6q: call WB and RBC configuration from imx6q_pm_enter() ARM: imx6q: move low-power code out of clock driver ARM: imx: drop extern with function prototypes in common.h ARM: imx: reset core along with enable/disable operation ARM: imx: do not return from imx_cpu_die() call ARM: imx_v6_v7_defconfig: Select CONFIG_PROVE_LOCKING ARM: imx_v6_v7_defconfig: Enable LEDS_GPIO related options ARM: mxs_defconfig: Turn off CONFIG_DEBUG_GPIO ARM: imx: replace imx6q_restart() with mxc_restart() ARM: mach-imx: mm-imx5: Retrieve iomuxc base address from dt ARM: mach-imx: mm-imx5: Retrieve tzic base address from dt ...
| * \ \ \ Merge branch 'cleanup/dt-clock' into next/socOlof Johansson2013-10-288-150/+155
| |\ \ \ \ | | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merging in dt clock cleanup as a pre-req with some of the later SoC branches. There are a handful of conflicts here -- some of the already merged SoC branches should have been based on the cleanup but weren't. In particular, a remove/add of include on highbank and two remove/remove conflicts on kirkwood were fixed up. * cleanup/dt-clock: (28 commits) ARM: vt8500: remove custom .init_time hook ARM: vexpress: remove custom .init_time hook ARM: tegra: remove custom .init_time hook ARM: sunxi: remove custom .init_time hook ARM: sti: remove custom .init_time hook ARM: socfpga: remove custom .init_time hook ARM: rockchip: remove custom .init_time hook ARM: prima2: remove custom .init_time hook ARM: nspire: remove custom .init_time hook ARM: nomadik: remove custom .init_time hook ARM: mxs: remove custom .init_time hook ARM: kirkwood: remove custom .init_time hook ARM: imx: remove custom .init_time hook ARM: highbank: remove custom .init_time hook ARM: exynos: remove custom .init_time hook ARM: dove: remove custom .init_time hook ARM: bcm2835: remove custom .init_time hook ARM: bcm: provide common arch init for DT clocks ARM: call of_clk_init from default time_init handler ARM: vt8500: prepare for arch-wide .init_time callback ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: S3C64XX: Migrate clock handling to Common Clock FrameworkTomasz Figa2013-09-171-2/+0
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | This patch migrates the s3c64xx platform to use the new clock driver using Common Clock Framework. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | Merge tag 'cleanup-for-linus' of ↵Linus Torvalds2013-11-118-163/+147
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Olof Johansson: "This branch contains code cleanups, moves and removals for 3.13. Qualcomm msm targets had a bunch of code removal for legacy non-DT platforms. Nomadik saw more device tree conversions and cleanup of old code. Tegra has some code refactoring, etc. One longish patch series from Sebastian Hasselbarth changes the init_time hooks and tries to use a generic implementation for most platforms, since they were all doing more or less the same things. Finally the "shark" platform is removed in this release. It's been abandoned for a while and nobody seems to care enough to keep it around. If someone comes along and wants to resurrect it, the removal can easily be reverted and code brought back. Beyond this, mostly a bunch of removals of stale content across the board, etc" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (79 commits) ARM: gemini: convert to GENERIC_CLOCKEVENTS ARM: EXYNOS: remove CONFIG_MACH_EXYNOS[4, 5]_DT config options ARM: OMAP3: control: add API for setting IVA bootmode ARM: OMAP3: CM/control: move CM scratchpad save to CM driver ARM: OMAP3: McBSP: do not access CM register directly ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock ARM: OMAP2: CM/PM: remove direct register accesses outside CM code MAINTAINERS: Add patterns for DTS files for AT91 ARM: at91: remove init_machine() as default is suitable ARM: at91/dt: split sama5d3 peripheral definitions ARM: at91/dt: split sam9x5 peripheral definitions ARM: Remove temporary sched_clock.h header ARM: clps711x: Use linux/sched_clock.h MAINTAINERS: Add DTS files to patterns for Samsung platform ARM: EXYNOS: remove unnecessary header inclusions from exynos4/5 dt machine file ARM: tegra: fix ARCH_TEGRA_114_SOC select sort order clk: nomadik: fix missing __init on nomadik_src_init ARM: drop explicit selection of HAVE_CLK and CLKDEV_LOOKUP ARM: S3C64XX: Kill CONFIG_PLAT_S3C64XX ASoC: samsung: Use CONFIG_ARCH_S3C64XX to check for S3C64XX support ...
| * | | | clk: nomadik: fix missing __init on nomadik_src_initSebastian Hesselbarth2013-10-071-1/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | nomadik_src_init references __initconst sections but lacks an __init itself. Add __init to fix the section mismatch. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: mxs: remove custom .init_time hookSebastian Hesselbarth2013-09-292-15/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts clk-imx2[38] clocksource_of_init compatible init associated with fsl,imx2[38]-clkctrl. With arch/arm calling of_clk_init(NULL) from time_init(), we can now also remove custom .init_time hooks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| * | | ARM: highbank: remove custom .init_time hookSebastian Hesselbarth2013-09-291-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Highbank clock provider need a reference to system registers, as a workaround current clk driver maps those independent of arch code now. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Turquette <mturquette@linaro.org>
| * | | ARM: bcm2835: remove custom .init_time hookSebastian Hesselbarth2013-09-291-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Also remove call to of_clk_init from clk-bcm2835 with core fixed_clock match, as this has already been registered now. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Mike Turquette <mturquette@linaro.org>
| * | | ARM: vt8500: prepare for arch-wide .init_time callbackSebastian Hesselbarth2013-09-291-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current vt8500 board init calls of_clk_init() from vtwm_clk_init. To allow consolidation of DT driven .time_init, move of_clock_init() to a temporary .time_init callback that will be removed when arch-wide callback is available. With previous pmc_base parsing helper for vt8500 clock providers, we can also safely remove the call to vtwm_clk_init() and get rid of some includes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: vt8500: parse pmc_base from clock driverSebastian Hesselbarth2013-09-291-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, clock providers for vt8500 depend on machine_init providing pmc_base address before calling of_clk_init. With upcoming arch-wide .time_init calling of_clk_init, we should make clock providers independent of mach code. This adds a pmc_base parsing helper to current clock provider that gets called if there is no pmc_base set, yet. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: sunxi: declare OF clock providerSebastian Hesselbarth2013-09-291-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Common clock framework allows to register clock providers to get called on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock providers to make use of it and get rid of the mach specific clk init call. As sunxi has a bunch of independent clk provider nodes, we hook current clock init to board compatible to make it called once. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org>