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| | * | | clk: si570: Simplify probeBiju Das2023-10-231-29/+38
| | * | | clk: si5351: Simplify probeBiju Das2023-10-231-2/+2
| | * | | clk: rs9: Use i2c_get_match_data() instead of device_get_match_data()Biju Das2023-10-231-1/+1
| | * | | clk: clk-si544: Simplify probe() and is_valid_frequency()Biju Das2023-10-231-36/+15
| | * | | clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data()Biju Das2023-10-231-1/+1
| | * | | clk: npcm7xx: Fix incorrect kfreeJonathan Neuschäfer2023-10-181-1/+1
| | * | | clk: at91: remove unnecessary conditionsDan Carpenter2023-10-181-7/+5
| | * | | clk: ti: fix double free in of_ti_divider_clk_setup()Dan Carpenter2023-10-181-7/+1
| | * | | clk: keystone: pll: fix a couple NULL vs IS_ERR() checksDan Carpenter2023-10-181-6/+9
| | * | | clk: ralink: mtmips: quiet unused variable warningSergio Paracuellos2023-10-181-15/+5
| | * | | clk: gate: fix comment typo and grammarBaruch Siach2023-09-111-1/+1
| | * | | clk: asm9620: Remove 'hw' local variable that isn't checkedStephen Boyd2023-09-111-3/+3
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| *-----. \ \ Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider...Stephen Boyd2023-10-3026-184/+1071
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| | | | | * | | clk: fractional-divider: tests: Add test suite for edge casesFrank Oltmanns2023-10-124-0/+156
| | | | | * | | clk: fractional-divider: Improve approximation when zero based and exportFrank Oltmanns2023-10-121-7/+20
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| | | | * | | clk: versaclock7: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: versaclock5: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: versaclock3: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: versaclock3: Remove redundant _is_writeable()Mark Brown2023-10-091-6/+0
| | | | * | | clk: si570: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: si544: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: si5351: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: si5341: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: si514: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
| | | | * | | clk: cdce925: Convert to use maple tree register cacheMark Brown2023-10-091-1/+1
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| | | * | | clk: Fix clk gate kunit test on big-endian CPUsStephen Boyd2023-10-271-15/+15
| | | * | | clk: Parameterize clk_leaf_mux_set_rate_parentStephen Boyd2023-10-091-8/+73
| | | * | | clk: Drive clk_leaf_mux_set_rate_parent test from clk_opsStephen Boyd2023-10-091-17/+48
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| | * | | clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2Claudiu Beznea2023-10-121-0/+34
| | * | | clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()Claudiu Beznea2023-10-121-1/+1
| | * | | clk: renesas: Add minimal boot support for RZ/G3S SoCClaudiu Beznea2023-10-105-1/+228
| | * | | clk: renesas: rzg2l: Add divider clock for RZ/G3SClaudiu Beznea2023-10-102-0/+197
| | * | | clk: renesas: rzg2l: Refactor SD mux driverClaudiu Beznea2023-10-104-51/+139
| | * | | clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic headerClaudiu Beznea2023-10-053-4/+14
| | * | | clk: renesas: rzg2l: Add struct clk_hw_dataClaudiu Beznea2023-10-051-18/+34
| | * | | clk: renesas: rzg2l: Add support for RZ/G3S PLLClaudiu Beznea2023-10-052-4/+48
| | * | | clk: renesas: rzg2l: Remove critical areaClaudiu Beznea2023-10-051-4/+1
| | * | | clk: renesas: rzg2l: Fix computation formulaClaudiu Beznea2023-10-051-6/+6
| | * | | clk: renesas: rzg2l: Trust value returned by hardwareClaudiu Beznea2023-10-051-7/+1
| | * | | clk: renesas: rzg2l: Lock around writes to mux registerClaudiu Beznea2023-10-052-11/+14
| | * | | clk: renesas: rzg2l: Wait for status bit of SD mux before continuingClaudiu Beznea2023-10-051-7/+10
| | * | | clk: renesas: rcar-gen3: Extend SDnH divider tableDirk Behme2023-10-051-1/+14
| | * | | clk: renesas: r8a7795: Constify r8a7795_*_clksMarek Vasut2023-09-261-2/+2
| | * | | clk: renesas: r9a06g032: Name anonymous structsRalph Siemsen2023-09-181-30/+33
| | * | | clk: renesas: r9a06g032: Fix kerneldoc warningRalph Siemsen2023-09-181-0/+1
| | * | | clk: renesas: rzg2l: Use u32 for flag and mux_flagsClaudiu Beznea2023-09-181-2/+2
| | * | | clk: renesas: rzg2l: Use FIELD_GET() for PLL register fieldsClaudiu Beznea2023-09-181-5/+5
| | * | | clk: renesas: rzg2l: Simplify the logic in rzg2l_mod_clock_endisable()Claudiu Beznea2023-09-181-3/+2
| | * | | clk: renesas: rzg2l: Use core->name for clock nameClaudiu Beznea2023-09-181-1/+1
| | * | | clk: renesas: r9a06g032: Use for_each_compatible_node()Yang Yingliang2023-09-111-3/+2
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