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path: root/drivers/clocksource/timer-atmel-tcb.c
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* timekeeping, clocksource: Fix various typos in commentsIngo Molnar2021-03-221-2/+2
| | | | | | | | | | | Fix ~56 single-word typos in timekeeping & clocksource code comments. Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: John Stultz <john.stultz@linaro.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org
* clocksource/drivers/timer-atmel-tcb: Add sama5d2 supportAlexandre Belloni2020-07-111-1/+10
| | | | | | | | | | The first divisor for the sama5d2 is actually the gclk selector. Because the currently remaining divisors are fitting the use case, currently ensure it is skipped. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-10-alexandre.belloni@bootlin.com
* clocksource/drivers/timer-atmel-tcb: Allow selecting first dividerAlexandre Belloni2020-07-111-4/+2
| | | | | | | | | | The divider selection algorithm never allowed to get index 0. It was also continuing to look for dividers, trying to find the slow clock selection. This is not necessary anymore. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-9-alexandre.belloni@bootlin.com
* clocksource/drivers/timer-atmel-tcb: Stop using the 32kHz for clockeventsAlexandre Belloni2020-07-111-30/+33
| | | | | | | | | | Stop using the slow clock as the clock source for 32 bit counters because even at 10MHz, they are able to handle delays up to two minutes. This provides a way better resolution. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-8-alexandre.belloni@bootlin.com
* clocksource/drivers/timer-atmel-tcb: Fill tcb_configAlexandre Belloni2020-07-111-3/+15
| | | | | | | | | | Use the tcb_config and struct atmel_tcb_config to get the timer counter width. This is necessary because atmel_tcb_config will be extended later on. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-7-alexandre.belloni@bootlin.com
* clocksource/drivers/timer-atmel-tcb: Rework 32khz clock selectionAlexandre Belloni2020-07-111-9/+2
| | | | | | | | | On all the supported SoCs, the slow clock is always ATMEL_TC_TIMER_CLOCK5, avoid looking it up and pass it directly to setup_clkevents. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200710230813.1005150-6-alexandre.belloni@bootlin.com
* clocksource/drivers/tcb_clksrc: Register delay timerAlexandre Belloni2019-08-271-0/+18
| | | | | | | Implement and register delay timer to allow get_cycles() to work properly. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource/drivers/timer-atmel-tcb: Convert tc_clksrc_suspend|resume() to ↵kbuild test robot2019-05-021-2/+2
| | | | | | | | | | static Statisticize tc_clksrc_suspend and tc_clksrc_resume. Signed-off-by: kbuild test robot <lkp@intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* clocksource/drivers/tcb_clksrc: Rename the file for consistencyAlexandre Belloni2019-05-021-0/+477
For the sake of consistency, let's rename the file to a name similar to other file names in this directory. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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