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path: root/drivers/cxl
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* cxl/region: Fix passthrough-decoder detectionDan Williams2023-02-071-2/+2
* cxl/region: Fix null pointer dereference for resetting decoderFan Ni2023-02-061-3/+5
* cxl/pmem: Fix nvdimm unregistration when cxl_pmem driver is absentDan Williams2023-01-253-39/+28
* cxl: fix cxl_report_and_clear() RAS UE addr mis-assignmentDave Jiang2023-01-091-2/+5
* cxl/region: Fix memdev reuse checkFan Ni2022-12-081-1/+1
* cxl/pci: Remove endian confusionDan Williams2022-12-061-4/+3
* cxl/pci: Add some type-safety to the AER trace pointsDan Williams2022-12-061-2/+2
* cxl/security: Drop security command ioctl uapiDan Williams2022-12-061-17/+0
* cxl/mbox: Add variable output size validation for internal commandsDan Williams2022-12-062-9/+16
* cxl/mbox: Enable cxl_mbox_send_cmd() users to validate output sizeDan Williams2022-12-064-62/+126
* cxl/security: Fix Get Security State output payload endian handlingDan Williams2022-12-061-1/+5
* cxl: update names for interleave ways conversion macrosDave Jiang2022-12-054-16/+16
* cxl: update names for interleave granularity conversion macrosDave Jiang2022-12-054-14/+15
* cxl/acpi: Warn about an invalid CHBCR in an existing CHBS entryRobert Richter2022-12-051-1/+2
* cxl/acpi: Fail decoder add if CXIMS for HBIG is missingAlison Schofield2022-12-051-0/+5
* cxl/region: Fix spelling mistake "memergion" -> "memregion"Colin Ian King2022-12-051-1/+1
* cxl/regs: Fix sparse warningDan Williams2022-12-051-1/+1
* Merge branch 'for-6.2/cxl-xor' into for-6.2/cxlDan Williams2022-12-053-8/+149
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| * cxl/acpi: Support CXL XOR Interleave Math (CXIMS)Alison Schofield2022-12-033-8/+149
* | Merge branch 'for-6.2/cxl-aer' into for-6.2/cxlDan Williams2022-12-059-149/+324
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| * | cxl/pci: Add callback to log AER correctable errorDave Jiang2022-12-031-0/+20
| * | cxl/pci: Add (hopeful) error handling supportDan Williams2022-12-034-0/+141
| * | cxl/pci: add tracepoint events for CXL RASDave Jiang2022-12-031-0/+2
| * | cxl/pci: Find and map the RAS Capability StructureDan Williams2022-12-033-0/+34
| * | cxl/pci: Prepare for mapping RAS Capability StructureDan Williams2022-12-033-12/+31
| * | cxl/port: Limit the port driver to just the HDM Decoder CapabilityDan Williams2022-12-031-14/+18
| * | cxl/core/regs: Make cxl_map_{component, device}_regs() device genericDan Williams2022-12-036-56/+37
| * | cxl/pci: Kill cxl_map_regs()Dan Williams2022-12-031-22/+1
| * | cxl/pci: Cleanup cxl_map_device_regs()Dan Williams2022-12-031-31/+20
| * | cxl/pci: Cleanup repeated code in cxl_probe_regs() helpersDan Williams2022-12-031-20/+26
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* | Merge branch 'for-6.2/cxl-security' into for-6.2/cxlDan Williams2022-12-059-3/+332
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| * | cxl/region: Manage CPU caches relative to DPA invalidation eventsDan Williams2022-12-034-14/+57
| * | cxl/pmem: Enforce keyctl ABI for PMEM securityDan Williams2022-12-021-0/+10
| * | cxl/region: Fix missing probe failureDan Williams2022-12-021-0/+3
| * | cxl: add dimm_id support for __nvdimm_create()Dave Jiang2022-12-023-1/+12
| * | cxl/pmem: add provider name to cxl pmem dimm attribute groupDave Jiang2022-12-011-0/+10
| * | cxl/pmem: add id attribute to CXL based nvdimmDave Jiang2022-12-011-1/+27
| * | nvdimm/cxl/pmem: Add support for master passphrase disable security commandDave Jiang2022-12-011-3/+18
| * | cxl/pmem: Add "Passphrase Secure Erase" security command supportDave Jiang2022-12-013-0/+38
| * | cxl/pmem: Add "Unlock" security command supportDave Jiang2022-12-013-0/+29
| * | cxl/pmem: Add "Freeze Security State" security command supportDave Jiang2022-12-013-0/+12
| * | cxl/pmem: Add Disable Passphrase security command supportDave Jiang2022-12-013-0/+27
| * | cxl/pmem: Add "Set Passphrase" security command supportDave Jiang2022-12-013-0/+38
| * | cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operationDave Jiang2022-11-305-3/+70
* | | cxl/port: Add RCD endpoint port enumerationDan Williams2022-12-054-8/+44
* | | cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_memDan Williams2022-12-055-49/+47
* | | cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter2022-12-034-11/+174
* | | cxl/ACPI: Register CXL host ports by bridge deviceRobert Richter2022-12-021-18/+20
* | | tools/testing/cxl: Make mock CEDT parsing more robustDan Williams2022-12-021-0/+4
* | | cxl/acpi: Move rescan to the workqueueDan Williams2022-12-023-5/+34
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