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path: root/drivers/cxl
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* cxl/port: Enable HDM Capability after validating DVSEC RangesDan Williams2022-05-201-15/+152
* cxl/port: Reuse 'struct cxl_hdm' context for hdm initDan Williams2022-05-193-41/+25
* cxl/port: Move endpoint HDM Decoder Capability init to port driverDan Williams2022-05-192-11/+11
* cxl/pci: Drop @info argument to cxl_hdm_decode_init()Dan Williams2022-05-193-13/+9
* cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams2022-05-193-88/+78
* cxl/mem: Skip range enumeration if mem_enable clearDan Williams2022-05-192-1/+3
* cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams2022-05-195-142/+141
* cxl/pci: Move cxl_await_media_ready() to the coreDan Williams2022-05-194-47/+51
* cxl/mem: Validate port connectivity before dvsec rangesDan Williams2022-05-191-16/+16
* cxl/mem: Fix cxl_mem_probe() error exitDan Williams2022-05-191-2/+4
* cxl/pci: Drop wait_for_valid() from cxl_await_media_ready()Dan Williams2022-05-191-4/+0
* cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()Dan Williams2022-05-192-20/+3
* cxl/mem: Drop mem_enabled check from wait_for_media()Dan Williams2022-05-191-4/+0
* cxl: Drop cxl_device_lock()Dan Williams2022-04-285-120/+33
* cxl/acpi: Add root device lockdep validationDan Williams2022-04-281-0/+13
* cxl: Replace lockdep_mutex with local lock classesDan Williams2022-04-283-4/+18
* cxl/mbox: fix logical vs bitwise typoDan Carpenter2022-04-281-1/+1
* cxl/mbox: Replace NULL check with IS_ERR() after vmemdup_user()Alison Schofield2022-04-221-1/+1
* cxl/mbox: Use type __u32 for mailbox payload sizesAlison Schofield2022-04-221-13/+15
* PM: CXL: Disable suspendDan Williams2022-04-226-2/+62
* cxl/mem: Replace redundant debug message with a commentDan Williams2022-04-121-4/+10
* cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()Dan Williams2022-04-121-6/+6
* cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pciDan Williams2022-04-121-9/+18
* cxl/mem: Make cxl_dvsec_range() init failure fatalDan Williams2022-04-121-0/+3
* cxl/pci: Add debug for DVSEC range init failuresDan Williams2022-04-121-3/+10
* cxl/mem: Drop DVSEC vs EFI Memory Map sanity checkDan Williams2022-04-121-23/+1
* cxl/mbox: Use new return_code handlingDavidlohr Bueso2022-04-122-3/+3
* cxl/mbox: Improve handling of mbox_cmd hw return codesDavidlohr Bueso2022-04-123-3/+54
* cxl/pci: Use CXL_MBOX_SUCCESS to check against mbox_cmd return codeDavidlohr Bueso2022-04-121-2/+2
* cxl/mbox: Drop mbox_mutex commentDavidlohr Bueso2022-04-121-1/+1
* cxl/pmem: Remove CXL SET_PARTITION_INFO from exclusive_cmds listAlison Schofield2022-04-121-1/+0
* cxl/mbox: Block immediate mode in SET_PARTITION_INFO commandAlison Schofield2022-04-122-0/+48
* cxl/mbox: Move cxl_mem_command param to a local variableAlison Schofield2022-04-121-12/+8
* cxl/mbox: Make handle_mailbox_cmd_from_user() use a mbox paramAlison Schofield2022-04-121-27/+17
* cxl/mbox: Remove dependency on cxl_mem_command for a debug msgAlison Schofield2022-04-121-3/+14
* cxl/mbox: Construct a users cxl_mbox_cmd in the validation pathAlison Schofield2022-04-121-4/+17
* cxl/mbox: Move build of user mailbox cmd to a helper functionsAlison Schofield2022-04-121-25/+45
* cxl/mbox: Move raw command warning to raw command validationAlison Schofield2022-04-121-3/+2
* cxl/mbox: Move cxl_mem_command construction to helper funcsAlison Schofield2022-04-121-71/+76
* cxl/pci: Drop shadowed variableDan Williams2022-04-081-1/+0
* cxl/core/port: Fix NULL but dereferenced coccicheck errorWan Jiabing2022-03-221-1/+4
* cxl/port: Hold port reference until decoder releaseDan Williams2022-02-171-0/+4
* cxl/port: Fix endpoint refcount leakDan Williams2022-02-171-1/+2
* cxl/core: Fix cxl_device_lock() class detectionDan Williams2022-02-111-1/+1
* cxl/core/port: Fix unregister_port() lock assertionDan Williams2022-02-111-4/+20
* cxl/regs: Fix size of CXL Capability Header RegisterJonathan Cameron2022-02-081-2/+2
* cxl/core/port: Handle invalid decodersDan Williams2022-02-081-6/+30
* cxl/core/port: Fix / relax decoder target enumerationDan Williams2022-02-082-2/+5
* cxl/core/port: Add endpoint decodersBen Widawsky2022-02-084-16/+73
* cxl/core: Move target_list out of base decoder attributesDan Williams2022-02-081-1/+2
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