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* Merge tag 'dmaengine-5.12-rc1' of ↵Linus Torvalds2021-02-2328-5627/+2707
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine Pull dmaengine updates from Vinod Koul: "We have couple of drivers removed a new driver and bunch of new device support and few updates to drivers for this round. New drivers/devices: - Intel LGM SoC DMA driver - Actions Semi S500 DMA controller - Renesas r8a779a0 dma controller - Ingenic JZ4760(B) dma controller - Intel KeemBay AxiDMA controller Removed: - Coh901318 dma driver - Zte zx dma driver - Sirfsoc dma driver Updates: - mmp_pdma, mmp_tdma gained module support - imx-sdma become modern and dropped platform data support - dw-axi driver gained slave and cyclic dma support" * tag 'dmaengine-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (58 commits) dmaengine: dw-axi-dmac: remove redundant null check on desc dmaengine: xilinx_dma: Alloc tx descriptors GFP_NOWAIT dmaengine: dw-axi-dmac: Virtually split the linked-list dmaengine: dw-axi-dmac: Set constraint to the Max segment size dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registers dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support dmaengine: drivers: Kconfig: add HAS_IOMEM dependency to DW_AXI_DMAC dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA dmaengine: dw-axi-dmac: Support burst residue granularity dmaengine: dw-axi-dmac: Support of_dma_controller_register() dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic() dmaengine: dw-axi-dmac: Support device_prep_slave_sg dmaengine: dw-axi-dmac: Add device_config operation dmaengine: dw-axi-dmac: Add device_synchronize() callback dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources() dmaengine: dw-axi-dmac: simplify descriptor management dt-bindings: dma: Add YAML schemas for dw-axi-dmac dmaengine: ti: k3-psil: optimize struct psil_endpoint_config for size ...
| * dmaengine: dw-axi-dmac: remove redundant null check on descColin Ian King2021-02-081-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer desc is being null checked twice, the second null check is redundant because desc has not been re-assigned between the checks. Remove the redundant second null check on desc. Fixes: ef6fb2d6f1ab ("dmaengine: dw-axi-dmac: simplify descriptor management") Signed-off-by: Colin Ian King <colin.king@canonical.com> Tested-by: Sia Jee Heng <jee.heng.sia@intel.com> Reviewed-by: Sia Jee Heng <jee.heng.sia@intel.com> Addresses-Coverity: ("Logically dead code") Link: https://lore.kernel.org/r/20210203134652.22618-1-colin.king@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: xilinx_dma: Alloc tx descriptors GFP_NOWAITRichard Fitzgerald2021-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | Use GFP_NOWAIT allocation in xilinx_dma_alloc_tx_descriptor(). This is necessary for compatibility with ALSA, which calls dmaengine_prep_dma_cyclic() from an atomic context. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210129170800.31857-1-rf@opensource.cirrus.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Virtually split the linked-listSia Jee Heng2021-02-012-20/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AxiDMA driver exposed the dma_set_max_seg_size() to the DMAENGINE. It shall helps the DMA clients to create size-optimized linked-list for the controller. However, there are certain situations where DMA client might not be abled to benefit from the dma_get_max_seg_size() if the segment size can't meet the nature of the DMA client's operation. In the case of ALSA operation, ALSA application and driver expecting to run in a period of larger than 10ms regardless of the bit depth. With this large period, there is a strong request to split the linked-list in the AxiDMA driver. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-18-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Set constraint to the Max segment sizeSia Jee Heng2021-02-012-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for DMA Scatter-Gather (SG) constraint so that DMA clients can handle the AxiDMA limitation. Without supporting DMA constraint the default Max segment size reported by dmaengine is 64KB, which is not supported by Intel KeemBay AxiDMA. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-17-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD registersSia Jee Heng2021-02-011-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Intel KeemBay AxiDMA BYTE and HALFWORD registers programming. Intel KeemBay AxiDMA supports data transfer between device to memory and memory to device operations. This code is needed by I2C, I3C, I2S, SPI and UART which uses FIFO size of 8bits and 16bits to perform memory to device data transfer operation. 0-padding functionality is provided to avoid pre-processing of data on CPU. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-16-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshakeSia Jee Heng2021-02-011-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Intel KeemBay AxiDMA device handshake programming. Device handshake number passed in to the AxiDMA shall be written to the Intel KeemBay AxiDMA hardware handshake registers before DMA operations are started. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-15-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA supportSia Jee Heng2021-02-011-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Intel KeemBay AxiDMA to the .compatible field. The AxiDMA Apb region will be accessible if the compatible string matches the "intel,kmb-axi-dma". Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-14-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: drivers: Kconfig: add HAS_IOMEM dependency to DW_AXI_DMACSia Jee Heng2021-02-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | If HAS_IOMEM is not defined and DW_AXI_DMAC is enabled under COMPILE_TEST, the build fails with the following error: dw-axi-dmac-platform.c:(.text+0xc4): undefined reference to `devm_ioremap_resource' Link: https://www.spinics.net/lists/dmaengine/msg25188.html Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Link: https://lore.kernel.org/r/20210125013255.25799-13-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fieldsSia Jee Heng2021-02-011-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Intel KeemBay DMA registers. These registers are required to run data transfer between device to memory and memory to device on Intel KeemBay SoC. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-12-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Support burst residue granularitySia Jee Heng2021-02-012-7/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for DMA_RESIDUE_GRANULARITY_BURST so that AxiDMA can report DMA residue. Existing AxiDMA driver only support data transfer between memory to memory operation, therefore reporting DMA residue to the DMA clients is not supported. Reporting DMA residue to the DMA clients is important as DMA clients shall invoke dmaengine_tx_status() to understand the number of bytes been transferred so that the buffer pointer can be updated accordingly. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-10-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Support of_dma_controller_register()Sia Jee Heng2021-02-012-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for of_dma_controller_register() so that DMA clients can pass in device handshake number to the AxiDMA driver. DMA clients shall code the device handshake number in the Device tree. When DMA activities are needed, DMA clients shall invoke OF helper function to pass in the device handshake number to the AxiDMA. Without register to the of_dma_controller_register(), data transfer between memory to device and device to memory operations would failed. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-9-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()Sia Jee Heng2021-02-012-7/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for device_prep_dma_cyclic() callback function to benefit DMA cyclic client, for example ALSA. Existing AxiDMA driver only support data transfer between memory to memory. Data transfer between device to memory and memory to device in cyclic mode would failed if this interface is not supported by the AxiDMA driver. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-8-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Support device_prep_slave_sgSia Jee Heng2021-02-012-0/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device_prep_slave_sg() callback function so that DMA_MEM_TO_DEV and DMA_DEV_TO_MEM operations in single mode can be supported. Existing AxiDMA driver only support data transfer between memory to memory. Data transfer between device to memory and memory to device in single mode would failed if this interface is not supported by the AxiDMA driver. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-7-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Add device_config operationSia Jee Heng2021-02-012-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device_config() callback function so that the device address can be passed to the dma driver. DMA clients use this interface to pass in the device address to the AxiDMA. Without this interface, data transfer between device to memory and memory to device would failed. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-6-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: Add device_synchronize() callbackSia Jee Heng2021-02-011-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Add support for device_synchronize() callback function to sync with dmaengine_terminate_sync(). Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-5-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: move dma_pool_create() to alloc_chan_resources()Sia Jee Heng2021-02-012-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA memory block is created at driver load time and exist for device lifetime. Move the dma_pool_create() to the ->chan_resource() callback function allowing the DMA memory blocks to be created as needed and destroyed when the channel is freed. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-4-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: dw-axi-dmac: simplify descriptor managementSia Jee Heng2021-02-012-71/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify and refactor the descriptor management by removing the redundant Linked List Item (LLI) queue control logic from the AxiDMA driver. The descriptor is split into virtual descriptor and hardware LLI so that only hardware LLI memories are allocated from the DMA memory pool. Up to 64 descriptors can be allocated within a PAGE_SIZE compare to 16 descriptors in previous version. This solves the problem where an ALSA driver expects more than 16 DMA descriptors to run. Signed-off-by: Sia Jee Heng <jee.heng.sia@intel.com> Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Link: https://lore.kernel.org/r/20210125013255.25799-3-jee.heng.sia@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: INTEL_LDMA should depend on X86Geert Uytterhoeven2021-02-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Intel Lightning Mountain (LGM) DMA controller is only present on Intel Lightning Mountain SoCs. Hence add a dependency on X86, to prevent asking the user about this driver when configuring a kernel without Intel Lightning Mountain platform support. While at it, fix a misspelling of "Intel". Fixes: 32d31c79a1a4fbc4 ("dmaengine: Add Intel LGM SoC DMA support.") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210129131702.2656060-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: rcar-dmac: Add support for R-Car V3UGeert Uytterhoeven2021-02-011-23/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMACs (both SYS-DMAC and RT-DMAC) on R-Car V3U differ slightly from the DMACs on R-Car Gen2 and other R-Car Gen3 SoCs: 1. The per-channel registers are located in a second register block. Add support for mapping the second block, using the appropriate offsets and stride. 2. The common Channel Clear Register (DMACHCLR) was replaced by a per-channel register. Update rcar_dmac_chan_clear{,_all}() to handle this. As rcar_dmac_init() needs to clear the status before the individual channels are probed, channel index and base address initialization are moved forward. Inspired by a patch in the BSP by Phong Hoang <phong.hoang.wz@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210128084455.2237256-5-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: rcar-dmac: Add helpers for clearing DMA channel statusGeert Uytterhoeven2021-02-011-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract the code to clear the status of one or all channels into their own helpers, to prepare for the different handling of the R-Car V3U SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210128084455.2237256-4-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: rcar-dmac: Add for_each_rcar_dmac_chan() helperGeert Uytterhoeven2021-02-011-12/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper macro for iterating over all DMAC channels, taking into account the channel mask. Use it where appropriate, to simplify code. Restore "reverse Christmas tree" order of local variables while adding a new variable. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210128084455.2237256-3-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: stedma40: fix 'physical' typoBjorn Helgaas2021-01-271-1/+1
| | | | | | | | | | | | | | | | Fix misspelling of "physical". Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20210126205906.2918099-1-helgaas@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: qcom: bam_dma: Manage clocks when controlled_remotely is setThara Gopinath2021-01-271-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When bam dma is "controlled remotely", thus far clocks were not controlled from the Linux. In this scenario, Linux was disabling runtime pm in bam dma driver and not doing any clock management in suspend/resume hooks. With introduction of crypto engine bam dma, the clock is a rpmh resource that can be controlled from both Linux and TZ/remote side. Now bam dma clock is getting enabled during probe even though the bam dma can be "controlled remotely". But due to clocks not being handled properly, bam_suspend generates a unbalanced clk_unprepare warning during system suspend. To fix the above issue and to enable proper clock-management, this patch enables runtim-pm and handles bam dma clocks in suspend/resume hooks if the clock node is present irrespective of controlled_remotely property. Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210126211859.790892-1-thara.gopinath@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: idxd: add module parameter to force disable of SVADave Jiang2021-01-261-1/+7
| | | | | | | | | | | | | | | | | | | | | | Add a module parameter that overrides the SVA feature enabling. This keeps the driver in legacy mode even when intel_iommu=sm_on is set. In this mode, the descriptor fields must be programmed with dma_addr_t from the Linux DMA API for source, destination, and completion descriptors. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/161134110457.4005461.13171197785259115852.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: mmp_tdma: Allow building as a moduleLubomir Rintel2021-01-261-1/+1
| | | | | | | | | | | | | | | | | | There is no reason the Marvell MMP two-channel audio DMA driver would have to be built-in. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210121110356.1768635-4-lkundrak@v3.sk Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: mmp_pdma: Allow building as a moduleLubomir Rintel2021-01-261-1/+1
| | | | | | | | | | | | | | | | | | There is no reason the Marvell MMP peripheral DMA driver would have to be built-in. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210121110356.1768635-3-lkundrak@v3.sk Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: mmp_pdma: Remove mmp_pdma_filter_fn()Lubomir Rintel2021-01-261-14/+0
| | | | | | | | | | | | | | | | It's not used anywhere -- drop it. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210121110356.1768635-2-lkundrak@v3.sk Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: remove coh901318 driverArnd Bergmann2021-01-265-3270/+0
| | | | | | | | | | | | | | | | | | | | | | The ST-Ericsson U300 platform is getting removed, so this driver is no longer needed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210120131859.2056308-4-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: remove zte zx driverArnd Bergmann2021-01-263-951/+0
| | | | | | | | | | | | | | | | | | | | | | The zte zx platform is getting removed, so this driver is no longer needed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Link: https://lore.kernel.org/r/20210120131859.2056308-3-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: remove sirfsoc driverArnd Bergmann2021-01-263-1178/+0
| | | | | | | | | | | | | | | | | | | | | | The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Cc: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/r/20210120131859.2056308-2-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: jz4780: Add support for the JZ4760(B)Paul Cercueil2021-01-261-0/+14
| | | | | | | | | | | | | | | | | | | | | | Add support for the JZ4760 and JZ4760B SoCs. Both SoCs have only 5 DMA channels per chip. The JZ4760B introduced the DCKES/DCKEC registers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20210120105322.16116-2-paul@crapouillou.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: imx-sdma: Use of_device_get_match_data()Fabio Estevam2021-01-261-10/+1
| | | | | | | | | | | | | | | | Use of_device_get_match_data() to make the code simpler. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20210118121549.1625217-2-festevam@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: imx-sdma: Remove platform data supportFabio Estevam2021-01-261-25/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Since 5.10-rc1, i.MX has been converted to a devicetree-only platform. The platform data support in this driver was only used for non-DT platforms. Remove the platform data support as it has no more users. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20210118121549.1625217-1-festevam@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: idxd: set DMA channel to be privateDave Jiang2021-01-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DMA_PRIVATE attribute flag to idxd DMA channels. The dedicated WQs are expected to be used by a single client and not shared. While doing NTB testing this mistake was discovered, which prevented ntb_transport from requesting DSA wqs as DMA channels via dma_request_channel(). Reported-by: Srinijia Kambham <srinija.kambham@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Tested-by: Srinijia Kambham <srinija.kambham@intel.com> Fixes: 8f47d1a5e545 ("dmaengine: idxd: connect idxd to dmaengine subsystem") Link: https://lore.kernel.org/r/161074758743.2184057.3388557138816350980.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: qcom: gpi: Remove unneeded semicolonXu Wang2021-01-171-1/+1
| | | | | | | | | | | | | | | | | | fix semicolon.cocci warning: drivers/dma/qcom/gpi.c:1703:2-3: Unneeded semicolon Signed-off-by: Xu Wang <vulab@iscas.ac.cn> Link: https://lore.kernel.org/r/20210115100040.33364-1-vulab@iscas.ac.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: hsu: disable spurious interruptFerry Toth2021-01-131-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Intel Tangier B0 and Anniedale the interrupt line, disregarding to have different numbers, is shared between HSU DMA and UART IPs. Thus on such SoCs we are expecting that IRQ handler is called in UART driver only. hsu_pci_irq was handling the spurious interrupt from HSU DMA by returning immediately. This wastes CPU time and since HSU DMA and HSU UART interrupt occur simultaneously they race to be handled causing delay to the HSU UART interrupt handling. Fix this by disabling the interrupt entirely. Fixes: 4831e0d9054c ("serial: 8250_mid: handle interrupt correctly in DMA case") Signed-off-by: Ferry Toth <ftoth@exalondelft.nl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20210112223749.97036-1-ftoth@exalondelft.nl Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: ti: k3-udma: Do not initialize ret in tisci channel config functionsPeter Ujfalusi2021-01-131-7/+7
| | | | | | | | | | | | | | | | | | The ret does not need to be initialized to 0 in the tisci channel config functions. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20210113114923.9231-4-peter.ujfalusi@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: ti: k3-udma: Add support for burst_size configuration for mem2memPeter Ujfalusi2021-01-131-5/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UDMA and BCDMA can provide higher throughput if the burst_size of the channel is changed from it's default (which is 64 bytes) for Ultra-high and high capacity channels. This performance benefit is even more visible when the buffers are aligned with the burst_size configuration. The am654 does not have a way to change the burst size, but it is using 64 bytes burst, so increasing the copy_align from 8 bytes to 64 (and clients taking that into account) can increase the throughput as well. Numbers gathered on j721e: echo 8000000 > /sys/module/dmatest/parameters/test_buf_size echo 2000 > /sys/module/dmatest/parameters/timeout echo 50 > /sys/module/dmatest/parameters/iterations echo 1 > /sys/module/dmatest/parameters/max_channels Prior this patch: ~1.3 GB/s After this patch: ~1.8 GB/s with 1 byte alignment: ~1.7 GB/s Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210113114923.9231-3-peter.ujfalusi@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: ti: k3-udma: Set rflow count for BCDMA split channelsVignesh Raghavendra2021-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | BCDMA RX channels have one flow per channel, therefore set the rflow_cnt to rchan_cnt. Without this patch, request for BCDMA RX channel allocation fails as rflow_cnt is 0 thus fails to reserve a rflow for the channel. Fixes: 8844898028d4 ("dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Link: https://lore.kernel.org/r/20210112141403.30286-1-vigneshr@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: qcom: Always inline gpi_update_regNathan Chancellor2021-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building with CONFIG_UBSAN_UNSIGNED_OVERFLOW, clang decides not to inline gpi_update_reg, which causes a linkage failure around __bad_mask: ld.lld: error: undefined symbol: __bad_mask >>> referenced by bitfield.h:119 (include/linux/bitfield.h:119) >>> dma/qcom/gpi.o:(gpi_update_reg) in archive drivers/built-in.a >>> referenced by bitfield.h:119 (include/linux/bitfield.h:119) >>> dma/qcom/gpi.o:(gpi_update_reg) in archive drivers/built-in.a If gpi_update_reg is not inlined, the mask value will not be known at compile time so the check in field_multiplier stays in the final object file, causing the above linkage failure. Always inline gpi_update_reg so that this check can never fail. Fixes: 5d0c3533a19f ("dmaengine: qcom: Add GPI dma driver") Link: https://github.com/ClangBuiltLinux/linux/issues/1243 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Link: https://lore.kernel.org/r/20210112191214.1264793-1-natechancellor@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: owl-dma: Fix a resource leak in the remove functionChristophe JAILLET2021-01-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | A 'dma_pool_destroy()' call is missing in the remove function. Add it. This call is already made in the error handling path of the probe function. Fixes: 47e20577c24d ("dmaengine: Add Actions Semi Owl family S900 DMA driver") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/20201212162535.95727-1-christophe.jaillet@wanadoo.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: fsldma: Fix a resource leak in an error handling path of the ↵Christophe JAILLET2021-01-121-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | probe function In case of error, the previous 'fsl_dma_chan_probe()' calls must be undone by some 'fsl_dma_chan_remove()', as already done in the remove function. It was added in the remove function in commit 77cd62e8082b ("fsldma: allow Freescale Elo DMA driver to be compiled as a module") Fixes: d3f620b2c4fe ("fsldma: simplify IRQ probing and handling") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/20201212160614.92576-1-christophe.jaillet@wanadoo.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: fsldma: Fix a resource leak in the remove functionChristophe JAILLET2021-01-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A 'irq_dispose_mapping()' call is missing in the remove function. Add it. This is needed to undo the 'irq_of_parse_and_map() call from the probe function and already part of the error handling path of the probe function. It was added in the probe function only in commit d3f620b2c4fe ("fsldma: simplify IRQ probing and handling") Fixes: 77cd62e8082b ("fsldma: allow Freescale Elo DMA driver to be compiled as a module") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/20201212160516.92515-1-christophe.jaillet@wanadoo.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: Add Intel LGM SoC DMA support.Amireddy Mallikarjuna reddy2021-01-125-0/+1753
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DMA controller driver for Lightning Mountain (LGM) family of SoCs. The main function of the DMA controller is the transfer of data from/to any peripheral to/from the memory. A memory to memory copy capability can also be configured. This ldma driver is used for configure the device and channnels for data and control paths. Signed-off-by: Amireddy Mallikarjuna reddy <mallikarjunax.reddy@linux.intel.com> Link: https://lore.kernel.org/r/5fc54eb7ccfad4f8dd812b66b884054fc55cf050.1606905330.git.mallikarjunax.reddy@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dma: idxd: use DEFINE_MUTEX() for mutex lockZheng Yongjun2021-01-081-2/+1
| | | | | | | | | | | | | | | | | | | | mutex lock can be initialized automatically with DEFINE_MUTEX() rather than explicitly calling mutex_init(). Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20201224132254.30961-1-zhengyongjun3@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: at_hdmac: remove platform data headerAlexandre Belloni2021-01-082-3/+44
| | | | | | | | | | | | | | | | | | | | linux/platform_data/dma-atmel.h is only used by the at_hdmac driver. Move the CFG bits definitions back in at_hdmac_regs.h and the remaining definitions in the driver. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20201228203022.2674133-1-alexandre.belloni@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * dmaengine: owl: Add compatible for the Actions Semi S500 DMA controllerCristian Ciocaltea2021-01-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The DMA controller present on the Actions Semi S500 SoC is compatible with the S900 variant, so add it to the list of devices supported by the Actions Semi Owl DMA driver. Additionally, order the entries alphabetically. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/88dc9dc064fd4c71f7ad46f172b05b09b9777e42.1609263738.git.cristian.ciocaltea@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2021-02-221-2/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: - Generalise byte swapping assembly - Update debug addresses for STI - Validate start of physical memory with DTB - Do not clear SCTLR.nTLSMD in decompressor - amba/locomo/sa1111 devices remove method return type is void - address markers for KASAN in page table dump * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9065/1: OABI compat: fix build when EPOLL is not enabled ARM: 9055/1: mailbox: arm_mhuv2: make remove callback return void amba: Make use of bus_type functions amba: Make the remove callback return void vfio: platform: simplify device removal amba: reorder functions amba: Fix resource leak for drivers without .remove ARM: 9054/1: arch/arm/mm/mmu.c: Remove duplicate header ARM: 9053/1: arm/mm/ptdump:Add address markers for KASAN regions ARM: 9051/1: vdso: remove unneded extra-y addition ARM: 9050/1: Kconfig: Select ARCH_HAVE_NMI_SAFE_CMPXCHG where possible ARM: 9049/1: locomo: make locomo bus's remove callback return void ARM: 9048/1: sa1111: make sa1111 bus's remove callback return void ARM: 9047/1: smp: remove unused variable ARM: 9046/1: decompressor: Do not clear SCTLR.nTLSMD for ARMv7+ cores ARM: 9045/1: uncompress: Validate start of physical memory against passed DTB ARM: 9042/1: debug: no uncompress debugging while semihosting ARM: 9041/1: sti LL_UART: add STiH418 SBC UART0 support ARM: 9040/1: use DEBUG_UART_PHYS and DEBUG_UART_VIRT for sti LL_UART ARM: 9039/1: assembler: generalize byte swapping macro into rev_l
| * | amba: Make the remove callback return voidUwe Kleine-König2021-02-021-2/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All amba drivers return 0 in their remove callback. Together with the driver core ignoring the return value anyhow, it doesn't make sense to return a value here. Change the remove prototype to return void, which makes it explicit that returning an error value doesn't work as expected. This simplifies changing the core remove callback to return void, too. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> # for drivers/memory Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> # for hwtracing/coresight Acked-By: Vinod Koul <vkoul@kernel.org> # for dmaengine Acked-by: Guenter Roeck <linux@roeck-us.net> # for watchdog Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Takashi Iwai <tiwai@suse.de> # for sound Acked-by: Vladimir Zapolskiy <vz@mleia.com> # for memory/pl172 Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210126165835.687514-5-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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