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* | EDAC/amd64: Support asymmetric dual-rank DIMMsYazen Ghannam2019-08-232-4/+15
* | EDAC/amd64: Cache secondary Chip Select registersYazen Ghannam2019-08-232-3/+24
* | EDAC/amd64: Decode syndrome before translating addressYazen Ghannam2019-08-231-7/+7
* | EDAC/amd64: Find Chip Select memory size using Address MaskYazen Ghannam2019-08-231-44/+70
* | EDAC/amd64: Initialize DIMM info for systems with more than two channelsYazen Ghannam2019-08-231-14/+52
* | EDAC/amd64: Recognize DRAM device type ECC capabilityYazen Ghannam2019-08-231-2/+12
* | EDAC/amd64: Support more than two controllers for chip selects handlingYazen Ghannam2019-08-222-57/+71
* | EDAC/mc: Cleanup _edac_mc_free() codeRobert Richter2019-08-141-13/+12
* | EDAC, pnd2: Fix ioremap() size in dnv_rd_reg()Stephen Douthit2019-08-091-1/+6
* | EDAC, mellanox: Add ECC support for BlueField DDR4Shravan Kumar Ramani2019-08-083-0/+364
* | EDAC/altera: Use the proper type for the IRQ status bitsDan Carpenter2019-08-071-1/+3
* | EDAC/mc: Fix grain_bits calculationRobert Richter2019-08-031-2/+6
* | edac: altera: Move Stratix10 SDRAM ECC to peripheralThor Thayer2019-07-252-5/+74
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* EDAC: Fix global-out-of-bounds write when setting edac_mc_poll_msecEiichi Tsukata2019-06-272-9/+9
* EDAC, skx, i10nm: Fix source ID register offsetQiuxu Zhuo2019-06-264-5/+5
* EDAC, i10nm: Check ECC enabling status per channelQiuxu Zhuo2019-06-261-3/+3
* EDAC, i10nm: Add Intel additional Ice-Lake supportQiuxu Zhuo2019-06-201-0/+2
* EDAC: Make edac_debugfs_create_x*() return voidGreg Kroah-Hartman2019-06-202-16/+14
* EDAC/aspeed: Remove set but not used variable 'np'YueHaibing2019-06-201-4/+0
* EDAC/ie31200: Reformat PCI device tableMarco Elver2019-06-201-60/+20
* EDAC/ie31200: Add Intel Coffee Lake CPU supportMarco Elver2019-06-201-3/+55
* EDAC/sifive: Add EDAC platform driver for SiFive SoCsYash Shah2019-06-203-0/+126
* EDAC/sb_edac: Remove redundant update of tad_baseColin Ian King2019-06-201-1/+0
* EDAC/altera: Add Stratix10 SDMMC supportThor Thayer2019-06-201-1/+15
* EDAC/altera: Add Stratix10 OCRAM ECC supportThor Thayer2019-06-201-2/+25
* EDAC/sysfs: Drop device references properlyGreg KH2019-06-201-3/+7
* EDAC/sysfs: Fix memory leak when creating a csrow objectPan Bian2019-06-201-1/+7
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 441Thomas Gleixner2019-06-052-12/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333Thomas Gleixner2019-06-056-78/+6
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner2019-06-052-18/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner2019-05-302-24/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 172Thomas Gleixner2019-05-304-12/+4
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13Thomas Gleixner2019-05-211-13/+1
* treewide: Add SPDX license identifier for more missed filesThomas Gleixner2019-05-213-0/+3
* treewide: Add SPDX license identifier for missed filesThomas Gleixner2019-05-212-0/+2
* Merge tag 'edac_fixes_for_5.2' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2019-05-162-10/+6
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| * EDAC/mc: Fix edac_mc_find() in case no device is foundRobert Richter2019-05-141-8/+4
| * EDAC/mpc85xx: Prevent building as a moduleMichael Ellerman2019-05-101-2/+2
* | Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2019-05-061-2/+2
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| * x86/MCE/AMD: Don't report L1 BTB MCA errors on some family 17h modelsYazen Ghannam2019-04-231-2/+2
* | Revert "EDAC/amd64: Support more than two controllers for chip select handling"Borislav Petkov2019-04-252-62/+56
* | EDAC/altera, firmware/intel: Add Stratix10 ECC DBE SMC callThor Thayer2019-04-022-83/+1
* | EDAC/altera: Initialize peripheral FIFOs in probe()Thor Thayer2019-03-291-71/+91
* | EDAC/altera: Do less intrusive error injectionThor Thayer2019-03-292-18/+14
* | EDAC/amd64: Adjust printed chip select sizes when interleavedYazen Ghannam2019-03-271-2/+29
* | EDAC/amd64: Support more than two controllers for chip select handlingYazen Ghannam2019-03-272-56/+62
* | EDAC/amd64: Recognize x16 symbol sizeYazen Ghannam2019-03-272-12/+11
* | EDAC/amd64: Set maximum channel layer size depending on familyYazen Ghannam2019-03-271-1/+7
* | EDAC/amd64: Support more than two Unified Memory ControllersYazen Ghannam2019-03-272-21/+32
* | EDAC/amd64: Use a macro for iterating over Unified Memory ControllersYazen Ghannam2019-03-271-7/+10
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