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* Merge 5.4-rc7 into char-misc-nextGreg Kroah-Hartman2019-11-111-20/+13
|\ | | | | | | | | | | We need the char/misc driver fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * Revert "gpio: merrifield: Pass irqchip when adding gpiochip"Linus Walleij2019-11-031-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 8f86a5b4ad679e4836733b47414226074eee4e4d. It has been established that this causes a boot regression on both Baytrail and Cherrytrail SoCs, and we can't have that in the final kernel release, so we need to revert it. Reported-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Revert "gpio: merrifield: Restore use of irq_base"Linus Walleij2019-11-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 6658f87f219427ee776c498e07c878eb5cad1be2. This revert is a prerequisite for the later revert of commit 8f86a5b4ad679e4836733b47414226074eee4e4d. Reported-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Revert "gpio: merrifield: Move hardware initialization to callback"Linus Walleij2019-11-031-5/+3
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 4c87540940cbc7ddbe9674087919c605fd5c2ef1. This revert is a prerequisite for the later revert of commit 8f86a5b4ad679e4836733b47414226074eee4e4d. Reported-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | drivers: mcb: use symbol namespacesJohannes Thumshirn2019-11-031-0/+1
|/ | | | | | | | | | | Now that we have symbol namespaces, use them in MCB to not pollute the default namespace with MCB internals. Signed-off-by: Johannes Thumshirn <jthumshirn@suse.de> Reviewed-by: Jessica Yu <jeyu@kernel.org> Reviewed-by: Michael Moese <mmoese@suse.de> Link: https://lore.kernel.org/r/20191016100158.1400-1-jthumshirn@suse.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* gpio: lynxpoint: set default handler to be handle_bad_irq()Andy Shevchenko2019-10-151-1/+1
| | | | | | | | We switch the default handler to be handle_bad_irq() instead of handle_simple_irq() (which was not correct anyway). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: merrifield: Move hardware initialization to callbackAndy Shevchenko2019-10-151-3/+5
| | | | | | | | | | The driver wants to initialize related registers before IRQ chip will be added. That's why move it to a corresponding callback. It also fixes the NULL pointer dereference. Fixes: 8f86a5b4ad67 ("gpio: merrifield: Pass irqchip when adding gpiochip") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: lynxpoint: Move hardware initialization to callbackAndy Shevchenko2019-10-151-3/+5
| | | | | | | | | | The driver wants to initialize related registers before IRQ chip will be added. That's why move it to a corresponding callback. It also fixes the NULL pointer dereference. Fixes: 7b1e889436a1 ("gpio: lynxpoint: Pass irqchip when adding gpiochip") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: intel-mid: Move hardware initialization to callbackAndy Shevchenko2019-10-151-3/+6
| | | | | | | | | | The driver wants to initialize related registers before IRQ chip will be added. That's why move it to a corresponding callback. It also fixes the NULL pointer dereference. Fixes: 8069e69a9792 ("gpio: intel-mid: Pass irqchip when adding gpiochip") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib: Initialize the hardware with a callbackAndy Shevchenko2019-10-151-1/+21
| | | | | | | | | | | | | | | | After changing the drivers to use GPIO core to add an IRQ chip it appears that some of them requires a hardware initialization before adding the IRQ chip. Add an optional callback ->init_hw() to allow that drivers to initialize hardware if needed. This change is a part of the fix NULL pointer dereference brought to the several drivers recently. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: merrifield: Restore use of irq_baseAndy Shevchenko2019-10-151-0/+1
| | | | | | | | | | | | | | | During conversion to internal IRQ chip initialization the commit 8f86a5b4ad67 ("gpio: merrifield: Pass irqchip when adding gpiochip") lost the irq_base assignment. drivers/gpio/gpio-merrifield.c: In function ‘mrfld_gpio_probe’: drivers/gpio/gpio-merrifield.c:405:17: warning: variable ‘irq_base’ set but not used [-Wunused-but-set-variable] Assign the girq->first to it. Fixes: 8f86a5b4ad67 ("gpio: merrifield: Pass irqchip when adding gpiochip") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: max77620: Use correct unit for debounce timesThierry Reding2019-10-041-3/+3
| | | | | | | | | | The gpiod_set_debounce() function takes the debounce time in microseconds. Adjust the switch/case values in the MAX77620 GPIO to use the correct unit. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191002122825.3948322-1-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: eic: sprd: Fix the incorrect EIC offset when togglingBruce Chen2019-10-011-3/+4
| | | | | | | | | | | | When toggling the level trigger to emulate the edge trigger, the EIC offset is incorrect without adding the corresponding bank index, thus fix it. Fixes: 7bf0d7f62282 ("gpio: eic: Add edge trigger emulation for EIC") Cc: stable@vger.kernel.org Signed-off-by: Bruce Chen <bruce.chen@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpio: fix getting nonexclusive gpiods from DTMarco Felsch2019-10-011-1/+1
| | | | | | | | | | | | | | | Since commit ec757001c818 ("gpio: Enable nonexclusive gpiods from DT nodes") we are able to get GPIOD_FLAGS_BIT_NONEXCLUSIVE marked gpios. Currently the gpiolib uses the wrong flags variable for the check. We need to check the gpiod_flags instead of the of_gpio_flags else we return -EBUSY for GPIOD_FLAGS_BIT_NONEXCLUSIVE marked and requested gpiod's. Fixes: ec757001c818 gpio: Enable nonexclusive gpiods from DT nodes Cc: stable@vger.kernel.org Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> [Bartosz: the function was moved to gpiolib-of.c so updated the patch] Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpiolib: don't clear FLAG_IS_OUT when emulating open-drain/open-sourceBartosz Golaszewski2019-10-011-8/+19
| | | | | | | | | | | | | | | | When emulating open-drain/open-source by not actively driving the output lines - we're simply changing their mode to input. This is wrong as it will then make it impossible to change the value of such line - it's now considered to actually be in input mode. If we want to still use the direction_input() callback for simplicity then we need to set FLAG_IS_OUT manually in gpiod_direction_output() and not clear it in gpio_set_open_drain_value_commit() and gpio_set_open_source_value_commit(). Fixes: c663e5f56737 ("gpio: support native single-ended hardware drivers") Cc: stable@vger.kernel.org Reported-by: Kent Gibson <warthog618@gmail.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* Merge tag 'pwm/for-5.4-rc1' of ↵Linus Torvalds2019-09-271-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "Besides one new driver being added for the PWM controller found in various Spreadtrum SoCs, this series of changes brings a slew of, mostly minor, fixes and cleanups for existing drivers, as well as some enhancements to the core code. Lastly, Uwe is added to the PWM subsystem entry of the MAINTAINERS file, making official his role as a reviewer" * tag 'pwm/for-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (34 commits) MAINTAINERS: Add myself as reviewer for the PWM subsystem MAINTAINERS: Add patchwork link for PWM entry MAINTAINERS: Add a selection of PWM related keywords to the PWM entry pwm: mediatek: Add MT7629 compatible string dt-bindings: pwm: Update bindings for MT7629 SoC pwm: mediatek: Update license and switch to SPDX tag pwm: mediatek: Use pwm_mediatek as common prefix pwm: mediatek: Allocate the clks array dynamically pwm: mediatek: Remove the has_clks field pwm: mediatek: Drop the check for of_device_get_match_data() pwm: atmel: Consolidate driver data initialization pwm: atmel: Remove unneeded check for match data pwm: atmel: Remove platform_device_id and use only dt bindings pwm: stm32-lp: Add check in case requested period cannot be achieved pwm: Ensure pwm_apply_state() doesn't modify the state argument pwm: fsl-ftm: Don't update the state for the caller of pwm_apply_state() pwm: sun4i: Don't update the state for the caller of pwm_apply_state() pwm: rockchip: Don't update the state for the caller of pwm_apply_state() pwm: Let pwm_get_state() return the last implemented state pwm: Introduce local struct pwm_chip in pwm_apply_state() ...
| * pwm: Ensure pwm_apply_state() doesn't modify the state argumentUwe Kleine-König2019-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is surprising for a PWM consumer when the variable holding the requested state is modified by pwm_apply_state(). Consider for example a driver doing: #define PERIOD 5000000 #define DUTY_LITTLE 10 ... struct pwm_state state = { .period = PERIOD, .duty_cycle = DUTY_LITTLE, .polarity = PWM_POLARITY_NORMAL, .enabled = true, }; pwm_apply_state(mypwm, &state); ... state.duty_cycle = PERIOD / 2; pwm_apply_state(mypwm, &state); For sure the second call to pwm_apply_state() should still have state.period = PERIOD and not something the hardware driver chose for a reason that doesn't necessarily apply to the second call. So declare the state argument as a pointer to a const type and adapt all drivers' .apply callbacks. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | Merge tag 'pinctrl-v5.4-1' of ↵Linus Torvalds2019-09-191-1/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.4 kernel cycle: Core changes: - Fix errors in example code in the documentation. New drivers: - Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the Ingenic driver. - Support Cirrus Logic Madera CS47L92 and CS47L15. - Support Allwinner Sunxi V3S. - Support Aspeed 2600 BMC. - Support Qualcomm SC7180. - Support Marvell MVEBU CS115. Driver improvements: - Clean up a few drivers to use the devm_platform_ioremap_resource() helper. - Pass the irqchip when registering the gpio_chip in some pin controllers that are also GPIO controllers. - Support suspend/resume in the Tegra driver. - Support pull-up on the Broadcom BCM2711. - The Intel driver can now request locked pads. - Fix the UFS reset pin in the Qualcomm SDM845 driver" * tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits) pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux() pinctrl: bcm: remove redundant assignment to pointer log pinctrl: iproc: Add 'get_direction' support pinctrl: iproc-gpio: Handle interrupts for multiple instances pinctrl: iproc-gpio: Fix incorrect pinconf configurations pinctrl: intel: mark intel_pin_to_gpio __maybe_unused pinctrl: qcom: sdm845: Fix UFS_RESET pin pinctrl: mvebu: add additional variant for standalone CP115 pinctrl: mvebu: Add CP110 missing pin functionality dt-bindings: cp110: document the new CP115 pinctrl compatible pinctrl: bcm2835: Pass irqchip when adding gpiochip pinctrl: meson: meson: Add of_node_put() before return pinctrl/gpio: Take MUX usage into account dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support pinctrl: amd: disable spurious-firing GPIO IRQs pinctrl: rza2: Include the appropriate headers pinctrl: rza2: Drop driver use of consumer flags ...
| * | pinctrl/gpio: Take MUX usage into accountStefan Wahren2019-08-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user space like gpioinfo only see the GPIO usage but not the MUX usage (e.g. I2C or SPI usage) of a pin. As a user we want to know which pin is free/safe to use. So take the MUX usage of strict pinmux controllers into account to get a more realistic view for ioctl GPIO_GET_LINEINFO_IOCTL. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Link: https://lore.kernel.org/r/20190814110035.13451-1-ramon.fried@linux.intel.com Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2019-09-163-0/+189
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) bus: uniphier-system-bus: use devm_platform_ioremap_resource() soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests bus: imx-weim: remove incorrect __init annotations fbdev: remove w90x900/nuc900 platform drivers spi: remove w90x900 driver net: remove w90p910-ether driver net: remove ks8695 driver firmware: turris-mox-rwtm: Add sysfs documentation firmware: Add Turris Mox rWTM firmware driver dt-bindings: firmware: Document cznic,turris-mox-rwtm binding bus: moxtet: fix unsigned comparison to less than zero bus: moxtet: remove set but not used variable 'dummy' ARM: scoop: Use the right include dt-bindings: power: add Amlogic Everything-Else power domains bindings soc: amlogic: Add support for Everything-Else power domains controller fbdev: da8xx: use resource management for dma fbdev: da8xx-fb: drop a redundant if fbdev: da8xx-fb: use devm_platform_ioremap_resource() ...
| * | | drivers: gpio: Add support for GPIOs over Moxtet busMarek Behún2019-08-143-0/+189
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for interpreting the input and output bits of one device on Moxtet bus as GPIOs. This is needed for example by the SFP cage module of Turris Mox. Link: https://lore.kernel.org/r/20190812161118.21476-5-marek.behun@nic.cz Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2019-09-161-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC platform updates from Arnd Bergmann: "The main change this time around is a cleanup of some of the oldest platforms based on the XScale and ARM9 CPU cores, which are between 10 and 20 years old. The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel IOP33x/IOP13xx platforms are removed after we determined that nobody is using them any more. The TI Davinci and NXP LPC32xx platforms on the other hand are still in active use and are converted to the ARCH_MULTIPLATFORM build, meaning that we can compile a kernel that works on these along with most other ARMv5 platforms. Changes toward that goal are also merged for IOP32x, but additional work is needed to complete this. Patches for the remaining ARMv5 platforms have started but need more work and some testing. Support for the new ASpeed AST2600 gets added, this is based on the Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and ARMv6 chips in the same family. Other changes include a cleanup of the ST-Ericsson ux500 platform and the move of the TI Davinci platform to a new clocksource driver" [ The changes had marked INTEL_IOP_ADMA and USB_LPC32XX as being buildable on other platforms through COMPILE_TEST, but that causes new warnings that I most definitely do not want to see during the merge window as that could hide other issues. So the COMPILE_TEST option got disabled for them again - Linus ] * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits) ARM: multi_v5_defconfig: make DaVinci part of the ARM v5 multiplatform build ARM: davinci: support multiplatform build for ARM v5 arm64: exynos: Enable exynos-chipid driver ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init() ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2 ARM: davinci: dm646x: Fix a typo in the comment ARM: davinci: dm646x: switch to using the clocksource driver ARM: davinci: dm644x: switch to using the clocksource driver ARM: aspeed: Enable SMP boot ARM: aspeed: Add ASPEED AST2600 architecture ARM: aspeed: Select timer in each SoC dt-bindings: arm: cpus: Add ASPEED SMP ARM: imx: stop adjusting ar8031 phy tx delay mailmap: map old company name to new one @microchip.com MAINTAINERS: at91: remove the TC entry MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91 MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem and clock drivers ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c ARM: debug-ll: Add support for r7s9210 ...
| * \ \ Merge branch 'lpc32xx/multiplatform' into arm/socArnd Bergmann2019-08-153-51/+76
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I revisited some older patches here, getting two of the remaining ARM platforms to build with ARCH_MULTIPLATFORM like most others do. In case of lpc32xx, I created a new set of patches, which seemed easier than digging out what I did for an older release many years ago. * lpc32xx/multiplatform: ARM: lpc32xx: allow multiplatform build ARM: lpc32xx: clean up header files serial: lpc32xx: allow compile testing net: lpc-enet: allow compile testing net: lpc-enet: fix printk format strings net: lpc-enet: fix badzero.cocci warnings net: lpc-enet: move phy setup into platform code net: lpc-enet: factor out iram access gpio: lpc32xx: allow building on non-lpc32xx targets serial: lpc32xx_hs: allow compile-testing watchdog: pnx4008_wdt: allow compile-testing usb: udc: lpc32xx: allow compile-testing usb: ohci-nxp: enable compile-testing Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | gpio: lpc32xx: allow building on non-lpc32xx targetsArnd Bergmann2019-08-153-51/+76
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver uses hardwire MMIO addresses instead of the data that is passed in device tree. Change it over to only hardcode the register offset values and allow compile-testing. Link: https://lore.kernel.org/r/20190809144043.476786-6-arnd@arndb.de Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * / | ARM: remove Intel iop33x and iop13xx supportArnd Bergmann2019-08-141-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three families of IOP machines we support in Linux: iop32x (which includes EP80219), iop33x and iop13xx (aka IOP34x aka WP8134x). All products we support in the kernel are based on the first of these, iop32x, the other families only ever supported the Intel reference boards but no actual machine anyone could ever buy. While one could clearly make them all three work in a single kernel with some work, this takes the easy way out, removing the later two platforms entirely, under the assumption that there are no remaining users. Earlier versions of OpenWRT and Debian both had support for iop32x but not the others, and they both dropped iop32x as well in their 2015 releases. Link: https://lore.kernel.org/r/20190809163334.489360-1-arnd@arndb.de Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C parts Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | Merge tag 'gpio-v5.4-1' of ↵Linus Torvalds2019-09-1652-1498/+1999
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of changes in the GPIO subsystem for the v5.4 kernel cycle. Core changes: - Support hierarchical GPIO irqchips. We now have three consumers that can use this: Intel IXP4xx, ThunderX and Qualcomm SPMI GPIO (in the pinctrl subsystem). The support code has been long in the making and hashed out so it should be easily adaptable for all hierarchical irqchip parents. The code only gets compiled in if hierarchical irqchip is used at the topmost irq controller at least, as the hierarchical irqchip requires strict hierarchy all the way up in the system. - Determine the need for a "valid_mask" for GPIO lines on the gpio_chip and conversely for the "valid_mask" for the GPIO interrupt chip interrupt lines by looking for a .init_valid_mask() callback in the main chip or GPIO interrupt chip respectively. Allocate it with bitmap_alloc(). - Isolate the device tree/open firmware GPIO description code out in its own file properly. - Isolate the ACPI GPIO description code out in its own file properly. - Drop a whole lot of #ifdef:s in the main includes: it does not hurt to keep the include items around, and we get quicker and clearer compile failures if the appropriate kernel symbols are not selected for drivers. New/deleted drivers: - New driver for Aspeed SGPIO. - The KS8695 driver is deleted as the platform gets deleted from arch/arm in this kernel cycle. - The Cirrus Logic Madera driver now supports CS47L92 and CS47L15. - The Freescale MPC8xxx now supports LS1028A and LS1088A. Driver improvements: - We pass the GPIO irqchip intialization by directly filling in the struct instead of using set-up functions (the new way) for Intel MID, Lynxpoint, Merrifield, XLP, HLWD, Aspeed, ZX, VF610, TQMX86, MT7621, Zynq and EP93xx. Out-of-band changes: - Fix a GPIO header inclusion in Unicore - no response from maintainer. - Drop FMC subsystem from MAINTAINERS - was deleted in the GPIO tree last cycle so let's mop up the shards" * tag 'gpio-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (82 commits) gpiolib: of: add a fallback for wlf,reset GPIO name gpio: htc-egpio: Remove unused exported htc_egpio_get_wakeup_irq() gpio: remove explicit comparison with 0 gpio: creg-snps: use devm_platform_ioremap_resource() to simplify code gpio: devres: Switch to EXPORT_SYMBOL_GPL() gpio: of: Switch to EXPORT_SYMBOL_GPL() gpio: of: Make of_gpio_simple_xlate() private gpio: of: Make of_get_named_gpiod_flags() private gpio: aspeed: Add in ast2600 details to Aspeed driver gpio: aspeed: Use ngpio property from device tree if available gpio: aspeed: Setup irqchip dynamically gpio/aspeed: Fix incorrect number of banks gpio: aspeed: Update documentation with ast2600 controllers gpio: Initialize the irqchip valid_mask with a callback gpiolib: acpi: make acpi_can_fallback_to_crs() static gpio: Fix further merge errors gpio: Fix up merge collision in include file gpio: of: Normalize return code variable name gpio: gpiolib: Normalize return code variable name gpio: ep93xx: Pass irqchip when adding gpiochip ...
| * | | gpiolib: of: add a fallback for wlf,reset GPIO nameDmitry Torokhov2019-09-121-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old Arizona binding did not use -gpio or -gpios suffix, so devm_gpiod_get() does not work for it. As it is the one of a few users of devm_gpiod_get_from_of_node() API that I want to remove, I'd rather have a small quirk in the gpiolib OF handler, and switch Arizona driver to devm_gpiod_get(). Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20190911075215.78047-2-dmitry.torokhov@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: htc-egpio: Remove unused exported htc_egpio_get_wakeup_irq()Geert Uytterhoeven2019-09-121-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function was never used upstream, and is a relic of the original handhelds.org code the htc-egpio driver was based on. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190910141529.21030-1-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: remove explicit comparison with 0Saiyam Doshi2019-09-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No need to compare return value with 0. In case of non-zero return value, the if condition will be true. This makes intent a bit more clear to the reader. "if (x) then", compared to "if (x is not zero) then". Signed-off-by: Saiyam Doshi <saiyamdoshi.in@gmail.com> Link: https://lore.kernel.org/r/20190907173910.GA9547@SD Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: creg-snps: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-09-111-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20190906131032.22148-1-yuehaibing@huawei.com Acked-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: devres: Switch to EXPORT_SYMBOL_GPL()Geert Uytterhoeven2019-09-111-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change all exported symbols for managed GPIO functions from EXPORT_SYMBOL() to EXPORT_SYMBOL_GPL(), like is used for their non-managed counterparts. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190906084539.21838-5-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: of: Switch to EXPORT_SYMBOL_GPL()Geert Uytterhoeven2019-09-111-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All exported functions provide genuine Linux-specific functionality. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190906084539.21838-4-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: of: Make of_gpio_simple_xlate() privateGeert Uytterhoeven2019-09-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 9a95e8d25a140ba9 ("gpio: remove etraxfs driver"), there are no more users of of_gpio_simple_xlate() outside gpiolib-of.c. All GPIO drivers that need it now rely on of_gpiochip_add() setting it up as the default translate function. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190906084539.21838-3-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: of: Make of_get_named_gpiod_flags() privateGeert Uytterhoeven2019-09-112-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit f626d6dfb7098525 ("gpio: of: Break out OF-only code"), there are no more users of of_get_named_gpiod_flags() outside gpiolib-of.c. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190906084539.21838-2-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: aspeed: Add in ast2600 details to Aspeed driverRashmica Gupta2019-09-111-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ast2600 is a new generation of SoC from ASPEED. Similarly to the ast2400 and ast2500, it has a GPIO controller for it's 3.3V GPIO pins. Additionally, it has a GPIO controller for 1.8V GPIO pins. As the register names for both controllers are the same and the 36 1.8V GPIOs and the first 36 of the 3.3V GPIOs are all bidirectional, we can use the same configuration struct and use the ngpio property to differentiate between the two sets of GPIOs. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Link: https://lore.kernel.org/r/20190906063737.15428-1-rashmica.g@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: aspeed: Use ngpio property from device tree if availableRashmica Gupta2019-09-111-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the ngpio property from the device tree if it exists. If it doesn't then fallback to the hardcoded value in the config. This is in preparation for adding ast2600 support. The ast2600 SoC has two GPIO controllers and so requires two instances of the GPIO driver. We use the ngpio property to different between them as they have different numbers of GPIOs. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Link: https://lore.kernel.org/r/20190906062727.13521-1-rashmica.g@gmail.com Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: aspeed: Setup irqchip dynamicallyRashmica Gupta2019-09-111-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation for adding ast2600 support. The ast2600 SoC requires two instances of the GPIO driver as it has two GPIO controllers. Each instance needs it's own irqchip. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Link: https://lore.kernel.org/r/20190906062644.13445-1-rashmica.g@gmail.com Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio/aspeed: Fix incorrect number of banksRashmica Gupta2019-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current calculation for the number of GPIO banks is only correct if the number of GPIOs is a multiple of 32 (if there were 31 GPIOs we would currently say there are 0 banks, which is incorrect). Fixes: 361b79119a4b7 ('gpio: Add Aspeed driver') Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190906062623.13354-1-rashmica.g@gmail.com Reviewed-by: Joel Stanley <joel@jms.d.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: Initialize the irqchip valid_mask with a callbackLinus Walleij2019-09-114-30/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After changing the valid_mask for the struct gpio_chip to detect the need and presence of a valid mask with the presence of a .init_valid_mask() callback to fill it in, we augment the gpio_irq_chip to use the same logic. Switch all driver using the gpio_irq_chio valid_mask over to this new method. This makes sure the valid_mask for the gpio_irq_chip gets filled in when we add the gpio_chip, which makes it a little easier to switch over drivers using the old way of setting up gpio_irq_chip over to the new method of passing the gpio_irq_chip along with the gpio_chip. (See drivers/gpio/TODO for details.) Cc: Joel Stanley <joel@jms.id.au> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20190904140104.32426-1-linus.walleij@linaro.org
| * | | gpiolib: acpi: make acpi_can_fallback_to_crs() staticDmitry Torokhov2019-09-102-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not used outside gpiolib-acpi.c module, so there is no need to export it. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20190904172624.GA76617@dtor-ws Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | Merge tag 'intel-gpio-v5.4-1' of ↵Linus Walleij2019-09-104-49/+55
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel intel-gpio for v5.4-1 The clean up of IRQ chip initialization has been done in few drivers. Stale record in MAINTAINERS database is removed. The following is an automated git shortlog grouped by driver: intel-mid: - Pass irqchip when adding gpiochip - MAINTAINERS: Remove stale record for gpio-intel-mid.c lynxpoint: - Pass irqchip when adding gpiochip merrifield: - Pass irqchip when adding gpiochip pch: - Use dev_get_drvdata
| | * | | gpio: merrifield: Pass irqchip when adding gpiochipLinus Walleij2019-08-121-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | gpio: lynxpoint: Pass irqchip when adding gpiochipLinus Walleij2019-08-121-15/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | gpio: intel-mid: Pass irqchip when adding gpiochipLinus Walleij2019-08-121-18/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | gpio: pch: Use dev_get_drvdataChuhong Yuan2019-07-231-4/+2
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using to_pci_dev + pci_get_drvdata, use dev_get_drvdata to make code simpler. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Acked-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | gpio: Fix further merge errorsLinus Walleij2019-09-061-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous merge of v5.3-rc7 was struggle enough, now it gave rise to new errors and now I fix those too. Fixes: 151a41014bff ("Merge tag 'v5.3-rc7' into devel") Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | Merge tag 'v5.3-rc7' into develLinus Walleij2019-09-052-26/+35
| |\ \ \ | | | | | | | | | | | | | | | Linux 5.3-rc7
| * | | | gpio: of: Normalize return code variable nameLinus Walleij2019-09-041-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is confusing to name return variables mixedly "status", "err" or "ret". I just changed them all to "ret", by personal preference, to lower cognitive stress. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190716115854.12098-1-linus.walleij@linaro.org
| * | | | gpio: gpiolib: Normalize return code variable nameLinus Walleij2019-09-041-110/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is confusing to name return variables mixedly "status", "err" or "ret". I just changed them all to "ret", by personal preference, to lower cognitive stress. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190716091145.8235-1-linus.walleij@linaro.org
| * | | | gpio: ep93xx: Pass irqchip when adding gpiochipLinus Walleij2019-09-041-67/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Alexander Sverdlin <alexander.sverdlin@gmail.com> Cc: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Thierry Reding <treding@nvidia.com> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190812130000.22252-1-linus.walleij@linaro.org
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-18 13:43:33 +0000