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* gpio: pxa: avoid attempting to set pin direction via pinctrl on MMP2Lubomir Rintel2019-02-141-0/+1
| | | | | | | | | | | | Similarly to PXA3xx, pinctrl-single can't set pin direction on MMP2 either. See also: commit 9dabfdd84bdfa ("gpio: pxa: disable pinctrl calls for PXA3xx") Cc: stable@vger.kernel.org Fixes: a770d946371e ("gpio: pxa: add pin control gpio direction and request") Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: MT7621: use a per instance irq_chip structureRené van Dorst2019-02-081-10/+10
| | | | | | | | | | | | | | | | This fixes the kernel complains: gpio gpiochip1: (1e000600.gpio-bank1): detected irqchip that is shared with multiple gpiochips: please fix the driver. gpio gpiochip2: (1e000600.gpio-bank2): detected irqchip that is shared with multiple gpiochips: please fix the driver. Fixes: 4ba9c3afda41 ("gpio: mt7621: Add a driver for MT7621") Cc: stable@vger.kernel.org Signed-off-by: René van Dorst <opensource@vdorst.com> Cc: linux-gpio@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Tested-by: Greg Ungerer <gerg@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: vf610: Mask all GPIO interruptsAndrew Lunn2019-01-281-0/+5
| | | | | | | | | | | | | | | | | On SoC reset all GPIO interrupts are disable. However, if kexec is used to boot into a new kernel, the SoC does not experience a reset. Hence GPIO interrupts can be left enabled from the previous kernel. It is then possible for the interrupt to fire before an interrupt handler is registered, resulting in the kernel complaining of an "unexpected IRQ trap", the interrupt is never cleared, and so fires again, resulting in an interrupt storm. Disable all GPIO interrupts before registering the GPIO IRQ chip. Fixes: 7f2691a19627 ("gpio: vf610: add gpiolib/IRQ chip driver for Vybrid") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: altera-a10sr: Set proper output level for direction_outputAxel Lin2019-01-231-1/+3
| | | | | | | | | | | | The altr_a10sr_gpio_direction_output should set proper output level based on the value argument. Fixes: 26a48c4cc2f1 ("gpio: altera-a10sr: Add A10 System Resource Chip GPIO support.") Cc: <stable@vger.kernel.org> Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpio: sprd: Fix incorrect irq type setting for the async EICNeo Hou2019-01-231-0/+1
| | | | | | | | | | | | | When setting async EIC as IRQ_TYPE_EDGE_BOTH type, we missed to set the SPRD_EIC_ASYNC_INTMODE register to 0, which means detecting edge signals. Thus this patch fixes the issue. Fixes: 25518e024e3a ("gpio: Add Spreadtrum EIC driver support") Cc: <stable@vger.kernel.org> Signed-off-by: Neo Hou <neo.hou@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpio: sprd: Fix the incorrect data registerNeo Hou2019-01-231-1/+12
| | | | | | | | | | | Since differnt type EICs have its own data register to read, thus fix the incorrect data register. Fixes: 25518e024e3a ("gpio: Add Spreadtrum EIC driver support") Cc: <stable@vger.kernel.org> Signed-off-by: Neo Hou <neo.hou@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpiolib: fix line event timestamps for nested irqsBartosz Golaszewski2019-01-231-1/+8
| | | | | | | | | | | | | | | | Nested interrupts run inside the calling thread's context and the top half handler is never called which means that we never read the timestamp. This issue came up when trying to read line events from a gpiochip using regmap_irq_chip for interrupts. Fix it by reading the timestamp from the irq thread function if it's still 0 by the time the second handler is called. Fixes: d58f2bf261fd ("gpio: Timestamp events in hardirq handler") Cc: stable@vger.kernel.org Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpio: pcf857x: Fix interrupts on multiple instancesRoger Quadros2019-01-231-14/+12
| | | | | | | | | | | | | | | | | | When multiple instances of pcf857x chips are present, a fix up message [1] is printed during the probe of the 2nd and later instances. The issue is that the driver is using the same irq_chip data structure between multiple instances. Fix this by allocating the irq_chip data structure per instance. [1] fix up message addressed by this patch [ 1.212100] gpio gpiochip9: (pcf8575): detected irqchip that is shared with multiple gpiochips: please fix the driver. Cc: Stable <stable@vger.kernel.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpio: pca953x: Make symbol 'pca953x_i2c_regmap' staticWei Yongjun2019-01-111-1/+1
| | | | | | | | | | | | Fixes the following sparse warning: drivers/gpio/gpio-pca953x.c:292:28: warning: symbol 'pca953x_i2c_regmap' was not declared. Should it be static? Fixes: 49427232764d ("gpio: pca953x: Perform basic regmap conversion") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib-acpi: Remove unnecessary WARN_ON from acpi_gpiochip_free_interruptsHans de Goede2019-01-071-6/+1
| | | | | | | | | | | | acpi_gpiochip_alloc_event only continues allocating an event and adding it to the list if gpiochip_request_own_desc does not return an error. So events with an error desc are never placed on the events list and this check is really not necessary. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'gpio-v4.21-1' of ↵Linus Torvalds2018-12-2841-648/+1584
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.21 kernel series. Core changes: - Some core changes are already in outside of this pull request as they came through the regulator tree, most notably devm_gpiod_unhinge() that removes devres refcount management from a GPIO descriptor. This is needed in subsystems such as regulators where the regulator core need to take over the reference counting and lifecycle management for a GPIO descriptor. - We dropped devm_gpiochip_remove() and devm_gpio_chip_match() as nothing needs it. We can bring it back if need be. - Add a global TODO so people see where we are going. This helps setting the direction now that we are two GPIO maintainers. - Handle the MMC CD/WP properties in the device tree core. (The bulk of patches activating this code is already merged through the MMC/SD tree.) - Augment gpiochip_request_own_desc() to pass a flag so we as gpiochips can request lines as active low or open drain etc even from ourselves. New drivers: - New driver for Cadence GPIO blocks. - New driver for Atmel SAMA5D2 PIOBU GPIO lines. Driver improvements: - A major refactoring of the PCA953x driver - this driver has been around for ages, and is now modernized to reduce code duplication that has stacked up and is using regmap to read write and cache registers. - Intel drivers are now maintained in a separate tree and start with a round of cleanups and unifications" * tag 'gpio-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (99 commits) gpio: sama5d2-piobu: Depend on OF_GPIO gpio: Add Cadence GPIO driver dt-bindings: gpio: Add bindings for Cadence GPIO gpiolib-acpi: remove unused variable 'err', cleans up build warning gpio: mxs: read pin level directly instead of using .get gpio: aspeed: remove duplicated statement gpio: add driver for SAMA5D2 PIOBU pins dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller gpio/mmc/of: Respect polarity in the device tree dt-bindings: gpio: rcar: Add r8a774c0 (RZ/G2E) support memory: omap-gpmc: Get the header of the enum ARM: omap1: Fix new user of gpiochip_request_own_desc() gpio: pca953x: Add regmap dependency for PCA953x driver gpio: raspberrypi-exp: decrease refcount on firmware dt node gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB gpio: pca953x: Restore registers after suspend/resume cycle gpio: pca953x: Zap single use of pca953x_read_single() gpio: pca953x: Zap ad-hoc reg_output cache gpio: pca953x: Zap ad-hoc reg_direction cache gpio: pca953x: Perform basic regmap conversion ...
| * gpio: sama5d2-piobu: Depend on OF_GPIOLinus Walleij2018-12-221-0/+1
| | | | | | | | | | | | | | | | This driver clearly needs OF_GPIO so depend on it. Fixes a build error. Cc: Andrei Stefanescu <Andrei.Stefanescu@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: Add Cadence GPIO driverJan Kotas2018-12-213-0/+300
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for Cadence GPIO controller. It can be enabled with GPIO_CADENCE Kconfig option. It uses generic GPIO infrastructure and works as an interrupt controller. At the moment it only supports level sensitive irqs. Signed-off-by: Jan Kotas <jank@cadence.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpiolib-acpi: remove unused variable 'err', cleans up build warningColin Ian King2018-12-211-1/+0
| | | | | | | | | | | | | | | | | | | | Variable err is defined but never used. Remove it. Cleans up warning: warning: unused variable ‘err’ [-Wunused-variable] Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: mxs: read pin level directly instead of using .getUwe Kleine-König2018-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | Calling readl directly instead of going through another function that results in the same result to remove some overhead. I didn't try to measure the performance gain, but IMHO there is little benefit from abstracting a GPIO register access in the GPIO driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: aspeed: remove duplicated statementTao Ren2018-12-211-1/+0
| | | | | | | | | | | | | | | | Remove duplicated assignment statement from aspeed_gpio_probe() function. Signed-off-by: Tao Ren <taoren@fb.com> Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: add driver for SAMA5D2 PIOBU pinsAndrei.Stefanescu@microchip.com2018-12-213-0/+265
| | | | | | | | | | | | | | | | | | | | | | | | PIOBU pins do not lose their voltage during Backup/Self-refresh. This patch adds a simple GPIO controller for them and a maintainer for the driver. This driver adds support for using the pins as GPIO offering the possibility to read/set the voltage. Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio/mmc/of: Respect polarity in the device treeLinus Walleij2018-12-171-33/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree bindings for the MMC card detect and write protect lines specify that these should be active low unless "cd-inverted" or "wp-inverted" has been specified. However that is not how the kernel code has worked. It has always respected the flags passed to the phandle in the device tree, but respected the "cd-inverted" and "wp-inverted" flags such that if those are set, the polarity will be the inverse of that specified in the device tree. Switch to behaving like the old code did and fix the regression. Fixes: 81c85ec15a19 ("gpio: OF: Parse MMC-specific CD and WP properties") Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Guenter Roeck <linux@roeck-us.net> Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: pca953x: Add regmap dependency for PCA953x driverMarek Vasut2018-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | Select REGMAP_I2C in Kconfig, since the driver now depends on regmap and this was missing, thus breaking build on various systems. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * gpio: raspberrypi-exp: decrease refcount on firmware dt nodeNicolas Saenz Julienne2018-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | We're getting a reference RPi's firmware node in order to be able to communicate with it's driver. We should decrease the reference count on the dt node after being done with it. Fixes: a98d90e7d588 ("gpio: raspberrypi-exp: Driver for RPi3 GPIO expander via mailbox service") Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge branch 'ib-pca953x' into develLinus Walleij2018-12-141-182/+302
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| | * gpio: pca953x: Restore registers after suspend/resume cycleMarek Vasut2018-12-141-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Zap single use of pca953x_read_single()Marek Vasut2018-12-141-17/+5
| | | | | | | | | | | | | | | | | | | | | | | | Drop pca953x_write_single() which is used in one place. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Zap ad-hoc reg_output cacheMarek Vasut2018-12-141-50/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Zap ad-hoc reg_direction cacheMarek Vasut2018-12-141-24/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Perform basic regmap conversionMarek Vasut2018-12-141-8/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Extract the register address mangling to single functionMarek Vasut2018-12-141-30/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Zap ad-hoc I2C block write in multi GPIO setMarek Vasut2018-12-141-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Factor out common code from device_pca95xx_init()Marek Vasut2018-12-141-23/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Unify pca953x_{read,write}_regs_{8,mul}()Marek Vasut2018-12-141-46/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Unify pca953x_{read,write}_regs_{16,24}()Marek Vasut2018-12-141-31/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Unify pca95{3,7}x_write_regs_16()Marek Vasut2018-12-141-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Repair multi-byte IO address increment on PCA9575Marek Vasut2018-12-141-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Fix AI overflow on PCAL6524Marek Vasut2018-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * gpio: pca953x: Deduplicate the bank_shiftMarek Vasut2018-12-141-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bank_shift = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: tegra186: Rename flow variable to typeThierry Reding2018-12-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ core code refers to the interrupt type by that name, whereas the term flow is almost never used. Some GPIO controllers use the term flow_type, but it is most consistent to just go with the IRQ core terminology. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge tag 'intel-gpio-v4.21-1' of ↵Linus Walleij2018-12-147-288/+116
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel intel-gpio for v4.21-1 Use managed resource allocation in pch and sodaville drivers. Switch to use for_each_set_bit() in IRQ handlers. Headers clean up. Sort headers in inclusion block alphabetically for better maintenance. Convert to SPDX identifier and fixing MODULE_LICENSE() when appropriate. Additional format fixes to rectify debug and message printing. There is a commit which had been applied to v4.20-rc4, that's why dup. - c3bc3ff9e8019fba74ce62bfb501d710c2fca9d3 MAINTAINERS: Do maintain Intel GPIO drivers via separate tree The following is an automated git shortlog grouped by driver: ich: - Convert to use SPDX identifier - Sort headers alphabetically - Join string literals back - Convert pr_<level> to dev_<level> - Switch to use struct device instead of platform_device - Simplify error handling in ichx_write_bit() intel-mid: - Convert to use SPDX identifier - Remove linux/module.h and sort headers lynxpoint: - Convert to use SPDX identifier - Remove linux/init.h and sort headers - Use for_each_set_bit() in IRQ handler MAINTAINERS: - Do maintain Intel GPIO drivers via separate tree merrifield: - Convert to use SPDX identifier - Remove linux/init.h pch: - Convert to use SPDX identifier - Sort headers alphabetically - Remove duplicate assignments - Remove redundant __func__ from debug print - Use for_each_set_bit() in IRQ handler - Convert to dev_pm_ops - Convert to use managed functions pcim_* and devm_* sch: - Convert to use SPDX identifier - Remove linux/init.h and sort headers sodaville: - Convert to use SPDX identifier - Sort headers alphabetically - Use for_each_set_bit() in IRQ handler - Convert to use managed functions pcim_* and devm_*
| | * | gpio: sodaville: Convert to use SPDX identifierAndy Shevchenko2018-12-071-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: sch: Convert to use SPDX identifierAndy Shevchenko2018-12-071-14/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: pch: Convert to use SPDX identifierAndy Shevchenko2018-12-071-14/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: merrifield: Convert to use SPDX identifierAndy Shevchenko2018-12-071-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: lynxpoint: Convert to use SPDX identifierAndy Shevchenko2018-12-071-15/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: intel-mid: Convert to use SPDX identifierAndy Shevchenko2018-12-071-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: ich: Convert to use SPDX identifierAndy Shevchenko2018-12-071-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: sodaville: Sort headers alphabeticallyAndy Shevchenko2018-12-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: pch: Sort headers alphabeticallyAndy Shevchenko2018-12-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: ich: Sort headers alphabeticallyAndy Shevchenko2018-12-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: sch: Remove linux/init.h and sort headersAndy Shevchenko2018-12-071-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. While here, sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: merrifield: Remove linux/init.hAndy Shevchenko2018-12-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | gpio: lynxpoint: Remove linux/init.h and sort headersAndy Shevchenko2018-12-071-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. While here, sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-10 02:54:10 +0000