| Commit message (Collapse) | Author | Age | Files | Lines |
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Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
machines, and each machine type provides its own gpio.h. However
only a handful really implement the GPIO API, most just forward
everythings to gpiolib.
The Alchemy machine is notable as it provides a system to allow
implementing the GPIO API at the board level. But it is not used by
any board currently supported, so it can also be removed.
For most machine types we can just remove the custom gpio.h, as well
as the custom wrappers if some exists. Some of the code found in
the wrappers must be moved to the respective GPIO driver.
A few more fixes are need in some drivers as they rely on linux/gpio.h
to provides some machine specific definitions, or used asm/gpio.h
instead of linux/gpio.h for the gpio API.
Signed-off-by: Alban Bedel <albeu@free.fr>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Rafał Miłecki <zajec5@gmail.com>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Joe Perches <joe@perches.com>
Cc: Daniel Walter <dwalter@google.com>
Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: James Hartley <james.hartley@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Varka Bhadram <varkabhadram@gmail.com>
Cc: Masanari Iida <standby24x7@gmail.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Michael Buesch <m@bues.ch>
Cc: abdoulaye berthe <berthe.ab@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-ide@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: netdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10828/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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GPIO drivers should be in drivers/gpio
Signed-off-by: Alban Bedel <albeu@free.fr>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10597/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Ingo Molnar:
"Misc irq fixes:
- two driver fixes
- a Xen regression fix
- a nested irq thread crash fix"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/gicv3-its: Fix mapping of LPIs to collections
genirq: Prevent resend to interrupts marked IRQ_NESTED_THREAD
genirq: Revert sparse irq locking around __cpu_up() and move it to x86 for now
gpio/davinci: Fix race in installing chained irq handler
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Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().
Search and conversion was done with coccinelle.
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
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pca953x interrupt controller functionality is implemented using
nested threaded IRQs which require parent_irq to be configured
properly otherwise below warning can be seen if IRQ core
will try re-schedule nested IRQ:
------------[ cut here ]------------
WARNING: CPU: 1 PID: 12 at kernel/irq/manage.c:696 irq_nested_primary_handler+0x30/0x38()
Primary handler called for nested irq 301
Modules linked in: uinput ipv6 smsc95xx usbnet mii imx2_wdt etnaviv(C) matrix_keypad matrix_keymap ar1021_i2c
CPU: 1 PID: 12 Comm: ksoftirqd/1 Tainted: G WC 4.1.1 #9
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
Backtrace:
[<c0013298>] (dump_backtrace) from [<c0013488>] (show_stack+0x20/0x24)
[<c0013468>] (show_stack) from [<c05743c4>] (dump_stack+0x70/0xc0)
[<c0574354>] (dump_stack) from [<c002b7b8>] (warn_slowpath_common+0x88/0xc0)
[<c002b730>] (warn_slowpath_common) from [<c002b8ac>] (warn_slowpath_fmt+0x40/0x48)
[<c002b870>] (warn_slowpath_fmt) from [<c0075798>] (irq_nested_primary_handler+0x30/0x38)
[<c0075768>] (irq_nested_primary_handler) from [<c0075200>] (handle_irq_event_percpu+0x70/0x2d0)
[<c0075190>] (handle_irq_event_percpu) from [<c00754ac>] (handle_irq_event+0x4c/0x6c)
[<c0075460>] (handle_irq_event) from [<c0078204>] (handle_simple_irq+0xa4/0xc8)
[<c0078160>] (handle_simple_irq) from [<c0077cd4>] (resend_irqs+0x50/0x7c)
[<c0077c84>] (resend_irqs) from [<c002f99c>] (tasklet_action+0x94/0x140)
[<c002f908>] (tasklet_action) from [<c002eea8>] (__do_softirq+0xa0/0x3c8)
[<c002ee08>] (__do_softirq) from [<c002f208>] (run_ksoftirqd+0x38/0x54)
[<c002f1d0>] (run_ksoftirqd) from [<c004b1e4>] (smpboot_thread_fn+0x1f8/0x2f0)
[<c004afec>] (smpboot_thread_fn) from [<c0047744>] (kthread+0xe8/0x104)
[<c004765c>] (kthread) from [<c000fac8>] (ret_from_fork+0x14/0x2c)
---[ end trace 96052cda48865769 ]---
The issue was reported and described in details by Lothar Waßmann and
Christian Gmeiner in https://lkml.org/lkml/2014/9/9/123.
Fix it by adding missed call of gpiochip_set_chained_irqchip()
so GPIO IRQ chip helpers will set parent_irq for nested IRQs
properly.
Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Tested-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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OMAP GPIO driver allowed to be built as loadable module, but it
doesn't set owner field in GPIO chip structure. As result,
module_get/put() API is not working and it's possible to unload
OMAP driver while in use:
omap_gpio 48051000.gpio: REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED
Hence, add missing configuration.
Cc: Tony Lindgren <tony@atomide.com>
Fixes: cac089f9026e ('gpio: omap: Allow building as a loadable module')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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In case the gpiochip doesn't have the .dev field set, as is the case
in here, it is not possible to reference this device in DT as a GPIO
controller. A good example of this problem is that gpio-leds can not
be used when connected to this chip, the gpio-leds driver bails out
with -EPROBE_DEFER.
Fix this problem by setting the .dev field of the gpio_chip to the
parent i2c device.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Mans Rullgard <mans@mansr.com>
Cc: Olaf Mandel <o.mandel@menlosystems.com>
Cc: Semen Protsenko <semen.protsenko@globallogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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xgpio_save_regs() is used in this driver to setup the initial
values of the registers in the hardware.
The relevant registers at that time are:
0x0 -> channel 0 data (32 bits, one for each GPIO on this channel).
0x4 -> channel 0 tri, controls in/out status for each GPIO of this channel.
0x8 -> channel 1 data
0xC -> channel 1 tri
gpio-xilinx.c defines these:
XGPIO_DATA_OFFSET (0x0)
XGPIO_TRI_OFFSET (0x4)
XGPIO_CHANNEL_OFFSET 0x8
Before this patch, the "data" register value of channel 1 was written
at 0x4 intead of 0x8 (overwriting the channel 0 "tri" register),
and the "tri" register value for channel 1 was written at 0x8 instead of 0xC.
Signed-off-by: Raphaël Teysseyre <rteysseyre@gmail.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add missing pm_runtime_disabled to remove().
Error log:
root@zynqmp:~# modprobe gpio_zynq
root@zynqmp:~# lsmod
Not tainted
gpio_zynq 7086 0 - Live 0xffffffbffc00a000
root@zynqmp:~# rmmod gpio_zynq
root@zynqmp:~# lsmod
Not tainted
root@zynqmp:~# modprobe gpio_zynq
[ 246.924438] zynq-gpio ff0a0000.gpio: Unbalanced pm_runtime_enable!
root@zynqmp:~# rmmod gpio_zynq
root@zynqmp:~# lsmod
Not tainted
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add missed spin_unlock_irqrestore in omap_gpio_irq_type when
omap_set_gpio_triggering() is failed.
It fixes static checker warning:
drivers/gpio/gpio-omap.c:523 omap_gpio_irq_type()
warn: inconsistent returns 'spin_lock:&bank->lock'.
This fixes commit:
1562e4618ded ('gpio: omap: fix error handling in omap_gpio_irq_type')
Reported-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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If a failure occurs during probe, brcmstb_gpio_remove() is called. In
remove, we call platform_get_drvdata(), but at the time of failure in
the probe the driver data hadn't yet been set which leads to a NULL
ptr dereference in the remove's list_for_each. Call
platform_set_drvdata() and set up list head right after allocating the
priv struct to both avoid the null pointer dereference that could
occur today. To guard against potential future changes, check for
null pointer in remove.
Reported-by: Tim Ross <tross@broadcom.com>
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner:
"This contains:
- a series of fixes for interrupt drivers to prevent a potential race
when installing a chained interrupt handler
- a fix for cpumask pointer misuse
- a fix for using the wrong interrupt number from struct irq_data
- removal of unused code and outdated comments
- a few new helper functions which allow us to cleanup the interrupt
handling code further in 4.3
I decided against doing the cleanup at the end of this merge window
and rather do the preparatory steps for 4.3, so we can run the final
ABI change at the end of the 4.3 merge window with less risk"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (26 commits)
ARM/LPC32xx: Use irq not hwirq for __irq_set_handler_locked()
genirq: Implement irq_set_handler_locked()/irq_set_chip_handler_name_locked()
genirq: Introduce helper irq_desc_get_irq()
genirq: Remove irq_node()
genirq: Clean up outdated comments related to include/linux/irqdesc.h
mn10300: Fix incorrect use of irq_data->affinity
MIPS/ralink: Fix race in installing chained IRQ handler
MIPS/pci: Fix race in installing chained IRQ handler
MIPS/ath25: Fix race in installing chained IRQ handler
MIPS/ath25: Fix race in installing chained IRQ handler
m68k/psc: Fix race in installing chained IRQ handler
avr32/at32ap: Fix race in installing chained IRQ handler
sh/intc: Fix race in installing chained IRQ handler
sh/intc: Fix potential race in installing chained IRQ handler
pinctrl/sun4i: Fix race in installing chained IRQ handler
pinctrl/samsung: Fix race in installing chained IRQ handler
pinctrl/samsung: Fix race in installing chained IRQ handler
pinctrl/exynos: Fix race in installing chained IRQ handler
pinctrl/st: Fix race in installing chained IRQ handler
pinctrl/adi2: Fix race in installing chained IRQ handler
...
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Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().
Search and conversion was done with coccinelle:
@@
expression E1, E2, E3;
@@
(
-if (irq_set_chained_handler(E1, E3) != 0)
- BUG();
|
-irq_set_chained_handler(E1, E3);
)
-irq_set_handler_data(E1, E2);
+irq_set_chained_handler_and_data(E1, E3, E2);
@@
expression E1, E2, E3;
@@
(
-if (irq_set_chained_handler(E1, E3) != 0)
- BUG();
...
|
-irq_set_chained_handler(E1, E3);
...
)
-irq_set_handler_data(E1, E2);
+irq_set_chained_handler_and_data(E1, E3, E2);
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org
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Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().
Search and conversion was done with coccinelle:
@@
expression E1, E2, E3;
@@
(
-if (irq_set_chained_handler(E1, E3) != 0)
- BUG();
|
-irq_set_chained_handler(E1, E3);
)
-irq_set_handler_data(E1, E2);
+irq_set_chained_handler_and_data(E1, E3, E2);
@@
expression E1, E2, E3;
@@
(
-if (irq_set_chained_handler(E1, E3) != 0)
- BUG();
...
|
-irq_set_chained_handler(E1, E3);
...
)
-irq_set_handler_data(E1, E2);
+irq_set_chained_handler_and_data(E1, E3, E2);
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org
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Fix a race where a pending interrupt could be received and the handler
called before the handler's data has been setup, by converting to
irq_set_chained_handler_and_data().
Search and conversion was done with coccinelle:
@@
expression E1, E2, E3;
@@
(
-if (irq_set_chained_handler(E1, E3) != 0)
- BUG();
|
-irq_set_chained_handler(E1, E3);
)
-irq_set_handler_data(E1, E2);
+irq_set_chained_handler_and_data(E1, E3, E2);
@@
expression E1, E2, E3;
@@
(
-if (irq_set_chained_handler(E1, E3) != 0)
- BUG();
...
|
-irq_set_chained_handler(E1, E3);
...
)
-irq_set_handler_data(E1, E2);
+irq_set_chained_handler_and_data(E1, E3, E2);
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-gpio@vger.kernel.org
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI fixes from Rafael Wysocki:
"These are fixes that didn't make it to the previous PM+ACPI pull
request or are fixing issues introduced by it.
Specifics:
- Fix a recently added memory leak in an error path in the ACPI
resources management code (Dan Carpenter)
- Fix a build warning triggered by an ACPI video header function that
should be static inline (Borislav Petkov)
- Change names of helper function converting struct fwnode_handle
pointers to either struct device_node or struct acpi_device
pointers so they don't conflict with local variable names
(Alexander Sverdlin)
- Make the hibernate core re-enable nonboot CPUs on failures to
disable them as expected (Vitaly Kuznetsov)
- Increase the default timeout of the device suspend watchdog to
prevent it from triggering too early on some systems (Takashi Iwai)
- Prevent the cpuidle powernv driver from registering idle states
with CPUIDLE_FLAG_TIMER_STOP set if CONFIG_TICK_ONESHOT is unset
which leads to boot hangs (Preeti U Murthy)"
* tag 'pm+acpi-4.2-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
tick/idle/powerpc: Do not register idle states with CPUIDLE_FLAG_TIMER_STOP set in periodic mode
PM / sleep: Increase default DPM watchdog timeout to 60
PM / hibernate: re-enable nonboot cpus on disable_nonboot_cpus() failure
ACPI / OF: Rename of_node() and acpi_node() to to_of_node() and to_acpi_node()
ACPI / video: Inline acpi_video_set_dmi_backlight_type
ACPI / resources: free memory on error in add_region_before()
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* acpi-video:
ACPI / video: Inline acpi_video_set_dmi_backlight_type
* device-properties:
ACPI / OF: Rename of_node() and acpi_node() to to_of_node() and to_acpi_node()
* pm-sleep:
PM / sleep: Increase default DPM watchdog timeout to 60
PM / hibernate: re-enable nonboot cpus on disable_nonboot_cpus() failure
* pm-cpuidle:
tick/idle/powerpc: Do not register idle states with CPUIDLE_FLAG_TIMER_STOP set in periodic mode
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Commit 8a0662d9 introduced of_node and acpi_node symbols in global namespace
but there were already ~63 of_node local variables or function parameters
(no single acpi_node though, but anyway).
After debugging undefined but used of_node local varible (which turned out
to reference static function of_node() instead) it became clear that the names
for the functions are too short and too generic for global scope.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Here is the bulk of pin control changes for the v4.2 series: Quite a
lot of new SoC subdrivers and two new main drivers this time, apart
from that business as usual.
Details:
Core functionality:
- Enable exclusive pin ownership: it is possible to flag a pin
controller so that GPIO and other functions cannot use a single pin
simultaneously.
New drivers:
- NXP LPC18xx System Control Unit pin controller
- Imagination Pistachio SoC pin controller
New subdrivers:
- Freescale i.MX7d SoC
- Intel Sunrisepoint-H PCH
- Renesas PFC R8A7793
- Renesas PFC R8A7794
- Mediatek MT6397, MT8127
- SiRF Atlas 7
- Allwinner A33
- Qualcomm MSM8660
- Marvell Armada 395
- Rockchip RK3368
Cleanups:
- A big cleanup of the Marvell MVEBU driver rectifying it to
correspond to reality
- Drop platform device probing from the SH PFC driver, we are now a
DT only shop for SuperH
- Drop obsolte multi-platform check for SH PFC
- Various janitorial: constification, grammar etc
Improvements:
- The AT91 GPIO portions now supports the set_multiple() feature
- Split out SPI pins on the Xilinx Zynq
- Support DTs without specific function nodes in the i.MX driver"
* tag 'pinctrl-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: rockchip: add support for the rk3368
pinctrl: rockchip: generalize perpin driver-strength setting
pinctrl: sh-pfc: r8a7794: add SDHI pin groups
pinctrl: sh-pfc: r8a7794: add MMCIF pin groups
pinctrl: sh-pfc: add R8A7794 PFC support
pinctrl: make pinctrl_register() return proper error code
pinctrl: mvebu: armada-39x: add support for Armada 395 variant
pinctrl: mvebu: armada-39x: add missing SATA functions
pinctrl: mvebu: armada-39x: add missing PCIe functions
pinctrl: mvebu: armada-38x: add ptp functions
pinctrl: mvebu: armada-38x: add ua1 functions
pinctrl: mvebu: armada-38x: add nand functions
pinctrl: mvebu: armada-38x: add sata functions
pinctrl: mvebu: armada-xp: add dram functions
pinctrl: mvebu: armada-xp: add nand rb function
pinctrl: mvebu: armada-xp: add spi1 function
pinctrl: mvebu: armada-39x: normalize ref clock naming
pinctrl: mvebu: armada-xp: rename spi to spi0
pinctrl: mvebu: armada-370: align spi1 clock pin naming
pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet
...
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The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull gpio updates from Linus Walleij:
"This is the big bulk of GPIO changes queued for the v4.2 kernel
series:
- a big set of cleanups to the aged sysfs interface from Johan
Hovold. To get these in, v4.1-rc3 was merged into the tree as the
first patch in that series had to go into stable. This makes the
locking much more fine-grained (get rid of the "big GPIO lock(s)"
and store states in the GPIO descriptors.
- rename gpiod_[g|s]et_array() to gpiod_[g|s]et_array_value() to
avoid confusions.
- New drivers for:
* NXP LPC18xx (currently LPC1850)
* NetLogic XLP
* Broadcom STB SoC's
* Axis ETRAXFS
* Zynq Ultrascale+ (subdriver)
- ACPI:
* make it possible to retrieve GpioInt resources from a GPIO
device using acpi_dev_gpio_irq_get()
* merge some dependent I2C changes exploiting this.
* support the ARM X-Gene GPIO standby driver.
- make it possible for the generic GPIO driver to read back the value
set registers to reflect current status.
- loads of OMAP IRQ handling fixes.
- incremental improvements to Kona, max732x, OMAP, MXC, RCAR,
PCA953x, STP-XWAY, PCF857x, Crystalcove, TB10x.
- janitorial (constification, checkpatch cleanups)"
* tag 'gpio-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (71 commits)
gpio: Fix checkpatch.pl issues
gpio: pcf857x: handle only enabled irqs
gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found
GPIO / ACPI: export acpi_gpiochip_request(free)_interrupts for module use
gpio: improve error reporting on own descriptors
gpio: promote own request failure to pr_err()
gpio: Added support to Zynq Ultrascale+ MPSoC
gpio: add ETRAXFS GPIO driver
fix documentation after renaming gpiod_set_array to gpiod_set_array_value
gpio: Add GPIO support for Broadcom STB SoCs
gpio: xgene: add ACPI support for APM X-Gene GPIO standby driver
gpio: tb10x: Drop unneeded free_irq() call
gpio: crystalcove: set IRQCHIP_SKIP_SET_WAKE for the irqchip
gpio: stp-xway: Use the of_property_read_u32 helper
gpio: pcf857x: Check for irq_set_irq_wake() failures
gpio-stp-xway: Fix enabling the highest bit of the PHY LEDs
gpio: Prevent an integer overflow in the pca953x driver
gpio: omap: rework omap_gpio_irq_startup to handle current pin state properly
gpio: omap: rework omap_gpio_request to touch only gpio specific registers
gpio: omap: rework omap_x_irq_shutdown to touch only irqs specific registers
...
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This patch fixes some issues given by checkpatch. Fixes include
bracket placement, spacing and indenting.
Signed-off-by: Daniel Lockyer <thisisdaniellockyer@gmail.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now pcf857x_irq() IRQ's dispatcher will try to run nested
IRQ handlers for each GPIO pin which state has changed.
Such IRQs are, actually, spurious and nested IRQ handlers
have to be called only for IRQs wich were enabled by users.
This is not critical issue - just /proc/interrupts
will display counters for unused IRQS:
399: 4 0 pcf857x 0 Edge
428: 1 0 pcf857x 13 Edge
430: 1 0 pcf857x 15 Edge
Hence, fix it by adding irq_enabled field in struct pcf857x to track
enabled GPIO IRQs and corresponding callbacks in pcf857x_irq_chip.
Similar functionality was presented in pcf857x driver, commit
21fd3cd1874a ('gpio: pcf857x: call the gpio user handler iff...')
and then it was removed by commit
a39294bdf4b0 ('gpio: pcf857x: Switch to use gpiolib irqchip...')
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: a39294bdf4b0 ('gpio: pcf857x: Switch to use gpiolib irqchip helpers')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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If a driver requests a GPIO described in its _CRS but the GPIO host
controller (gpiochip) driver providing the GPIO has not been loaded yet
acpi_get_gpiod() returns -ENODEV which causes the calling driver to fail.
If the gpiochip driver is loaded afterwards the driver requesting the GPIO
will not notice this.
Better approach is to return -EPROBE_DEFER in such case. Then when the
gpiochip driver appears the driver requesting the GPIO will be probed
again. This also aligns ACPI GPIO lookup code closer to DT as it does
pretty much the same when no gpiochip driver was found.
Reported-by: Tobias Diedrich <tobiasdiedrich@gmail.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Tobias Diedrich <ranma+kernel@tdiedrich.de>
Reviewed-by: Amos Kong <kongjianjun@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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acpi_gpiochip_request(free)_interrupts can be used for modules,
so export them. This also fixs a compile error when xgene-sb
configured as kernel module.
Fixes: 733cf014f020 "gpio: xgene: add ACPI support for APM X-Gene GPIO standby driver"
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
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When requesting own descriptors through hogs, it is useful to
get some details about what's going on if we encounter problems.
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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These error messages are helpful to see that we fail to get
hogs. Promote them to real errors so they appear in the boot
crawl.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Added support to Zynq Ultrascale+ MPSoC on the existing zynq
gpio driver.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add a GPIO driver for the General I/O block on Axis ETRAX FS SoCs.
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for the GPIO IP "UPG GIO" used on
Broadcom STB SoCs (BCM7XXX and some others). Uses
basic_mmio_gpio to instantiate a gpio_chip for each bank.
The driver assumes that it handles the base set of GPIOs
on the system and that it can start its numbering sequence
from 0, so any GPIO expanders used with it must dynamically
assign GPIO numbers after this driver has finished
registering its GPIOs.
Does not implement the interrupt-controller portion yet,
will be done in a future commit.
v2:
- change include to use <linux/gpio/driver.h> instead of
<linux/gpio.h>
- get rid of unnecessary imask member in struct bank
- rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
- always have 32 GPIOs per bank and add 'width' member in
struct bank to hold actual number of GPIOs in use
- mark of_match table as const
List-usage-fixed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add ACPI support for APM X-Gene GPIO standby driver.
Signed-off-by: Y Vo <yvo@apm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Current code uses devm_request_irq() in .probe, so drop the unneeded
free_irq() call in .remove.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Christian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The CrystalCove GPIO irqchip doesn't have irq_set_wake callback defined
so we should set IRQCHIP_SKIP_SET_WAKE for it or it would cause an irq
desc's wake_depth unbalanced warning during system resume phase from the
gpio_keys driver, which is the driver for the power button of the ASUS
T100 laptop.
Signed-off-by: Aaron Lu <aaron.lu@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This removes some redundant code but does not have any functional impact.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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If an interrupt controller doesn't support wake-up configuration,
irq_set_irq_wake() returns an error code. Then any subsequent call
trying to deconfigure wake-up will cause an imbalance, and a warning
will be printed:
WARNING: CPU: 1 PID: 1341 at kernel/irq/manage.c:540 irq_set_irq_wake+0x
Unbalanced IRQ 26 wake disable
To fix this, refrain from any further parent interrupt controller
(de)configuration if irq_set_irq_wake() failed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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0x3 only masks two bits, but three bits have to be allowed. This fixes
GPHY0 LED2 (which is the highest bit of phy2) on my board.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Interrupts were missed if an 8-bit integer overflow occurred. This was
observed when bank0,pin7 and bank1,pin7 changed simultaniously.
As the 8-bit totals were only checked against zero, replace them with
booleans. Name the booleans so that their purpose is clear.
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The omap_gpio_irq_startup() can be called at time when:
- corresponding GPIO has been requested already and in this case
it has to be configured as input already. If not - return with -EINVAL
and do not try to re-configure it as it could be unsafe.
- corresponding GPIO is free: reconfigure GPIO as input.
In addition, call omap_enable_gpio_module directly as all needed
checks are already present inside it.
Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal,
so GPIO Chip implementation shouldn't touch GPIO IRQ specific registers
and vise versa.
Hence, rework omap_gpio_request:
- don't reset GPIO IRQ triggering type to IRQ_TYPE_NONE, because
GPIO irqchip should be responsible for that;
- call directly omap_enable_gpio_module as all needed checks are already
present inside it.
Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The GPIO Chip and GPIO IRQ Chip functionality are essentially orthogonal,
so GPIO IRQ Chip implementation shouldn't touch GPIO specific
registers and vise versa.
Hence, rework omap_gpio_irq_shutdown and try to touch only irqs specific
registers:
- don't configure GPIO as input (it, actually, should be already configured
as input).
- don't clear debounce configuration if GPIO is still used as GPIO.
We need to take in to account here commit c9c55d921115
("gpio/omap: fix off-mode bug: clear debounce settings on free/reset").
Also remove omap_reset_gpio() function as it is not used any more.
Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The GPIO bank will be kept powered in case if input parameters
are invalid or error occurred in omap_gpio_irq_type.
Hence, fix it by ensuring that GPIO bank will be unpowered
in case of errors and add additional check of value returned
from omap_set_gpio_triggering().
Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch fixes following issue:
- GPIOn is used as IRQ by some dev, for example PCF8575.INT -> gpio6.11
- PCFx driver knows nothing about type of IRQ line (GPIO or not)
so it doesn't request gpio and just do request_irq()
- If gpio6.11 will be exported through the sysfs and then un-xeported
then IRQs from PCFx will not be received any more, because
IRQ configuration for gpio6.11 will be cleaned up unconditionally
in omap_gpio_free.
Fix this by removing all GPIO IRQ specific code from omap_gpio_free()
and also do GPIO clean up (change direction to 'in' and disable debounce)
only if corresponding GPIO is not used as IRQ too.
GPIO IRQ will be properly cleaned up by GPIO irqchip code.
Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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If an interrupt controller doesn't support wake-up configuration,
irq_set_irq_wake() returns an error code. Then any subsequent call
trying to deconfigure wake-up will cause an imbalance, and a warning
will be printed:
WARNING: CPU: 1 PID: 1341 at kernel/irq/manage.c:540 irq_set_irq_wake+0x9c/0xf8()
Unbalanced IRQ 26 wake disable
To fix this, refrain from any further parent interrupt controller
(de)configuration if irq_set_irq_wake() failed.
Alternative fixes would be:
- calling "gic_set_irqchip_flags(IRQCHIP_SKIP_SET_WAKE)" from the
platform code,
- setting "gic_chip.flags = IRQCHIP_SKIP_SET_WAKE" in the GIC driver
code,
but these were withheld as the GIC hardware doesn't really support
wake-up interrupts.
Fixes: ab82fa7da4dce5c7 ("gpio: rcar: Prevent module clock disable when wake-up is enabled")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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There have been concerns that the function names gpiod_set_array() and
gpiod_get_array() might be confusing to users. One might expect
gpiod_get_array() to return array values, while it is actually the array
counterpart of gpiod_get(). To be consistent with the single descriptor API
we could rename gpiod_set_array() to gpiod_set_array_value(). This makes
some function names a bit lengthy: gpiod_set_raw_array_value_cansleep().
Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Fixed several spelling errors in gpio-lynxpoint, gpio-pca953x,
gpio-tegra, gpio-zynq, gpiolib-of, gpiolib.
Signed-off-by: Colin Cronin <colinpatrickcronin@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Clean up chained handler and handler data if they were set by
gpiochip_set_chained_irqchip().
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The dln2 driver was initialising a gpiolib private field, which is now
gone.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Move irq trigger flags, which as sysfs-interface specific, to the class
device data.
This avoids accessing the gpio-descriptor flags field using non-atomic
operations without any locking, and allows for a more clear separation
of the sysfs interface from gpiolib core.
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Remove FLAG_SYSFS_DIR, which is sysfs-interface specific, and store it
in the class-device data instead.
Note that the flag is only used during export.
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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