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path: root/drivers/gpu/drm/amd/display/dc/dc_stream.h
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* drm/amd/display: Return last used DRR VTOTAL from DCJayendran Ramani2021-06-081-0/+4
| | | | | | | | | | | [How] Add call to get the last used VTOTAL from DC Signed-off-by: Jayendran Ramani <Jayendran.Ramani@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: disable desktop VRR when using older flip modelhvanzyll2021-05-271-0/+3
| | | | | | | | | | | | | | | | | [WHY] OS uses older flip model which does not work with desktop VRR causing memory allocations at the wrong IRQ level. [HOW] Checks added to flip model to verify model is 2.2 or greater when doing any of the desktop VRR checks for full updates. This prevents full updates when VRR changes until a mode change. Signed-off-by: Harry VanZyllDeJong <hvanzyll@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove unused flag from stream stateMikita Lipski2021-04-151-1/+0
| | | | | | | | | | | | | [why & how] Removing unused DSC flag which is incorrect and is not used. We are only using stream->timing.flags.DSC for DSC's current state. Stream state as an input parameter and should not contain any past status flags. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Acked-by: Bindu Ramamurthy <bindur12@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: New path for enabling DPGWesley Chalmers2021-04-091-0/+12
| | | | | | | | | | | | | | [WHY] We want to make enabling test pattern a part of the stream update code path. This change is the first step towards that goal. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add dynamic link encoder selection.Jimmy Kizito2021-04-091-0/+4
| | | | | | | | | | | | | | | | | | | [Why] Some display endpoints may be programmably mapped to compatible link encoders. The assignment of link encoders to links has to be dynamic to accommodate the increased flexibility in comparison to conventional display endpoints. [How] - Add link encoder assignment tracking variables. - Execute link encoder assignment algorithm before enabling link and release link encoders from links once they are disabled. Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Process crc window at DMCUWayne Lin2021-03-051-0/+7
| | | | | | | | | | | | [Why & How] Add additional MCP_SCP commands for starting/stopping updaing crc window at DMCU Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Synchronize displays with different timingsVladimir Stempen2021-02-221-0/+3
| | | | | | | | | | | | | | | [why] Vendor based fan noise improvement [how] Report timing synchronizable when DP streams time frame difference is less than 0.05 percent. Adjust DP DTOs and sync displays using MASTER_UPDATE_LOCK_DB_X_Y Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Revert "drm/amd/display: reuse current context instead of recreating one"Anson Jacob2021-02-221-1/+2
| | | | | | | | | | | | | | | This reverts commit 8866a67ab86cc0812e65c04f1ef02bcc41e24d68. Reason for revert: This breaks hotplug of HDMI on some systems, resulting in a blank screen. Caused general hangs on boot/hotplugs. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1487 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1492 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=211649 Signed-off-by: Anson Jacob <Anson.Jacob@amd.com> Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Revert "drm/amd/display: New path for enabling DPG"Wesley Chalmers2021-02-181-11/+0
| | | | | | | | | | | | | | | | | This reverts commit f8e792dc5c45d306a542b9ee991ae80e1c78e4c5 [Why] We are not implementing the planned new HW sequence for HUBP disable. [How] Revert most related changes to minimize regressions. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: reuse current context instead of recreating oneBhawanpreet Lakha2021-02-021-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | [Why] Currently we discard the current context and recreate it. The current context is what is applied to the HW so we should be re-using this rather than creating a new context. Recreating the context can lead to mismatch between new context and the current context For example: gsl groups get changed when we create a new context this can cause issues in a multi display config (with flip immediate) because we don't align the existing gsl groups in the new and current context. If we reuse the current context the gsl group assignment stays the same. [How] Instead of discarding the current context, we instead just copy the current state and add/remove planes and streams. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Anson Jacob <Anson.Jacob@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: New path for enabling DPGWesley Chalmers2021-01-131-0/+11
| | | | | | | | | | | | [WHY] We want to make enabling test pattern a part of the stream update code path. This change is the first step towards that goal. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: turn DPMS off on connector unplugAurabindo Pillai2020-12-011-0/+1
| | | | | | | | | | | | | [Why&How] Set dpms off on the connector that was unplugged, for the side effect of releasing some references held through deallocation of MST payload. This is the expected behaviour for non MST devices as well. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher2020-11-041-6/+0
| | | | | | | | | | Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Calculate CRC on specific frame regionWayne Lin2020-11-021-0/+1
| | | | | | | | | | | | | | | | | [why] Currently, we only support calculating CRC on whole frame. We want to extend the capability to calculate CRC on specific frame area. [how] Calculate CRC on specific area once it's specified from the input parameter. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove no need return valueBernard Zhao2020-10-141-1/+1
| | | | | | | | | | Functions (disable_all_writeback_pipes_for_stream & dc_enable_stereo & dc_post_update_surfaces_to_stream) always return true, there is no need to keep the return value. This change is to make the code a bit more readable. Signed-off-by: Bernard Zhao <bernard@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Block ABM in case of eDP ODMYongqiang Sun2020-10-051-0/+1
| | | | | | | | | | | | | | [Why] enable ODM on eDP panel with ABM will result in color difference on the panel due to only one ABM module to set one pipe. [How] Block ABM in case of ODM enabled on eDP. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Keep current gain when ABM disable immediatelyBrandon Syu2020-08-261-1/+1
| | | | | | | | | | | | | [Why] When system enters s3/s0i3, backlight PWM would set user level. [How] ABM disable function add keep current gain to avoid it. Signed-off-by: Brandon Syu <Brandon.Syu@amd.com> Reviewed-by: Josip Pavic <Josip.Pavic@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add debugfs for forcing stream timing syncVictor Lu2020-08-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | [why] There's currently no method to enable multi-stream synchronization from userspace and we don't check the VSDB bits to know whether or not specific displays should have the feature enable. [how] Add a debugfs entry that controls a new DM debug option, "force_timing_sync". This debug option will set on any newly created stream following the change to the debug option. Expose a new interface from DC that performs the timing sync and a helper to the "force_timing_sync" debugfs that iterates over the current streams and modifies the current synchornization state and grouping. Example usage to force a resync (from an X based desktop): echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_force_timing_sync xset dpms force off && xset dpms force on Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Allow asic specific FSFT timing optimizationReza Amini2020-07-301-2/+2
| | | | | | | | | | | | | [Why] Each asic can optimize best based on its capabilities [How] Optimizing timing for a new pixel clock Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Make new dc interface for adding dsc resourceAurabindo Pillai2020-07-211-0/+4
| | | | | | | | | | | | | | | [Why] dcn20_add_dsc_to_stream_resource is accessed in amdgpu_dm directly. This creates build error for configuration with DCN disabled. [How] Make the function available through a resource pool function so that dcn20 function need not be called directly. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Implement AMD VSIF V3Reza Amini2020-07-211-0/+6
| | | | | | | | | | | | | [Why] To support V3 [How] Generate new VSIF for V3 Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add DCN3 HWSEQBhawanpreet Lakha2020-07-011-0/+15
| | | | | | | Add HW sequence programing for DCN3 Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Unify psr feature flagsWyatt Wood2020-04-221-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] As it stands, psr has feature flags in dm, stream, and link. Most are not defined well enough, and different dm layers have different uses for these same flags. [How] We define a new structure called psr_settings in dc_link that will hold the following psr feature flags: psr_feature_enable - psr is supported psr_allow_active - psr is currently active psr_version - internal psr version supported psr_frame_capture_indication_req psr_sdp_transmit_line_num_deadline The last two flags were moved out of the power module for the purposes of consolidating psr flags. Their use is already well-defined. Psr caps reported by sink will also be stored in dc_link, in dpcd_caps.psr_caps. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Indicate dsc updates explicitlyAnthony Koo2020-02-061-0/+1
| | | | | | | | | | | | | | [Why] DSC updates only set type to FULL UPDATE, but doesn't flag the change [How] Add DSC flag update flag Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: make PSR static screen entry within 30 msAnthony Koo2020-01-161-2/+2
| | | | | | | | | | | | | | | | | | [Why] With different refresh rate panels, the PSR entry/exit time is different since it is dependent on 2 frame entry time today [How] Make static screen num frame entry time to be calculated such that entry time is within 30 ms instead of fixed num frames. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add warmup escape call supportCharlene Liu2019-12-181-0/+7
| | | | | | | | | | | Add warmup escape support, for diags, in a way that is possible to choose a new or an existing sequence. For achieving this goal, this commit adds separated MCIF buffer as VCN request. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTEDBhawanpreet Lakha2019-11-131-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] DCN2 and DSC are stable enough to be build by default. So drop the flags. [How] Remove them using the unifdef tool. The following commands were executed in sequence: $ find -name '*.c' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';' $ find -name '*.h' -exec unifdef -m -DCONFIG_DRM_AMD_DC_DSC_SUPPORT -DCONFIG_DRM_AMD_DC_DCN2_0 -UCONFIG_TRIM_DRM_AMD_DC_DCN2_0 '{}' ';' In addition: * Remove from kconfig, and replace any dependencies with DCN1_0. * Remove from any makefiles. * Fix and cleanup NV defninitions in dal_asic_id.h * Expand DCN1 ifdef to include DCN2 code in the following files: * clk_mgr/clk_mgr.c: dc_clk_mgr_create() * core/dc_resources.c: dc_create_resource_pool() * dce/dce_dmcu.c: dcn20_*lock_phy() * dce/dce_dmcu.c: dcn20_funcs * dce/dce_dmcu.c: dcn20_dmcu_create() * gpio/hw_factory.c: dal_hw_factory_init() * gpio/hw_translate.c: dal_hw_translate_init() Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Unify all scaling when Integer Scaling enabledReza Amini2019-11-131-0/+1
| | | | | | | | | | | | | | | [why] We want to guarantee integer ratio scaling for all scaling modes. [how] Treat centered, fullscreen, preserve aspect ratio the same: scale the view as many times as possible, and fill in the rest with a black border. Signed-off-by: Reza Amini <Reza.Amini@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDPAnthony Koo2019-11-131-0/+1
| | | | | | | | | | | | | | | | | | | | | [Why] It is confusing to sinks if we send VSC SDP only on some format. Today we signal colorimetry format using MSA while in formats like sRGB. But when we switch to BT2020 we set the bit to ignore MSA colorimetry and instead use the colorimetry information in the VSC SDP. But if sink supports signaling of colorimetry via VSC SDP we should always set the MSA MISC1 bit 6, instead of doing so selectively. [How] If sink supports signaling of colorimetry via VSC SDP, and we are sending the colorimetry info via VSC SDP with packet revision 05h, then always set MSA MISC1 bit 6. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Added pixel dynamic expansion control.Robin Singh2019-10-101-0/+3
| | | | | | | | | | | | | | | | | | | [Why] To compare the crc of the framebuffer data at input of display pipeline with the crc of the otg, we need to disable pixel formatter's dynamic expansion feature during crc capture and keep it enable in the normal operation. [HOW] Expose a new interface in DM and dc for pixel formatter (fmt dynamic bitdepth expansion control). Interface control the FMT_DYNAMIC_EXP_EN bit, during crc capture keep it disabled. Signed-off-by: Robin Singh <robin.singh@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove hw access from dc_destroyJun Lei2019-09-131-0/+2
| | | | | | | | | | | | | | | | | | [why] dc_destroy should only clean up SW, this is because GPUs may be removed before driver unload, leading to HW to be unavailable. [how] remove GPIO close as part of GPIO destroy, this is unnecessary because GPIO is not shared, and GPIOs are generally closed after being opened Add tracking to HW access during destructor to make future issues easier to pinpoint, and block access to prevent hangs. Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: update navi to use new surface programming behaviourDmytro Laktyushkin2019-09-131-0/+18
| | | | | | | | | | | | | New behaviour will track global updates and update any hw that isn't related to current stream being updated. This should fix any issues caused by pipe split pipes being taken by other streams. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Expose audio inst from DC to DMNicholas Kazlauskas2019-07-111-0/+1
| | | | | | | | | | | | | | | | | [Why] In order to give pin notifications to the sound driver from DM we need to know whether audio is enabled on a stream and what pin it's using from DC. [How] Expose the instance via stream status if it's a mapped resource for the stream. It will be -1 if there's no audio mapped. Cc: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Expose send immediate sdp message interfaceLeo (Hanghong) Ma2019-06-221-1/+0
| | | | | | | | | | | | | | [Why] To send sdp message immediately from a single slot. [How] Modify the generic SDP message interface, and use GSP4 to send immediate sdp message. Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add DSC support for Navi (v2)Harry Wentland2019-06-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for DCN2 DSC (Display Stream Compression) HW Blocks: +--------++------+ +----------+ | HUBBUB || HUBP | <-- | MMHUBBUB | +--------++------+ +----------+ | ^ v | +--------+ +--------+ | DPP | | DWB | +--------+ +--------+ | v ^ +--------+ | | MPC | | +--------+ | | | v | +-------+ +-------+ | | OPP | <--> | DSC | | +-------+ +-------+ | | | v | +--------+ / | OPTC | -------------- +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ v2: rebase (Alex) Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add DC core changes for DCN2Harry Wentland2019-06-211-0/+67
| | | | | | | Core DC changes for DCN2. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Ensure DRR triggers in BPEryk Brol2019-05-311-1/+0
| | | | | | | | | | | | | | | | | | | [Why] In the previous implementation DRR event sometimes came in during FP2 region which is a keep-out zone. This would cause the frame not to latch until the next frame which resulted in heavy flicker. To fix this we need to make sure that it triggers in the BP. [How] 1. Remove DRR programming during flip 2. Setup manual trigger for DRR event and trigger it after surface programming is complete Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add function to copy DC streamsWenjing Liu2019-04-231-0/+2
| | | | | | | | | | We'll need the ability to copy a dc_stream_state for some features. Implement it here. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Expose generic SDP message access interfaceLeo (Hanghong) Ma2019-03-201-0/+8
| | | | | | | | | | | | | | | [Why] We need to add DP SDP message test debugfs to make sdp message test more convenient and efficient. [How] Add a DM accessible SDP interface for custom data. Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Refactor for setup periodic interrupt.Yongqiang Sun2019-02-191-7/+17
| | | | | | | | | | | | | | | | | | [Why] Current periodic interrupt start point calc in optc is not clear. [How] 1. DM convert delta time to lines number and dc will calculate the start position as per lines number and interrupt type. 2. hwss calculates the start point as per line offset. 3. optc programs vertical interrupts register as per start point and interrupt source. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: add seamless boot flag to streamAnthony Koo2019-02-061-1/+3
| | | | | | | | | | | | | | | | [Why] If we determine the stream we are trying to commit matches HW, we want to try to optimize. [How] Try to acquire the HW resources that are already enabled and optimize. Also skip backend reprogramming Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Calc vline position in dc.Yongqiang Sun2019-02-061-7/+8
| | | | | | | | | We need to calcualte vline position in DC for DCN. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: store timing sync info in dc_stream_statusSu Sung Chung2019-02-051-0/+6
| | | | | | | | | | in program_timing_sync, after all the pipes are grouped, store timing sync info in dc_stream_status Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add Vline1 interrupt source to InterruptManagerFatemeh Darbehani2019-01-281-3/+11
| | | | | | | | | | | | | | [Why] Enhanced sync need to use vertical_interrupt1. [How] Add vertical_interrupt1 source to irq manger, Implment setup vline interrupt interface. Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove unused parameter plane_statesDavid Francis2019-01-141-1/+0
| | | | | | | | | | | | | | [Why] The function dc_commit_updates_for_stream had a parameter called plane_states. It was never used. It was getting in the way of some cleanup work [How] Remove it Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix driver load crash in amdgpu_dmLeo Li2019-01-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | [Why] This fixes an regression introduced by: drm/amd/display: add stream ID and otg instance in dc_stream_state During driver initialization, a null pointer deref is raised. This is caused by searching for a stream status in the dc->current_state before the dc_state swap happens at the end of dc_commit_state_no_check(). Since the swap has not happened, the dc_state to be swapped in should be searched, and not dc->current_state. [How] Add a function that searches for the stream status within the given dc_state, instead of dc->current_state. Use that before the state swap happens in dc_commit_state_no_check(). Also remove duplicate occurrences of this function in amdgpu_dm.c. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove stream_status->linkLeo Li2019-01-141-5/+0
| | | | | | | | | | | | [Why] It's not being used anywhere. [How] Remove it. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: add stream ID and otg instance in dc_stream_stateJun Lei2019-01-141-0/+12
| | | | | | | | | | | | | | | | | | | | | [why] stream ID allows DMs to avoid memory address comparisons to compare stream equality. otg_instance allows DC to more rigorously define when otg_instance can change. specifically, it is now defined to be only mutable when dc_stream_state changes. This is better than a "get status" function which prevents efficient caching of otherwise very stable information. [how] stream ID follows similar pattern to sink ID, which is already implemented otg_instance is an output which occurs on all dc_stream modification functions Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Detach backlight from streamDavid Francis2019-01-141-1/+0
| | | | | | | | | | | | | | | | | | [Why] Backlight is conceptually a property of links, not streams. All backlight programming is done on links, but there is a stream property bl_pwm_level that is used to restore backlight on dpms on and s3 resume. This is unnecessary, as backlight is already restored by hardware with no driver intervention. [How] Remove bl_pwm_level, and the stream argument to set_backlight Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove sink reference in dc_stream_stateJun Lei2019-01-141-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [why] dc_stream_state containing a pointer to sink is poor design. Sink describes the display, and the specifications or capabilities it has. That information is irrelevant for dc_stream_state, which describes hardware state, and is generally used for hardware programming. It could further be argued that dc_sink itself is just a convenience dc provides, and DC should be perfectly capable of programming hardware without any dc_sinks (for example, emulated sinks). [how] Phase 1: Deprecate use of dc_sink pointer in dc_stream. Most references are trivial to remove, but some call sites are risky (such as is_timing_changed) with no obvious logical replacement. These will be removed in follow up change. Add dc_link pointer to dc_stream. This is the typical reason DC really needed sink pointer, and most call sites are replaced with this. DMs also need minor updates, as all 3 DMs leverage stream->sink for some functionality. this is replaced instead by a pointer to private data inside dc_stream_state, which is used by DMs as a quality of life improvment for some key functionality. it allows DMs to set pointers have to their own objects which associate OS objects to dc_stream_states (such as DisplayTarget and amdgpu_dm_connector). Without the private pointer, DMs would be forced to perform a lookup for callbacks. Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: David Francis <David.Francis@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-10 22:29:07 +0000