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path: root/drivers/gpu/drm/amd/include
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* drm/amd: add register headers for DCN32/321Aurabindo Pillai2022-06-034-0/+308702
| | | | | | | Add register headers for DCN 3.2.0 and 3.2.1. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: Add atomfirmware.h definitions needed for DCN32/321Aurabindo Pillai2022-06-031-22/+187
| | | | | | | | Add new structures for DCN 3.2.x. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: Fix spelling typo in commentspengfuyuan2022-06-031-1/+1
| | | | | | | | Fix spelling typo in comments. Reported-by: k2ci <kernel-bot@kylinos.cn> Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add HDMI_ACP_SEND registerAlan Liu2022-05-269-2/+18
| | | | | | | | Define HDMI_ACP_SEND register shift/mask. Signed-off-by: Alan Liu <HaoPing.Liu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn: Add vcn ras poison consumption event handlingMohammad Zafar Ziya2022-05-101-0/+1
| | | | | | | | | | | | Add vcn ras poison consumption event handling V2: Removed default poison consumption handling function cb Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/jpeg: add jpeg ras poison consumption handlingMohammad Zafar Ziya2022-05-101-0/+3
| | | | | | | | | | | | Add jpeg ras poison event callback and consumption handling V2: Removed the default poison consumption cb handle Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add lsdma blockLikun Gao2022-05-101-0/+1
| | | | | | | | | Add Light SDMA (LSDMA) block and related function. LSDMA is a small instance of SDMA mainly for kernel driver use. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add lsdma v6_0_0 ip headersHawking Zhang2022-05-102-0/+1830
| | | | | | | | | | | Add lsdma v6_0_0 register offset and shift masks header files v2: squash in updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/psp: Add C2P registers to mp_13_0_2 headerAndrey Grodzovsky2022-05-062-0/+120
| | | | | | | | Add additional registers. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add hdp v5_2_1 ip headersHuang Rui2022-05-062-0/+901
| | | | | | | | | | Add hdp v5.2.1 offset and shift mask ip header files. v2: squash in updates (Alex) Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add nbio v7_7_0 ip headersHuang Rui2022-05-062-0/+184057
| | | | | | | | | | Add nbio v7.7.0 offset and shift mask ip header files. v2: squash in updates (Alex) Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: enable workload type change on smu_v13_0_7Kenneth Feng2022-05-061-0/+1
| | | | | | | | | | enable workload type change on smu_v13_0_7 v2: squash in out of bounds fix (Alex) Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mmhub v3_0_2 ip headersHawking Zhang2022-05-052-0/+8653
| | | | | | | | | | Add mmhub v3_0_2 register offset and shift masks v2: update to latest headers Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable more GFX clockgating features for GC 11.0.0Evan Quan2022-05-051-0/+1
| | | | | | | | | Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG, FGCG and PERF_CLK). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add irq sources for vcn v4_0James Zhu2022-05-041-0/+41
| | | | | | | | Add the interrupt source packet definitions for VCN4. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add vcn 4_0_0 header files v7Leo Liu2022-05-042-0/+9665
| | | | | | | | | | Add VCN 4.0.0 registers Signed-off-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdkfd: Add KFD support for soc21 v3Mukul Joshi2022-05-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add initial support for soc21 in KFD compute driver (Mukul) - Add new definition for soc21 device. - Add new file for amdgpu-kfd interface for GFX11 family. - Add new file for queue management, interrupt handling, mqd management for GFX11 family in KFD driver. - Related changes/updates for soc21 device in KFD driver. - Repurpose last 2 entries of SDMA MQD for driver use. v2: Add an optional argument into update queue operation (Mukul) v3: Switch to ip version check, replace kgd_dev with amdgpu_device (Hawking) Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Oak Zeng <Oak.Zeng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/mes11: initiate mes v11 supportJack Xiao2022-05-041-0/+579
| | | | | | | | | Initiate mes v11 code base from mes v10, rename function and register names. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mes unmap legacy queue routineJack Xiao2022-05-041-0/+570
| | | | | | | | | | For mes kiq has been taken over by mes sched, drv can't directly use mes kiq to unmap queues. drv has to use mes sched api to unmap legacy queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add FGCG supportEvan Quan2022-05-041-0/+1
| | | | | | | | Add the CG flag for Fine Grained Clock Gating. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add irq src id for GFX11Wenhui Sheng2022-05-041-0/+77
| | | | | | Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add gfx11 mqd structuresHawking Zhang2022-05-041-0/+1189
| | | | | | | | memory queue descriptors for gfx11. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add soc21 chip enum header v8Hawking Zhang2022-05-041-0/+22477
| | | | | | | | | | add soc21 enum definitions (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add updated smu_info structuresHawking Zhang2022-05-041-0/+124
| | | | | | | | To match with smu v13_0_0 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mmhub v3_0_0 ip headers v6Hawking Zhang2022-05-042-0/+9007
| | | | | | | | | | | Add mmhub v3_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add athub v3_0_0 ip headers v6Hawking Zhang2022-05-042-0/+1505
| | | | | | | | | | | Add athub v3_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add smuio v13_0_6 ip headers v4Hawking Zhang2022-05-042-0/+1695
| | | | | | | | | | | Add smuio v13_0_6 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add hdp v6_0_0 ip headers v4Hawking Zhang2022-05-042-0/+855
| | | | | | | | | | | Add hdp v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add ih v6_0 ip block v2Stanley.Yang2022-05-041-0/+1
| | | | | | | | | This adds ih v6_0 ip block support. IH is the interrupt handler. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add soc21 ih clientid definitionStanley Yang2022-05-041-0/+27
| | | | | | | | | Define soc21 ih clientid Signed-off-by: Stanley Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add osssys v6_0_0 ip headers v4Hawking Zhang2022-05-042-0/+1232
| | | | | | | | | | | Add osssys v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add nbio v4_3_0 ip headers v6Hawking Zhang2022-05-042-0/+99428
| | | | | | | | | | | Add nbio v4_3_0 register offset and shift masks header files (Hawking) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add gc v11_0_0 ip headers v11Hawking Zhang2022-04-283-0/+59419
| | | | | | | | | | | Add gc v11_0_0 register offset and shift masks header files (Hawking) Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mp v13_0_0 ip headers v7Hawking Zhang2022-04-282-0/+1143
| | | | | | | | | | | Add mp v13_0_0 register offset and shift masks header files (Hawking) Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add atom_gfx_info_v3_0 structureHawking Zhang2022-04-281-0/+33
| | | | | | | | atomfirmware table used for newer gfx IPs. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add vram_info v3_0 structureHawking Zhang2022-04-281-0/+45
| | | | | | | | | To support query vram_width, vram_type, vram_vendor information Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update latest IP discovery table structuresAlex Deucher2022-04-281-3/+111
| | | | | | | Add new tables. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: Fix spelling typo in commentoushixiong2022-04-261-1/+1
| | | | | Signed-off-by: oushixiong <oushixiong@kylinos.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix typoRongguang Wei2022-04-261-1/+1
| | | | | | | | | Fix spelling mistake: "differnt" -> "different" "commond" -> "common" Signed-off-by: Rongguang Wei <weirongguang@kylinos.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: add dc feature mask flags for PSR allow smu and multi-display ↵David Zhang2022-04-261-0/+2
| | | | | | | | | | | | | | | | | optimizations [Why] Allow for PSR SMU optimization and PSR multiple display optimization. [How] Add feature flags of PSR smu optimization and PSR multiple display optimiztaion, and set them during init sequence. By default, flags are disabled. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use flexible array memberLijo Lazar2022-04-111-1/+1
| | | | | | | | | | | | Use flexible array member in ip discovery struct as recommended[1]. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays v2: squash in struct_size fixes Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: expand cg_flags from u32 to u64Evan Quan2022-04-081-33/+33
| | | | | | | | | With this, we can support more CG flags. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vcn: Add vcn and jpeg ver 2.6 ras register definitionMohammad Zafar Ziya2022-03-282-0/+37
| | | | | | | | | Adding vcn and jpeg ver 2.6 ras register definition Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARKXiaogang Chen2022-02-241-0/+2
| | | | | | | | To fix applications running across multiple GPU config hang. Signed-off-by: Xiaogang Chen <xiaogang.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include: add DCN 3.1.5 registersQingqing Zhuo2022-02-184-0/+192842
| | | | | | | | Add DCN 3.1.5 and DPCS 4.2.2 register headers. Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Change-Id: I5588a1c422ae384cc76aa42380545dfc1aad1948 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mp 13.0.5 header filesYifan Zhang2022-02-182-0/+1127
| | | | | | | | | | | This patch is to add mp 13.0.5 header files. v2: update headers Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include: Add MP 13.0.8 register headersLeo Li2022-02-172-0/+1013
| | | | | | Reviewed-by: Prike Liang <Prike.Liang@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include: Add register headers for DCN 3.1.6Leo Li2022-02-174-0/+226509
| | | | | | | | | | Add register headers for the following IPs: - DCN 3.1.6 - DPCS 4.2.3 Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: print more error infoStanley.Yang2022-02-141-0/+6
| | | | | | | | | | | | print more error info when deferred uncorrectable ras error changed from V1: move Defferred error msg into query uncorrectable error count function. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdkfd: Remove unused old debugger implementationMukul Joshi2022-02-091-9/+0
| | | | | | | | | | | | | | | Cleanup the kfd code by removing the unused old debugger implementation. The address watch was only ever implemented in the upstream driver for GFXv7 (Kaveri). The user mode tools runtime using this API was never open-sourced. Work on the old debugger prototype that used this API has been discontinued years ago. Only a small piece of resetting wavefronts is kept and is moved to kfd_device_queue_manager.c. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-10 22:31:37 +0000