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path: root/drivers/gpu/drm/i915/intel_guc_fw.c
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* drm/i915/uc: Place uC firmware in upper range of GGTTFernando Pacheco2019-04-201-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | Currently we pin the GuC or HuC firmware image just before uploading. Perma-pin during uC initialization instead and use the range reserved at the top of the address space. Moving the firmware resulted in needing to: - use an additional pinning for the rsa signature which will be used during HuC auth as addresses above GUC_GGTT_TOP do not map through GTT. v2: Remove call to set to gtt domain Do not restore fw gtt mapping unconditionally Separate out pin/unpin functions and drop usage of pin/unpin Use uc_fw init/fini functions to bind/unbind fw object v3: Bind is only needed during xfer (Chris) Remove attempts to bind outside of xfer (Chris) Mark fw bind/unbind static Signed-off-by: Fernando Pacheco <fernando.pacheco@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190419230015.18121-4-fernando.pacheco@intel.com
* drm/i915/uc: Rename uC firmware init/fini functionsFernando Pacheco2019-04-201-1/+1
| | | | | | | | | | | | | | | he uC firmware init function is called during GuC/HuC init early phases. Rename to include "_early" and properly reflect which phase we are at. The uC firmware fini function is cleaning up the state set/created on firmware fetch. Replace "_fini" with "_cleanup_fetch". v2: also rename uC fw fini function Signed-off-by: Fernando Pacheco <fernando.pacheco@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190419230015.18121-2-fernando.pacheco@intel.com
* drm/i915: use intel_uncore for all forcewake get/putDaniele Ceraolo Spurio2019-03-201-2/+2
| | | | | | | | | | | | | Now that the internal code all works on intel_uncore, flip the external-facing interface. v2: fix GVT. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-4-daniele.ceraolospurio@intel.com
* drm/i915: Downgrade scare message for unknown HuC firmwareChris Wilson2019-01-081-4/+0
| | | | | | | | | | | | | | | | | | | If we haven't shipped and enabled firmware for a particular platform, there is nothing the user can do about it. Don't scare the user with an unactionable, unidentifiable warning! <6> [310.769452] i915 0000:00:02.0: GuC: No firmware known for this platform! <4> [310.769458] [drm] HuC: No firmware known for this platform! Unify both GuC/HuC messages to include the device for which we lack the firmware, and provide the platform name as an aide-memoire. v2: Move and refine the message to common site of intel_uc_fw_fetch. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190108150246.1471-1-chris@chris-wilson.co.uk
* drm/i915: replace IS_GEN<N> with IS_GEN(..., N)Lucas De Marchi2018-12-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define IS_GEN() similarly to our IS_GEN_RANGE(). but use gen instead of gen_mask to do the comparison. Now callers can pass then gen as a parameter, so we don't require one macro for each gen. The following spatch was used to convert the users of these macros: @@ expression e; @@ ( - IS_GEN2(e) + IS_GEN(e, 2) | - IS_GEN3(e) + IS_GEN(e, 3) | - IS_GEN4(e) + IS_GEN(e, 4) | - IS_GEN5(e) + IS_GEN(e, 5) | - IS_GEN6(e) + IS_GEN(e, 6) | - IS_GEN7(e) + IS_GEN(e, 7) | - IS_GEN8(e) + IS_GEN(e, 8) | - IS_GEN9(e) + IS_GEN(e, 9) | - IS_GEN10(e) + IS_GEN(e, 10) | - IS_GEN11(e) + IS_GEN(e, 11) ) v2: use IS_GEN rather than GT_GEN and compare to info.gen rather than using the bitmask Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181212181044.15886-2-lucas.demarchi@intel.com
* drm/i915: Downgrade unknown firmware warningsChris Wilson2018-11-161-1/+2
| | | | | | | | | | If we have released no firmware yet for a platform, stop scaring the consumer and merely note its expected absence. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181009111259.20807-1-chris@chris-wilson.co.uk
* drm/i915/guc: Propagate the fw xfer timeoutChris Wilson2018-10-231-56/+50
| | | | | | | | | | | | | | | | Propagate the timeout on transferring the fw back to the caller where it may act upon it, usually by restarting the xfer before failing. v2: Simplify the wait to only wait upon the guc signaling completion, with an assertion that the fw xfer must have completed for it to be ready! Testcase: igt/drv_selftest/live_hangcheck Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181018195536.11522-1-chris@chris-wilson.co.uk
* drm/i915/guc: fix comment about fallback to execlistsDaniele Ceraolo Spurio2018-10-231-2/+2
| | | | | | | | | | | | | | We stopped supporting fallback to execlists in commit 121981fafe69 (drm/i915/guc: Combine enable_guc_loading|submission modparams). We do instead reset and retry in some cases, depending on the workarounds required by the platform. Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20181022230427.5616-4-daniele.ceraolospurio@intel.com
* drm/i915/uc: Fetch uC firmware in init_earlyMichal Wajdeczko2018-03-231-3/+2
| | | | | | | | | | | | | | | | We were fetching uC firmwares in separate uc_init_fw step, while there is no reason why we can't fetch them during init_early. This will also simplify upcoming patches, as size of the firmware may be used for register initialization. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Michal Winiarski <michal.winiarski@intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20180323123451.59244-2-michal.wajdeczko@intel.com
* drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offsetJackie Li2018-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GuC related exported functions should start with "intel_guc_" prefix and pass intel_guc as the first parameter since its GuC related. Current guc_ggtt_offset() failed to follow this code convention and this is a problem for future patches that needs to access intel_guc data to verify the GGTT offset against the GuC WOPCM top. This patch renames the guc_ggtt_offset to intel_guc_ggtt_offset and updates the related code to pass intel_guc pointer to this function call, so that we can have a unified coding style for GuC code and also enable the future patches to get GuC related data from intel_guc to do the offset verification. Meanwhile, this patch also moves the GUC_GGTT_TOP from intel_guc_regs.h to intel_guc.h since it is not GuC register related definition. v8: - Fixed coding style issues and moved GUC_GGTT_TOP to intel_guc.h (Sagar) - Updated commit message to explain to reason and motivation to add intel_guc as the first parameter of intel_guc_ggtt_offset (Chris) v9: - Fixed code alignment issue due to line break (Chris) v10: - Removed unnecessary comments, redundant code and avoided reuse variable to avoid potential issues (Joonas) v13: - Updated the ordering of s-o-b/cc/r-b tags (Sagar) Signed-off-by: Jackie Li <yaodong.li@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v8) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9) Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-1-git-send-email-yaodong.li@intel.com
* drm/i915/uc: Make GuC/HuC fw fetch and loading functions/file structure ↵Sagar Arun Kamble2018-03-021-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | symmetric GuC load function is named intel_guc_fw_upload() and HuC load function is named intel_huc_init_hw(). Make them consistent intel_*_fw_upload. Also move HuC fw loading functions and declarations to separate files intel_huc_fw.c|h like GuC. While at this, do below changes 1. Update kernel-doc comment for intel_*_fw_upload() functions 2. s/huc_ucode_xfer/huc_fw_xfer 3. Introduce intel_huc_fw_init_early() v2: Changed patch to update HuC functions instead of changing guc_fw_upload and update file structure. (Michal Wajdeczko) v3: Added SPDX License identifier to huc_fw.c|h. (Michal Wajdeczko) Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Michal Winiarski <michal.winiarski@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/1519922745-25441-1-git-send-email-sagar.a.kamble@intel.com
* drm/i915/glk: Disable Guc and HuC on GLKAnusha Srivatsa2018-01-041-9/+0
| | | | | | | | | | | | | | | | | | | | Since the firmwares are not yet released to public repo, disable them on Geminilake. v2: Remove the firmware versions (Michal) v3: Remove unwanted defines (Rodrigo) Correct commit message (Michal) Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Fixes: 90f192c8241e ("drm/i915/GuC/GLK: Load GuC on GLK") Fixes: db5ba0d8931e ("drm/i915/GLK/HuC: Load HuC on GLK") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1515006225-13003-1-git-send-email-anusha.srivatsa@intel.com
* drm/i915/guc: Move firmware selection to init_earlyMichal Wajdeczko2017-12-061-27/+36
| | | | | | | | | | | | | | Doing GuC firmware path selection from sanitize_options function is not perfect, while there is no problem with doing so during early init stage as we already have all needed data. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171206135316.32556-2-michal.wajdeczko@intel.com
* drm/i915/guc: Change default GuC FW for KBL to v9.39Sagar Arun Kamble2017-11-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes v9.39 firmware as default firmware for KBL. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version specific change and can be handled entirely in GuC. It will need to be fixed in future firmwares. This update includes (since v9.14): - DCC spec changes for BXT + DCT enabling - Bug Fix for power conservation feature SLPC_DCC - Scheduler 1-element submission during DCC cycles. - SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC - Moving GuC non_critical r/w data to lower SRAM 64KB - Media engine Reset fix. Correctly marking context for resubmission in Media Reset case. - ABT Disable bug fix. Disabled Evaluation mode on context change. - Async FW in Engine Schedule feature (not enabled from KMD) - GuC clean up to align developer build in line to production build. - Disable ARAT interrupt before programming ARAT delta. - Memory range check in Parse to avoid failure due to overflow. - GuC Msg Channel Hang WA - Stall GUC for mmio access when IDI is low during CPD flow. - Fix for submit queue over flow issue - Enabling IBC on KBL GT3 15W, GT4 45W - Disabling wrong device ID WA in production signed kernel - Enabling WA for MSGCH hang issue upto required KBL stepping - Clear forcewake in CSB when SQ is empty. - 3Tries of GuC2CSME wake request - During reset one parameter was not getting accounted - Disable DCC 1-elem mode submission - Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. - This is file location change.No functional change done as part of this check in. - Enabling Guc Log changes for ultra low logging for OCA - Enabling Dynamic Render Power Well Hysteresis Programming for Compute Worklaods - Enabling build failure check to catch critical section overflow. - Disable build.bat redundant prints. - Move few least used functions to non-critical section. - Rearrange GuC documentation folder structure. - Synchronize SLPC internal debug interface with other branches. - Fixing Issue with Default Guc Log changes for OCA using special Control Bit - Aggressive DCC implementation for supported platforms. v2: Rebase. Updated commit message. Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Spotswood John A <john.a.spotswood@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Anusha Srivatsa<anusha.srivatsa@intel.com > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1511972351-574-4-git-send-email-sagar.a.kamble@intel.com
* drm/i915/guc: Change default GuC FW for BXT to v9.29Sagar Arun Kamble2017-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes v9.29 firmware as default firmware for BXT. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version specific change and can be handled entirely in GuC. It will need to be fixed in future firmwares. This update includes (since v8.7): - Added support to log media reset count for host to read it - BXT WA for fixing MTP hangs. WaDisableDOPRenderClkGatingAtSubmit - Sub-feature level control for power management features. - Minor clean-up for power management interface. - Unified power management interface and scheduler interface into 1 file using same version. - Bug Fix for multi context scheduler flag. - DCC spec changes for BXT + DCT enabling - Springboard based Pre-ETM/ETM flow enabling for debug signed GuC/HuC - Moving GuC non_critical r/w data to lower SRAM 64KB - Enabled IBC for BXT - Media engine Reset fix. Correctly marking context for resubmission in Media Reset case. - SLPC Dynamic RPe fix to resolve issues where incorrect frequency was set. - ABT Disable bug fix. Disabled Evaluation mode on context change. - GuC clean up to align developer build in line to production build. - Disable ARAT interrupt before programming ARAT delta. - Memory range check in Parse to avoid failure due to overflow. - Clear forcewake in CSB when SQ is empty. - SLPC IBC 1.6 for APL to ensure multiplier does not cap IA below Pe. - Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. - This is file location change. No functional change done as part of this check in. - 3 tries of wake request needed from GuC2CSME for ME to wake up. Request has come from ME spec - During reset one parameter was not getting accounted - Enabling Guc Log changes for ultra low logging for OCA - Disable build.bat redundant prints. - Move few least used functions to non-critical section. - Rearrange GuC documentation folder structure. - Fixing Issue with Default Guc Log changes for OCA using special Control Bit v2: Rebase. Updated commit message. Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Spotswood John A <john.a.spotswood@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1511972351-574-3-git-send-email-sagar.a.kamble@intel.com
* drm/i915/guc: Change default GuC FW for SKL to v9.33Sagar Arun Kamble2017-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes v9.33 firmware as default firmware for SKL. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version specific change and can be handled entirely in GuC. It will need to be fixed in future firmwares. This update includes (since v6.1): - HuC RSA Keys updated. - Adding per engine preemption support in GuC scheduler - Minor bug fixes. - Added support to log media reset count for host to read it - Sub-feature level control for power management features. - Minor clean-up for power management interface. - Unified power management interface and scheduler interface into 1 file using same version. - Bug Fix for multi context scheduler flag. - DCC spec changes for BXT + DCT enabling - SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC - Moving GuC non_critical r/w data to lower SRAM 64KB - Media engine Reset fix. Correctly marking context for resubmission in Media Reset case. - ABT Disable bug fix. Disabled Evaluation mode on context change. - Async FW in Engine Schedule feature (not enabled from KMD) - GuC clean up to align developer build in line to production build. - DCC consistency fix for SKL - Disable ARAT interrupt before programming ARAT delta. - Memory range check in Parse to avoid failure due to overflow. - Enabled WA for MSGCH hang issue - Clear forcewake in CSB when SQ is empty. - Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. - This is file location change.No functional change done as part of this check in. - Enable decoupled freq for SKL GT4 - 3 tries of wake request needed from GuC2CSME for ME to wake up. Request has come from ME spec - During reset one parameter was not getting accounted - Enabling Guc Log changes for ultra low logging for OCA - Enabling build failure check to catch critical section overflow. - Disable build.bat redundant prints. - Move few least used functions to non-critical section. - Rearrange GuC documentation folder structure. - Synchronize SLPC internal debug interface with other branches. - Fixing Issue with Default Guc Log changes for OCA using special Control Bit v2: Rebase. Updated commit message. Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Spotswood John A <john.a.spotswood@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1511972351-574-2-git-send-email-sagar.a.kamble@intel.com
* drm/i915/guc: Use consistent name for scratch register countMichal Wajdeczko2017-11-241-2/+2
| | | | | | | | | | | | We should be consistent on naming of similar definitions. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171124170239.29360-1-michal.wajdeczko@intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/guc: Simplify programming of GUC_SHIM_CONTROLMichal Wajdeczko2017-11-081-2/+7
| | | | | | | | | | | | | | | | We can program GUC_SHIM_CONTROL register with all expected bits without use of extra macro defined in fwif.h v2: rebased without pre-prod code v3: fixed typo Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171103151816.62048-4-michal.wajdeczko@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/guc: Drop legacy workarounds from guc_prepare_xferMichal Wajdeczko2017-11-081-10/+0
| | | | | | | | | | | | | | | | We don't keep the workarounds for pre-production hardware (see intel_detect_preproduction_hw) thus we can drop some extra steps during firmware upload needed only for unsupported platforms. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171103151816.62048-3-michal.wajdeczko@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/guc: Wait for ucode DMA transfer completionMichal Wajdeczko2017-11-081-1/+8
| | | | | | | | | | | | | | | We silently assumed that DMA transfer will be completed within assumed timeout and thus we were waiting only at last step for GuC to become ready. Add intermediate wait to catch unexpected delays in DMA transfer. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171103151816.62048-2-michal.wajdeczko@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/guc: Split GuC firmware xfer function into clear stepsMichal Wajdeczko2017-11-081-69/+103
| | | | | | | | | | | | | | | | | Transfer of GuC firmware requires few steps that currently are implemented in two large functions. Split this code into smaller functions to make these steps small and clear. Also be prepared for potential DMA xfer step failure. v2: rename function steps (Sagar) Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171103151816.62048-1-michal.wajdeczko@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/uc: Unify firmware loadingMichal Wajdeczko2017-10-161-47/+5
| | | | | | | | | | | | | | | | | Firmware loading for GuC and HuC are similar. Move common code into generic function for maximum reuse. v2: change message levels (Chris) Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-13-michal.wajdeczko@intel.com
* drm/i915/guc: Pick better place for Guc final status messageMichal Wajdeczko2017-10-161-6/+0
| | | | | | | | | | | | | | | | GuC status message printed right after firmware upload may be too optimistic, as we may fail on subsequent steps. Move that message to the end of intel_uc_init_hw where we know the status for sure. v2: use dev_info (Chris) Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-9-michal.wajdeczko@intel.com
* drm/i915/guc: Reorder functions in intel_guc_fw.cMichal Wajdeczko2017-10-161-40/+41
| | | | | | | | | | Functions should be defined in their use order. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-7-michal.wajdeczko@intel.com
* drm/i915/guc: Rename intel_guc_loader.c to intel_guc_fw.cMichal Wajdeczko2017-10-161-0/+298
Remaining functions in intel_guc_loader.c were focused around GuC firmware. Rename them to match object-verb pattern and rename file itself. Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171016144724.17244-6-michal.wajdeczko@intel.com
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-15 01:09:48 +0000