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path: root/drivers/gpu/drm/tegra/gem.h
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* drm/tegra: gem: Make __tegra_gem_mmap() available more widelyThierry Reding2018-03-081-0/+1
| | | | | | | | | | This function allows mapping a GEM object into a virtual memory address space, which makes it useful outside of the GEM code. While at it, rename the function so it doesn't clash with the function that implements the DRM_TEGRA_GEM_MMAP IOCTL. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: gem: Reshuffle declarationsThierry Reding2018-03-081-2/+2
| | | | | | | Move declarations in the gem.h header file into the same order as the corresponding definitions in gem.c. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Use .dumb_map_offset and .dumb_destroy defaultsNoralf Trønnes2017-08-161-2/+0
| | | | | | | | | | This driver can use the drm_driver.dumb_destroy and drm_driver.dumb_map_offset defaults, so no need to set them. Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/1502034068-51384-7-git-send-email-noralf@tronnes.org
* drm/tegra: Check for malformed offsets and sizes in the 'submit' IOCTLDmitry Osipenko2017-06-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If commands buffer claims a number of words that is higher than its BO can fit, a kernel OOPS will be fired on the out-of-bounds BO access. This was triggered by an opentegra Xorg driver that erroneously pushed too many commands to the pushbuf. The CDMA commands buffer address is 4 bytes aligned, so check its alignment. The maximum number of the CDMA gather fetches is 16383, add a check for it. Add a sanity check for the relocations in a same way. [ 46.829393] Unable to handle kernel paging request at virtual address f09b2000 ... [<c04a3ba4>] (host1x_job_pin) from [<c04dfcd0>] (tegra_drm_submit+0x474/0x510) [<c04dfcd0>] (tegra_drm_submit) from [<c04deea0>] (tegra_submit+0x50/0x6c) [<c04deea0>] (tegra_submit) from [<c04c07c0>] (drm_ioctl+0x1e4/0x3ec) [<c04c07c0>] (drm_ioctl) from [<c02541a0>] (do_vfs_ioctl+0x9c/0x8e4) [<c02541a0>] (do_vfs_ioctl) from [<c0254a1c>] (SyS_ioctl+0x34/0x5c) [<c0254a1c>] (SyS_ioctl) from [<c0107640>] (ret_fast_syscall+0x0/0x3c) Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: gem: Use more consistent data typesThierry Reding2014-11-131-4/+4
| | | | | | | Use size_t consistently for sizes and u32/u64 instead of uint32_t and uint64_t. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Add IOMMU supportThierry Reding2014-11-131-0/+6
| | | | | | | | | When an IOMMU device is available on the platform bus, allocate an IOMMU domain and attach the display controllers to it. The display controllers can then scan out non-contiguous buffers by mapping them through the IOMMU. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm: Extract <drm/drm_gem.h>Daniel Vetter2014-09-241-0/+1
| | | | | | | | | | | v2: Don't forget git add, noticed by David. Cc: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Acked-by: David Herrmann <dh.herrmann@gmail.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/tegra: Implement more tiling modesThierry Reding2014-08-041-2/+14
| | | | | | | | | Tegra124 supports a block-linear mode in addition to the regular pitch linear and tiled modes. Add support for these by moving the internal representation into a structure rather than a simple flag. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Relicense under GPL v2Thierry Reding2014-04-041-11/+3
| | | | | | | | The majority of the code in this driver is licensed under the GPL v2, so relicense the rest under GPL v2 as well for consistency. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Add PRIME supportThierry Reding2013-12-201-0/+7
| | | | | | | | Implement very basic PRIME support. This currently only works with buffers that are contiguous in memory and will refuse to import any physically non-contiguous buffers. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Do not export tegra_bo_opsThierry Reding2013-12-191-2/+0
| | | | | | | These buffer object operations are never used outside of the GEM implementation so there is no use in exporting them. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Support bottom-up buffer objectsThierry Reding2013-10-311-1/+2
| | | | | | | | | The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Add support for tiled buffer objectsThierry Reding2013-10-311-4/+9
| | | | | | | | | The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Move driver to DRM treeThierry Reding2013-10-311-0/+56
In order to make subsystem-wide changes easier, move the Tegra DRM driver back into the DRM tree. Signed-off-by: Thierry Reding <treding@nvidia.com>
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