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path: root/drivers/gpu/drm/tegra/sor.c
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* drm/tegra: Clean up GPIO includesLinus Walleij2020-04-171-1/+0
| | | | | | | | | | | | | | The Tegra DRM drivers includes the legacy GPIO headers <linux/gpio.h> and <linux/of_gpio.h> but what it really uses is <linux/gpio/consumer.h> since only gpio_desc structs are ever referenced. Include the right header on the top level tegra/drm.h file and drop all the surplus includes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200415122427.111769-1-linus.walleij@linaro.org
* drm/tegra: Use simple encoderThomas Zimmermann2020-04-021-6/+2
| | | | | | | | | | The tegra driver uses empty implementations for its encoders. Replace the code with the generic simple encoder. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200305155950.2705-16-tzimmermann@suse.de
* drm/tegra: remove checks for debugfs functions return valueWambui Karuga2020-03-181-10/+1
| | | | | | | | | | | | | | | | | | | Since 987d65d01356 (drm: debugfs: make drm_debugfs_create_files() never fail) there is no need to check the return value of drm_debugfs_create_files(). Therefore, remove the return checks and error handling of the drm_debugfs_create_files() function from various debugfs init functions in drm/tegra and have them return 0 directly. v2: remove conversion of tegra_debugfs_init() to void to avoid build breakage. References: https://lists.freedesktop.org/archives/dri-devel/2020-February/257183.html Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200310133121.27913-2-wambui.karugax@gmail.com
* Merge tag 'drm/tegra/for-5.6-rc1-fixes' of ↵Dave Airlie2020-02-071-22/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Fixes for v5.6-rc1 These are a couple of quick fixes for regressions that were found during the first two weeks of the merge window. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200206172753.2185390-1-thierry.reding@gmail.com
| * drm/tegra: sor: Initialize runtime PM before useThierry Reding2020-01-311-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") replaced the generic runtime PM usage by a host1x bus-specific implementation in order to work around some assumptions baked into runtime PM that are in conflict with the requirements in the Tegra DRM driver. Unfortunately the new runtime PM callbacks are not setup yet at the time when the SOR driver first needs to resume the device to register the SOR pad clock, and accesses to register will cause the system to hang. Note that this only happens on Tegra124 and Tegra210 because those are the only SoCs where the SOR pad clock is registered from the SOR driver. Later generations use a SOR pad clock provided by the BPMP. Fix this by moving the registration of the SOR pad clock after the host1x client has been registered. That's somewhat suboptimal because this could potentially, though it's very unlikely, cause the Tegra DRM to be probed if the SOR happens to be the last subdevice to register, only to be immediately removed again if the SOR pad output clock fails to register. That's just a minor annoyance, though, and doesn't justify implementing a workaround. Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: sor: Disable runtime PM on probe failureThierry Reding2020-01-311-6/+8
| | | | | | | | | | | | | | | | If the driver fails to probe, make sure to disable runtime PM again. While at it, make the cleanup code in ->remove() symmetric. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: sor: Suspend on clock registration failureThierry Reding2020-01-311-6/+7
| | | | | | | | | | | | | | Make sure the SOR module is suspenden after we fail to register the SOR pad output clock. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge tag 'drm/tegra/for-5.6-rc1' of ↵Dave Airlie2020-01-151-62/+101
|\| | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.6-rc1 This contains a small set of mostly fixes and some minor improvements. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200111004835.2412858-1-thierry.reding@gmail.com
| * drm/tegra: output: Implement system suspend/resumeThierry Reding2020-01-101-0/+17
| | | | | | | | | | | | | | | | | | Implement generic system suspend/resume functions that can be used with any output type. Currently this only implements disabling and enabling of the IRQ functionality across system suspend/resume. This prevents an interrupt from happening before the display driver has fully resumed. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: sor: Mark PM functions as __maybe_unusedArnd Bergmann2020-01-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without CONFIG_PM, some functions cause harmless warnings: drivers/gpu/drm/tegra/sor.c:3984:12: error: 'tegra_sor_resume' defined but not used [-Werror=unused-function] static int tegra_sor_resume(struct device *dev) ^~~~~~~~~~~~~~~~ drivers/gpu/drm/tegra/sor.c:3970:12: error: 'tegra_sor_suspend' defined but not used [-Werror=unused-function] static int tegra_sor_suspend(struct device *dev) ^~~~~~~~~~~~~~~~~ Mark these as __maybe_unused so the compiler can drop them silently. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: Do not implement runtime PMThierry Reding2020-01-101-66/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra DRM driver heavily relies on the implementations for runtime suspend/resume to be called at specific times. Unfortunately, there are some cases where that doesn't work. One example is if the user disables runtime PM for a given subdevice. Another example is that the PM core acquires a reference to runtime PM during system sleep, effectively preventing devices from going into low power modes. This is intentional to avoid nasty race conditions, but it also causes system sleep to not function properly on all Tegra systems. Fix this by not implementing runtime PM at all. Instead, a minimal, reference-counted suspend/resume infrastructure is added to the host1x bus. This has the benefit that it can be used regardless of the system power state (or any transitions we might be in), or whether or not the user allows runtime PM. Atomic modesetting guarantees that these functions will end up being called at the right point in time, so the pitfalls for the more generic runtime PM do not apply here. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * gpu: host1x: Rename "parent" to "host"Thierry Reding2020-01-101-1/+1
| | | | | | | | | | | | | | | | | | Rename the host1x clients' parent to "host" because that more closely describes what it is. The parent can be confused with the parent device in terms of the device hierarchy. Subsequent patches will add a new member that refers to the parent in that hierarchy. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | drm/tegra: Provide ddc symlink in output connector sysfs directoryAndrzej Pietrasiewicz2020-01-071-3/+4
|/ | | | | | | | | Use the ddc pointer provided by the generic connector. Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200102132300.24309-2-andrzej.p@collabora.com
* drm/tegra: sor: Make the +5V HDMI supply optionalThierry Reding2019-12-041-2/+16
| | | | | | | | | | | The SOR supports multiple display modes, but only when driving an HDMI monitor does it make sense to control the +5V power supply. eDP and DP don't need this, so make it optional. This fixes a crash observed during system suspend/resume. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Implement system suspend/resumeThierry Reding2019-12-041-5/+19
| | | | | | | | | | | Upon system suspend, make sure the +5V HDMI regulator is disabled. This avoids potentially leaking current to the HDMI connector. This also makes sure that upon resume the regulator is enabled again, which in some cases is necessary to properly restore the state of the supply on resume. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Introduce audio enable/disable callbacksThierry Reding2019-10-281-2/+8
| | | | | | | In order to support different modes (DP in addition to HDMI), split out the audio setup/teardown into callbacks. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Extract common audio enabling codeThierry Reding2019-10-281-18/+25
| | | | | | | | | The code to enable audio support is split into two parts, one being generic for the SOR and another part that is specific whether the SOR is in HDMI mode or in DP mode. Split out the common part in preparation for reusing the code in DP mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Avoid timeouts on unplug eventsThierry Reding2019-10-281-3/+10
| | | | | | | | | When the SOR is disabled in DP mode as part of an unplug event, do not attempt to power the DP link down. Powering down the link requires the DPAUX to transmit AUX messages which only works if there's a connected sink. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Unify eDP and DP supportThierry Reding2019-10-281-347/+74
| | | | | | | | | | | | The SOR0 on Tegra210 does, contrary to what was previously assumed, in fact support DisplayPort. The difference between SOR0 and SOR1 is that the latter supports audio and HDCP over DP, whereas the former doesn't. The code for eDP and DP is now almost identical and the differences can easily be parameterized based on the presence of a panel. There is no need any longer to duplicate the code. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Use correct I/O pad for DPThierry Reding2019-10-281-0/+1
| | | | | | | | The correct I/O pad needs to be powered up before DP can be used. Make sure the correct default is set for Tegra generations where the I/O pad cannot be derived from the SOR instance. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Unify clock setup for eDP, HDMI and DPThierry Reding2019-10-281-11/+81
| | | | | | | With the clocks modelled consistently across SoC generations, the clock setup for eDP, HDMI and DP can now be unified. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Support DisplayPort on Tegra194Thierry Reding2019-10-281-0/+5
| | | | | | | Reuse parameters from earlier generations to support DisplayPort on Tegra194. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Deduplicate connector type detection codeThierry Reding2019-10-281-109/+109
| | | | | | | | | The connector type detection code is duplicated in two places. Keeping both places in sync is an extra maintenance burden that can be avoided by comparing the connector type operations that are set upon the first detection. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Implement pad clock for all SOR instancesThierry Reding2019-10-281-6/+14
| | | | | | | | | So far the pad clock was only needed on the second SOR instance. The clock does exist for all SOR instances, though, so make sure it is always implemented. This prepares for further unification of the code in subsequent patches. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Use correct SOR index on Tegra210Thierry Reding2019-10-281-0/+5
| | | | | | | | | | The device tree bindings for the Tegra210 SOR don't require the controller instance to be defined, since the instance can be derived from the compatible string. The index is never used on Tegra210, so we got away with it not getting set. However, subsequent patches will change that, so make sure the proper index is used. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Remove tegra186-sor1 supportThierry Reding2019-10-281-18/+0
| | | | | | | It turns out that SOR1 is just another instance of the same block as the SOR0, so there is no need to distinguish them. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Add DisplayPort supportThierry Reding2019-10-281-2/+341
| | | | | | Add support for regular DisplayPort on Tegra210 and Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Filter eDP ratesThierry Reding2019-10-281-0/+26
| | | | | | | | The SOR found on Tegra SoCs does not support all the rates potentially advertised by eDP 1.4. Make sure that the rates that are not supported are filtered out. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Stabilize eDPThierry Reding2019-10-281-89/+49
| | | | | | | Rework eDP code to correspond more closely to what's documented. This also improves the reliability of modesets. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Hook up I2C-over-AUX to outputThierry Reding2019-10-281-0/+2
| | | | | | | | | This is necessary for the output abstraction to retrieve a list of valid modes from the EDID of a connected panel/monitor. This will be useful in conjunction with DisplayPort support that will be added in a subsequent patch, so that the driver can read EDID via the AUX channel. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Use DP link training helpersThierry Reding2019-10-281-216/+468
| | | | | | | | Make use of the DP link training helpers to implement full and fast link training. While at it, refactor some of the code and remove various code sequences that are not necessary. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: dp: Turn link capabilities into booleansThierry Reding2019-10-281-2/+2
| | | | | | | | Rather than storing capabilities as flags in an integer, use a separate boolean per capability. This simplifies the code that checks for these capabilities. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: dp: Track link capabilities alongside settingsThierry Reding2019-10-281-14/+14
| | | | | | | Store capabilities in max_* fields and add separate fields for the currently selected settings. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: sor: Move register programming out of ->init()Thierry Reding2019-10-241-13/+11
| | | | | | | | | The hardware is not guaranteed to be enabled during execution of the tegra_sor_init() function, which can lead to a crash on some Tegra SoCs. Fix this by moving all register programming into code that is guaranteed to only be executed when the hardware is enabled. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Move drm_dp_link helpers to Tegra DRMThierry Reding2019-10-231-0/+1
| | | | | | | | | | | | | | During the discussion of patches that enhance the drm_dp_link helpers it was concluded that these helpers aren't very useful to begin with. After all other drivers have been converted not to use these helpers anymore, move these helpers into the last remaining user: Tegra DRM. If at some point these helpers are deemed more widely useful, they can be moved out into the DRM DP helpers again. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20191021143437.1477719-14-thierry.reding@gmail.com
* drm/tegra: drop use of drmP.hSam Ravnborg2019-08-141-0/+3
| | | | | | | | | | | | | | | Drop use of the deprecated drmP.h header file. For all touched files divide include files into blocks, and sort them within the blocks. Fix fallout. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-tegra@vger.kernel.org Link: https://patchwork.freedesktop.org/patch/msgid/20190804094132.29463-3-sam@ravnborg.org
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* drm/tegra: sor: Implement acquire/release for resetThierry Reding2019-03-221-1/+20
| | | | | | | | | | | | | By implementing the acquire/release protocol, the SOR reset can be shared with other drivers that also adhere to this protocol, such as the PMC driver that uses the same reset as part of the powergate and -ungate implementation using generic power domains. Runtime PM makes sure that the operations are executed in the right order, and the reset core has error handling and WARNs in place to make sure the acquire/release protocol is followed. Signed-off-by: Thierry Reding <treding@nvidia.com>
* Merge tag 'drm/tegra/for-5.1-rc1' of ↵Dave Airlie2019-02-111-37/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.1-rc1 This set of changes starts of with some refactoring of the CEC support to make it reusable on Tegra210 and later. Following are a couple of fixes for HDMI audio support (via HDA). The bulk here is a set of preparatory patches working towards enabling Tegra186 support for host1x and VIC. Additional patches will be needed to fully enable this, but they're not quite ready yet. To round things off, this also adds support for configuring the SOR crossbar using device tree, and fixes a couple of job-related issues in the host1x code. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190208144721.25830-1-thierry.reding@gmail.com
| * drm/tegra: sor: Support device tree crossbar configurationThierry Reding2019-02-071-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | The crossbar configuration is usually the same across all designs for a given SoC generation. But sometimes there are designs that require some other configuration. Implement support for parsing the crossbar configuration from a device tree. If the crossbar configuration is not present in the device tree, fall back to the default crossbar configuration. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: hda: Extract HDA format parsing codeThierry Reding2019-01-161-71/+9
| | | | | | | | | | | | | | This code can be reused for HDMI, so extract it into a reusable function. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: sor: Parse more data from HDA formatThierry Reding2019-01-161-16/+53
| | | | | | | | | | | | | | | | | | | | The HDA format data passed to the SOR from the HDA codec contains more information than just the rate and number of channels. Parse all the fields and store them in an internal structure for subsequent use. While at it, also fix an off-by-one error in the number of channels. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | Merge drm/drm-next into drm-misc-nextMaxime Ripard2019-01-111-12/+242
|\| | | | | | | | | | | | | drm-next has been forwarded to 5.0-rc1, and we need it to apply the damage helper for dirtyfb series from Noralf Trønnes. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * drm/tegra: sor: Reset the SOR if possibleThierry Reding2018-12-061-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the SOR is already up and running when the kernel driver is probed, setting a mode will typically fail. This can be seen for example on Jetson TX2. Under certain circumstances the generic power domain code will cause the SOR to be reset. However, if the power domain is never powered off (this can happen if the HDA controller is enabled, which is part of the same power domain as the SOR), then the SOR will end up not getting reset and fail to properly set a mode. To work around this, try to get the reset control and assert/deassert it, irrespective of whether or not a generic power domain is attached to the SOR. On platforms where the kernel implements generic power domains (up to Tegra210) this will fail, because the power domain will already have acquired an exclusive reference to the reset control. But on recent platforms there the BPMP provides an ABI to control power domains, it's possible to acquire the reset control from SOR and use it to put the SOR into a known good state at probe time. The proper solution for this is to make the SOR driver capable of dealing with hardware that's already up and running (by first grace- fully shutting it down, or perhaps by seamlessly transitioning to the kernel driver and taking over the running display configuration). That is fairly involved, though, so we'll go with this quickfix for now. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: sor: Remove temporary workaroundThierry Reding2018-12-061-8/+0
| | | | | | | | | | | | | | | | Remove the temporary workaround of storing the Tegra186 HDMI/DP I/O pad ID in the SOR driver. The definition has long been available in the soc/tegra/pmc.h header file. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * drm/tegra: sor: Support for audio over HDMIThierry Reding2018-12-031-0/+229
| | | | | | | | | | | | | | | | | | This code is very similar to the audio over HDMI support on older chips. Interoperation with the audio codec is done via a pair of codec scratch registers and an interrupt that is raised at the SOR when the codec has written those registers. Signed-off-by: Thierry Reding <treding@nvidia.com>
* | drm/edid: Pass connector to AVI infoframe functionsVille Syrjälä2019-01-101-1/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make life easier for drivers by simply passing the connector to drm_hdmi_avi_infoframe_from_display_mode() and drm_hdmi_avi_infoframe_quant_range(). That way drivers don't need to worry about is_hdmi2_sink mess. v2: Make is_hdmi2_sink() return true for sil-sii8620 Adapt to omap/vc4 changes Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: Archit Taneja <architt@codeaurora.org> Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: Inki Dae <inki.dae@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Russell King <linux@armlinux.org.uk> Cc: CK Hu <ck.hu@mediatek.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Rob Clark <robdclark@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Sandy Huang <hjc@rock-chips.com> Cc: "Heiko Stübner" <heiko@sntech.de> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Ilia Mirkin <imirkin@alum.mit.edu> Cc: amd-gfx@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190108172828.15184-1-ville.syrjala@linux.intel.com
* drm/tegra: sor: Add Tegra194 supportThierry Reding2018-09-261-0/+110
| | | | | | | | The SOR implemented in Tegra194 is subtly different from its predecessor found in Tegra186. Most notably some registers have been moved around so it is no longer compatible. Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm: drop _mode_ from drm_mode_connector_attach_encoderDaniel Vetter2018-07-131-1/+1
| | | | | | | | | Again to align with the usual prefix of just drm_connector_. Again done with sed + manual fixup for indent issues. Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180709084016.23750-7-daniel.vetter@ffwll.ch
* BackMerge tag 'v4.15-rc8' into drm-nextDave Airlie2018-01-181-0/+1
|\ | | | | | | | | | | | | Linux 4.15-rc8 Daniel requested this for so the intel CI won't fall over on drm-next so often.
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