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* drm: GEM handles are u32, not intPekka Paalanen2009-08-272-7/+7
| | | | | | | | | | Several functions in the GEM kernel API used int as handle type, but user API has it __u32 which is also the intended type. Replace int with u32. Signed-off-by: Pekka Paalanen <pq@iki.fi> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/rs600/690: use autogenerated safe register tables.Dave Airlie2009-08-275-68/+745
| | | | | | | This ports rs690 to the safe reg tables and makes rs600 also use the same table. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/r128: Use request_firmware() to load CCE microcodeBen Hutchings2009-08-272-50/+49
| | | | | | | | | Firmware blob looks like this: __be32 datah __be32 datal Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/mga: Use request_firmware() to load microcodeBen Hutchings2009-08-275-11750/+81
| | | | | | | | Image format is IHEX, one record for each pipe in order (record addresses are ignored). Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/ttm: consolidate cache flushing code in one place.Dave Airlie2009-08-272-74/+44
| | | | | | | This merges the TTM and drm cache flushing into one file in the drm core. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/radeon/kms: generate the safe register tables.Dave Airlie2009-08-216-104/+1960
| | | | | | | | | | Previously we just made these offline and included them, but no reason we can't generate them at build time. TODO: add rs690 + r100/r200 when done. should we do rs480/rs690 no tcl version? Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/ttm: Fixes for "Memory accounting rework."Thomas Hellstrom2009-08-201-8/+28
| | | | | | | | ttm: Fix error paths when kobject_add returns an error. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/ttm: Fixes for "Make parts of a struct ttm_bo_device global"Thomas Hellstrom2009-08-202-4/+1
| | | | | | | | | | | | ttm: Remove a stray debug printout. Remove a re-init of the lru spinlock at device init. radeon: Fix the size of the bo_global allocation. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge Linus master to drm-nextDave Airlie2009-08-2073-2320/+5272
|\ | | | | | | | | | | | | | | | | | | | | linux-next conflict reported needed resolution. Conflicts: drivers/gpu/drm/drm_crtc.c drivers/gpu/drm/drm_edid.c drivers/gpu/drm/i915/intel_sdvo.c drivers/gpu/drm/radeon/radeon_ttm.c drivers/gpu/drm/ttm/ttm_bo.c
| * drm/kms: teardown crtc correctly when fb is destroyed.Dave Airlie2009-08-191-28/+12
| | | | | | | | | | | | | | | | If userspace destroys a framebuffer that is in use on a crtc, don't just null it out, tear down the crtc properly so the hw gets turned off. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/kms/radeon: cleanup combios TV table like DDX.Dave Airlie2009-08-191-29/+19
| | | | | | | | | | | | | | The fallback case wasn't getting executed properly if there was no TV table, which my T42 M7 hasn't got. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: memset the allocated framebuffer before using it.Dave Airlie2009-08-191-0/+2
| | | | | | | | | | | | | | This gets rid of some ugliness, we shuold probably find a way for the GPU to zero this. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: although LVDS might be possible on crtc 1 don't do it.Dave Airlie2009-08-191-0/+1
| | | | | | | | | | | | | | LVDS always requests RMX_FULL, we need to fix it so that doesn't happen before we can enable LVDS on crtc 1. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: implement bo busy check + current domainDave Airlie2009-08-173-1/+41
| | | | | | | | | | | | | | | | This implements the busy ioctl along with a current domain check. returns 0 or -EBUSY puts the current domain no matter what the answer. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: cut down indirects in register accesses.Dave Airlie2009-08-165-79/+47
| | | | | | | | | | | | | | | | We really don't want to be doing all these indirects, updating the GPU gart table is something we do often so the less overhead the better. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: Fix up vertical blank interrupt support.Michel Dänzer2009-08-169-77/+217
| | | | | | | | | | | | | | | | | | Fixes 3D apps timing out in the WAIT_VBLANK ioctl. AVIVO bits compile-tested only. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: add rv530 R300_SU_REG_DEST + reloc for ZPASS_ADDRDave Airlie2009-08-161-0/+15
| | | | | | | | | | | | These are needed for Occulsion Query support. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/edid: fixup detailed timings like the X server.Dave Airlie2009-08-151-38/+34
| | | | | | | | | | | | | | this syncs the versioning check with the code the X server uses. Reported-by: Anssi Hannula <anssi.hannula@iki.fi> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/radeon/kms: Add specific rs690 authorized register tableJerome Glisse2009-08-152-1/+67
| | | | | | | | | | | | | | | | | | | | rs690 is r3xx 3D engine with AVIVO modesetting so we need to allow AVIVO register for vline synchronization. This add a specific table to rs690 to handle that. Thanks to Marc (marvin24) for debugging this and kudos to Andre (taiu1) for spotting the origin of the bugs. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/i915: silence vblank warningsFrans Pop2009-08-091-2/+2
| | | | | | | | | | | | | | these errors are pretty pointless Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm: silence pointless vblank warning.Paul Rolland2009-08-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some applications/hardware combinations are triggering the message "failed to acquire vblank counter" to be issued up to 20 times a second, which makes it both useless and dangerous, as this may hide other important messages. This changes makes it only appear when people are debugging. Signed-off-by: Paul Rolland <rol@as2917.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Lost-twice-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm: When adding probed modes, preserve duplicate mode typesKeith Packard2009-08-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code which takes probed modes and adds them to a connector eliminates duplicate modes by comparing them using drm_mode_equal. That function doesn't consider the type bits, which means that any modes which differ only in the type field will be lost. One of the bits in the mode->type field is the DRM_MODE_TYPE_PREFERRED bit. If the mode with that bit is lost, then higher level code will not know which mode to select, causing a random mode to be used instead. This patch simply merges the two mode type bits together; that seems reasonable to me, but perhaps only a subset of the bits should be used? None of these can be user defined as they all come from looking at just the hardware. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * Merge branch 'for-linus' of ↵Linus Torvalds2009-08-0717-513/+1221
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (22 commits) drm/i915: Fix read outside array bounds in restoring the SWF10 range. drm/i915: Use our own workqueue to avoid wedging the system along with the GPU. drm/i915: Add support for dual-channel LVDS on 8xx. drm/i915: Return disconnected for SDVO DVI when there's no digital EDID. drm/i915: Choose real sdvo output according to result from detection drm/i915: Set preferred mode for integrated TV according to TV format drm/i915: fix 845G FIFO size & burst length drm/i915: fix VGA detect on IGDNG drm/i915: Add eDP support on IGDNG mobile chip drm/i915: enable DisplayPort support on IGDNG drm/i915: Fix channel ending action for DP aux transaction drm/i915: fix issue in display pipe setup on IGDNG drm/i915: disable VGA plane reliably drm/I915: Fix offset to DVO timings in LVDS data drm/i915: hdmi detection according by reading edid drm/i915: correct self-refresh calculation in "everything off" case drm/i915: handle FIFO oversubsription correctly drm/i915: FIFO watermark calculation fixes drm/i915: ignore lvds on AOpen Mini PC MP-915 drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class hardware ...
| | * drm/i915: Fix read outside array bounds in restoring the SWF10 range.Roel Kluin2009-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | dev_priv->saveSWF1 is a 16 element array, but this reads up to index 22, and restored values from the wrong registers. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Use our own workqueue to avoid wedging the system along with the GPU.Eric Anholt2009-08-054-6/+19
| | | | | | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Add support for dual-channel LVDS on 8xx.ling.ma@intel.com2009-07-301-1/+1
| | | | | | | | | | | | | | | | | | | | | This corresponds to a fix to UMS back in 2007. Fixes fd.o bug #20115. Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Return disconnected for SDVO DVI when there's no digital EDID.ling.ma@intel.com2009-07-301-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch fixed a bug on MP965-D. When VGA is connected to a DVI-I connector, it incorrectly shows sdvo dvi as connected. Signed-off-by: Ma Ling <ling.ma@intel.com> [anholt: hand-resolved against previous commit and fixed up commit message] Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Choose real sdvo output according to result from detectionling.ma@intel.com2009-07-291-78/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Baed on Eric's idea in order to handle multiple sdvo encoders we implement another approach to dynamically chose real one encoder after detection, which is contrasted with patch - drm/i915:Construct all possible sdvo outputs for sdvo encoder. Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Set preferred mode for integrated TV according to TV formatling.ma@intel.com2009-07-291-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to get best possible quality image we chose 640x480 for NTSC, PAL and 480p, 1280x720 for 720p, 1920x1080 for 1080i/p TV format respectively. Signed-off-by: Ma Ling <ling.ma@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: fix 845G FIFO size & burst lengthJesse Barnes2009-07-291-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I had one report of flicker due to FIFO underruns on 845G. Scott was kind enough to test a few patches and report success with this one. Looks like 845G measures FIFO size slightly differently than other chips, and we were also clobbering the FIFO burst length. Fixing both of those issues gives him a healthy machine again. Note that we still only adjust plane A's watermark in the 830/845 case. If someone is willing to test we could support a bigger variety of dual-head 830/845 configurations with a bit more code. Fixes fdo bug #19304 (again). Reported-by: Scott Hansen <scottandchrystie@comcast.net> Tested-by: Scott Hansen <scottandchrystie@comcast.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: fix VGA detect on IGDNGZhenyu Wang2009-07-291-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Check FORCE_DETECT bit to be clear for the finish of hotplug detect process. Also check possible mono monitor which should also be marked as connected. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Add eDP support on IGDNG mobile chipZhenyu Wang2009-07-298-168/+468
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds embedded DisplayPort support on next mobile chip which aims to replace origin LVDS port. VBT's driver feature block has been used to determine the type of current internal panel for eDP or LVDS. Currently no panel fitting support for eDP and backlight control would be added in future. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: enable DisplayPort support on IGDNGZhenyu Wang2009-07-293-21/+157
| | | | | | | | | | | | | | | Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Fix channel ending action for DP aux transactionZhenyu Wang2009-07-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should use current channel 'status' bits to clear DP aux channel's done and error bits, instead of using the channel setting bits, that will set send/busy bit again to initiate new transaction. This also includes also some minor cleanup. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: fix issue in display pipe setup on IGDNGZhenyu Wang2009-07-292-12/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During pipe DPMS off, instead of busy waiting pipe off, insert delays during wait and don't loop after enough tries which matches spec requirement. Also try to match DPMS on path by disable FDI TX PLL in DPMS off. Disable PF by writing PF_WIN_SZ which really trigger the update. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: disable VGA plane reliablyZhenyu Wang2009-07-291-3/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | This does VGA disable like DDX driver. SR01 bit 5 should be set before VGA plane disable through control register, otherwise we might get random crash and lockups. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/I915: Fix offset to DVO timings in LVDS dataZhao Yakui2009-07-291-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the DVO timing in LVDS data entry is obtained by using the following step: a. get the entry size for every LVDS panel data b. Get the LVDS fp entry for the preferred panel type c. get the DVO timing by using entry->dvo_timing In our driver the entry->dvo_timing is related with the size of lvds_fp_timing. For example: the size is 46. But it seems that the size of lvds_fp_timing varies on the differnt platform. In such case we will get the incorrect DVO timing entry because of the incorrect DVO offset in LVDS panel data entry. This also removes a hack on new IGDNG to get proper DVO timing. Calculate the DVO timing offset in LVDS data entry to get the DVO timing a. get the DVO timing offset in the LVDS fp data entry by using the pointer definition in LVDS data ptr b. get the LVDS data entry c. get the DVO timing by adding the DVO timing offset to data entry https://bugs.freedesktop.org/show_bug.cgi?id=22787 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Tested-by: Zhenyu Wang <zhenyuw@linux.intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: hdmi detection according by reading edidling.ma@intel.com2009-07-221-60/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to investigations from windows team ,hw team, and our test results on all 4x platofrms available (gm45, g45b, q45, g45a, g45c, g41a, and g41), we find currently Hot plug live status and Hot plug interrupt detection are not reliable, sometime the results from the two approaches are contradicts. So we chose edid detection for hdmi output. Signed-off-by: Ma Ling <ling.ma@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: correct self-refresh calculation in "everything off" caseJesse Barnes2009-07-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If no planes are enabled, the self-refresh calculation may end up doing a divide by zero. This patch should prevent that by making sure at least one of the CRTCs had a valid hdisplay value. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: handle FIFO oversubsription correctlyJesse Barnes2009-07-161-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you're pushing a plane hard (i.e. you need most or all of the FIFO entries just to cover your frame refresh latency), the watermark level may end up being negative. So fix up the signed vs. unsigned math in the calculation function to handle this correctly, giving all available FIFO entries to such a configuration. Reported-by: Eric Anholt <eric@anholt.net> Tested-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: FIFO watermark calculation fixesJesse Barnes2009-07-142-75/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I discovered several bugs in the FIFO code that was recently applied. Some of them fell into the "how did this ever work" category, since in some cases we were using the wrong FIFO size values, and the calculations ended up being way off. This patch fixes all the bugs I found, and works well on my GM45, 915GM and 855GM test machines; but as usual with these sorts of patches broader testing is definitely requested (in particular this patch affects 830, 845 and 865 for which I don't have test hardware). Overall, the patch clarifies the watermark calculation function by adding some comments and debug info, and making the variable names a bit clearer. The "get FIFO size" portion of the code has also been corrected, so we should be able to properly detect the FIFO allocations for each pipe, for use in the watermark calculation. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: ignore lvds on AOpen Mini PC MP-915Tormod Volden2009-07-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | This motherboard thinks it has an LVDS connected, so without this patch the screen goes blank on the connected VGA monitor. More information (for the non-KMS case) in fd.o bug #18004. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Allow frame buffers up to 4096x4096 on 915/945 class hardwareKeith Packard2009-07-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 915 and 945 scanout engines can handle frame buffers up to 4096 pixels wide. Pre-9xx hardware has an 8192 byte stride limit, and so we leave the existing 2048 max in place. I'm not sure why we limit the height to the same value; there's no intrinsic hardware limit in the scanout engine. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: refactor error detection & collectionJesse Barnes2009-07-133-74/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refactors the existing error detection and collection code, placing most of it in i915_handle_error(). Additionally, we introduce a work queue for scheduling post-crash tasks such as generating a uevent. Using the uevent facility, userspace should be able to capture a post-mortem dump for diagnostics. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| | * drm/i915: Set lvds dual channel according to register from vbiosFlorian Mickler2009-07-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vbios will set lvds register correctly based on current algorithm for lingle/dual Channel LVDS when system boot, so we can accept this configuration directly, regardless of LVDS enable status. It fixed freedesktop.org bug #22262 Signed-off-by: Florian Mickler <florian@mickler.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/radeon/kms: setup MC/VRAM the same way for suspend/resumeDave Airlie2009-08-071-1/+3
| | | | | | | | | | | | | | | | | | | | | we should align the GTT after VRAM no matter what, as we can come back from resume and put in a different place and bad things happen. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon/kms: Fix caching mode selection for GTT objectJerome Glisse2009-08-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | GTT object can either be cached,uncached or wc just let core ttm pick the best mode according to how the bo driver and GTT memory type was initialized. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Add support for RS880 chipsAlex Deucher2009-08-052-7/+16
| | | | | | | | | | | | | | | | | | | | | These are new AMD IGP chips Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/ttm: Read buffer overflowRoel Kluin2009-08-041-1/+2
| | | | | | | | | | | | | | | | | | | | | Check whether index is within bounds before grabbing the element. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/radeon: Read buffer overflowRoel Kluin2009-08-041-1/+2
| | | | | | | | | | | | | | | | | | | | | Check whether index is within bounds before grabbing the element. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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