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path: root/drivers/hwtracing/intel_th/pci.c
Commit message (Expand)AuthorAgeFilesLines
* intel_th: pci: Add Raptor Lake-S CPU supportAlexander Shishkin2022-07-081-0/+5
* intel_th: pci: Add Raptor Lake-S PCH supportAlexander Shishkin2022-07-081-0/+5
* intel_th: pci: Add Meteor Lake-P supportAlexander Shishkin2022-07-081-0/+5
* intel_th: Fix a resource leak in an error handling pathChristophe JAILLET2022-07-081-2/+8
* intel_th: pci: Add Alder Lake-M supportAlexander Shishkin2021-04-161-0/+5
* intel_th: pci: Add Rocket Lake CPU supportAlexander Shishkin2021-04-161-0/+5
* intel_th: Constify all drvdata referencesAlexander Shishkin2021-04-161-1/+1
* intel_th: pci: Add Alder Lake-P supportAlexander Shishkin2021-01-211-0/+5
* intel_th: pci: Add Alder Lake CPU supportAlexander Shishkin2020-10-051-0/+5
* intel_th: pci: Add Alder Lake-S supportAlexander Shishkin2020-10-051-0/+5
* intel_th: pci: Add Emmitsburg PCH supportAlexander Shishkin2020-07-101-0/+5
* intel_th: pci: Add Tiger Lake PCH-H supportAlexander Shishkin2020-07-101-0/+5
* intel_th: pci: Add Jasper Lake CPU supportAlexander Shishkin2020-07-101-0/+5
* Merge 5.6-rc7 into char-misc-nextGreg Kroah-Hartman2020-03-231-0/+5
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| * intel_th: pci: Add Elkhart Lake CPU supportAlexander Shishkin2020-03-181-0/+5
* | intel_th: Disallow multi mode on devices where it's brokenAlexander Shishkin2020-03-181-2/+6
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* intel_th: pci: Add Elkhart Lake SOC supportAlexander Shishkin2019-12-171-0/+5
* intel_th: pci: Add Comet Lake PCH-V supportAlexander Shishkin2019-12-171-0/+5
* intel_th: pci: Add Tiger Lake CPU supportAlexander Shishkin2019-11-201-0/+5
* intel_th: pci: Add Ice Lake CPU supportAlexander Shishkin2019-11-201-0/+5
* intel_th: pci: Add Jasper Lake PCH supportAlexander Shishkin2019-11-041-0/+5
* intel_th: pci: Add Comet Lake PCH supportAlexander Shishkin2019-11-041-0/+5
* intel_th: pci: Add Tiger Lake supportAlexander Shishkin2019-08-281-0/+5
* intel_th: pci: Add support for another Lewisburg PCHAlexander Shishkin2019-08-281-0/+5
* intel_th: pci: Add Ice Lake NNPI supportAlexander Shishkin2019-07-031-0/+5
* Merge tag 'char-misc-5.2-rc1-part2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2019-05-071-4/+28
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| * intel_th: Only report useful IRQs to subdevicesAlexander Shishkin2019-05-031-0/+1
| * intel_th: pci: Use MSI interrupt signallingAlexander Shishkin2019-05-031-6/+10
| * intel_th: Communicate IRQ via resourceAlexander Shishkin2019-05-031-2/+7
| * intel_th: Add "rtit" source deviceAlexander Shishkin2019-05-031-3/+8
| * intel_th: Rework resource passing between glue layers and coreAlexander Shishkin2019-05-031-3/+12
* | intel_th: pci: Add Comet Lake supportAlexander Shishkin2019-04-251-0/+5
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* intel_th: pci: Add Ice Lake PCH supportAlexander Shishkin2018-09-181-0/+5
* intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplateAlexander Shishkin2018-03-281-9/+1
* intel_th: pci: Add Lewisburg PCH supportAlexander Shishkin2017-09-221-0/+5
* intel_th: pci: Add Cedar Fork PCH supportAlexander Shishkin2017-09-221-0/+5
* intel_th: Perform time resync on capture startAlexander Shishkin2017-08-251-3/+53
* intel_th: pci: Use drvdata for quirksAlexander Shishkin2017-08-251-1/+2
* intel_th: pci: Add Cannon Lake PCH-LP supportAlexander Shishkin2017-08-251-0/+5
* intel_th: pci: Add Cannon Lake PCH-H supportAlexander Shishkin2017-08-251-0/+5
* intel_th: pci: Enable bus masteringAlexander Shishkin2017-08-251-0/+2
* intel_th: pci: Add Gemini Lake supportAlexander Shishkin2017-03-151-0/+5
* intel_th: pci: Add Denverton SOC supportAlexander Shishkin2017-03-151-0/+5
* intel_th: pci: Add Kaby Lake PCH-H supportAlexander Shishkin2016-07-141-0/+5
* intel_th: pci: Add Broxton-M SOC supportAlexander Shishkin2016-04-191-0/+5
* intel_th: Set root device's drvdata earlyAlexander Shishkin2016-02-201-2/+0
* intel_th: pci: Add Broxton SOC supportAlexander Shishkin2016-02-071-0/+5
* intel_th: pci: Add Apollo Lake SOC supportAlexander Shishkin2016-02-071-0/+5
* intel_th: Add pci glue layer for Intel(R) Trace HubAlexander Shishkin2015-10-041-0/+86
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-15 23:46:53 +0000