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* Merge tag 'char-misc-6.5-rc1' of ↵Linus Torvalds2023-07-0330-676/+1320
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull Char/Misc updates from Greg KH: "Here is the big set of char/misc and other driver subsystem updates for 6.5-rc1. Lots of different, tiny, stuff in here, from a range of smaller driver subsystems, including pulls from some substems directly: - IIO driver updates and additions - W1 driver updates and fixes (and a new maintainer!) - FPGA driver updates and fixes - Counter driver updates - Extcon driver updates - Interconnect driver updates - Coresight driver updates - mfd tree tag merge needed for other updates on top of that, lots of small driver updates as patches, including: - static const updates for class structures - nvmem driver updates - pcmcia driver fix - lots of other small driver updates and fixes All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (243 commits) bsr: fix build problem with bsr_class static cleanup comedi: make all 'class' structures const char: xillybus: make xillybus_class a static const structure xilinx_hwicap: make icap_class a static const structure virtio_console: make port class a static const structure ppdev: make ppdev_class a static const structure char: misc: make misc_class a static const structure /dev/mem: make mem_class a static const structure char: lp: make lp_class a static const structure dsp56k: make dsp56k_class a static const structure bsr: make bsr_class a static const structure oradax: make 'cl' a static const structure hwtracing: hisi_ptt: Fix potential sleep in atomic context hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU hwtracing: hisi_ptt: Export available filters through sysfs hwtracing: hisi_ptt: Add support for dynamically updating the filter list hwtracing: hisi_ptt: Factor out filter allocation and release operation samples: pfsm: add CC_CAN_LINK dependency misc: fastrpc: check return value of devm_kasprintf() coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable() ...
| * hwtracing: hisi_ptt: Fix potential sleep in atomic contextYicong Yang2023-06-212-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We're using pci_irq_vector() to obtain the interrupt number and then bind it to the CPU start perf under the protection of spinlock in pmu::start(). pci_irq_vector() might sleep since [1] because it will call msi_domain_get_virq() to get the MSI interrupt number and it needs to acquire dev->msi.data->mutex. Getting a mutex will sleep on contention. So use pci_irq_vector() in an atomic context is problematic. This patch cached the interrupt number in the probe() and uses the cached data instead to avoid potential sleep. [1] commit 82ff8e6b78fc ("PCI/MSI: Use msi_get_virq() in pci_get_vector()") Fixes: ff0de066b463 ("hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device") Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230621092804.15120-6-yangyicong@huawei.com
| * hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMUYicong Yang2023-06-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PTT trace collects PCIe TLP headers from the PCIe link and don't have the ability to exclude certain context. It doesn't support itrace as well. So replace PERF_PMU_CAP_ITRACE with PERF_PMU_CAP_NO_EXCLUDE. This will greatly save the storage of final data. Tested tracing idle link for ~15s, without this patch we'll collect ~28.682MB data for additional information and with this patch it reduced to ~0.226MB. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Tested-by: Junhao He <hejunhao3@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230621092804.15120-5-yangyicong@huawei.com
| * hwtracing: hisi_ptt: Export available filters through sysfsYicong Yang2023-06-212-0/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PTT can only filter the traced TLP headers by the Root Ports or the Requester ID of the Endpoint, which are located on the same PCIe core of the PTT device. The filter value used is derived from the BDF number of the supported Root Port or the Endpoint. It's not friendly enough for the users since it requires the user to be familiar enough with the platform and calculate the filter value manually. This patch export the available filters through sysfs. Each available filters is presented as an individual file with the name of the BDF number of the related PCIe device. The files are created under $(PTT PMU dir)/available_root_port_filters and $(PTT PMU dir)/available_requester_filters respectively. The filter value can be known by reading the related file. Then the users can easily know the available filters for trace and get the filter values without calculating. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230621092804.15120-4-yangyicong@huawei.com
| * hwtracing: hisi_ptt: Add support for dynamically updating the filter listYicong Yang2023-06-212-8/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCIe devices supported by the PTT trace can be removed/rescanned by hotplug or through sysfs. Add support for dynamically updating the available filter list by registering a PCI bus notifier block. Then user can always get latest information about available tracing filters and driver can block the invalid filters of which related devices no longer exist in the system. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230621092804.15120-3-yangyicong@huawei.com
| * hwtracing: hisi_ptt: Factor out filter allocation and release operationYicong Yang2023-06-211-24/+39
| | | | | | | | | | | | | | | | | | | | Factor out the allocation and release of filters. This will make it easier to extend and manage the function of the filter. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230621092804.15120-2-yangyicong@huawei.com
| * coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable()Nathan Chancellor2023-06-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang's kernel Control Flow Integrity (kCFI) is a compiler-based security mitigation that ensures the target of an indirect function call matches the expected type of the call and trapping if they do not match exactly. The warning -Wincompatible-function-pointer-types-strict aims to catch these issues at compile time, which reveals: drivers/hwtracing/coresight/coresight-dummy.c:53:12: error: incompatible function pointer types initializing 'int (*)(struct coresight_device *, struct perf_event *, enum cs_mode)' with an expression of type 'int (struct coresight_device *, struct perf_event *, u32)' (aka 'int (struct coresight_device *, struct perf_event *, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict] 53 | .enable = dummy_source_enable, | ^~~~~~~~~~~~~~~~~~~ drivers/hwtracing/coresight/coresight-dummy.c:62:12: error: incompatible function pointer types initializing 'int (*)(struct coresight_device *, enum cs_mode, void *)' with an expression of type 'int (struct coresight_device *, u32, void *)' (aka 'int (struct coresight_device *, unsigned int, void *)') [-Werror,-Wincompatible-function-pointer-types-strict] 62 | .enable = dummy_sink_enable, | ^~~~~~~~~~~~~~~~~ 2 errors generated. Commit 9fa3682869d4 ("coresight: Use enum type for cs_mode wherever possible") updated the type of the mode parameter in the prototype but this driver was not introduced until commit 9d3ba0b6c056 ("Coresight: Add coresight dummy driver") and 'int' is ABI compatible with 'enum cs_mode', so there is no warning from regular -Wincompatible-function-pointer-types. Adjust the type of the mode parameter in the callback implementations in the coresight dummy driver to match the prototype, clearing up the warning and avoiding kCFI failures at runtime. Fixes: 9d3ba0b6c056 ("Coresight: Add coresight dummy driver") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230616-coresight-dummy-fix-kcfi-warnings-v1-1-c55c64f8f0f5@kernel.org
| * Coresight: Add coresight dummy driverHao Zhang2023-06-153-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Coresight devices that kernel don't have permission to access or configure. For these devices, a dummy driver is needed to register them as Coresight devices. The module may also be used to define components that may not have any programming interfaces, so that paths can be created in the driver. It provides Coresight API for operations on dummy devices, such as enabling and disabling them. It also provides the Coresight dummy sink/source paths for debugging. Signed-off-by: Hao Zhang <quic_hazha@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230602084149.40031-2-quic_hazha@quicinc.com
| * coresight: etm4x: Match all ETM4 instances based on DEVARCH and DEVTYPESuzuki K Poulose2023-06-072-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of adding the PIDs forever to the list for the new CPUs, let us detect a component to be ETMv4 based on the CoreSight CID, DEVTYPE=PE_TRACE and DEVARCH=ETMv4. This is already done for some of the ETMs. We can extend the PID matching to match the PIDR2:JEDEC, BIT[3], which must be 1 (RAO) always. Link: https://lkml.kernel.org/r/20230317030501.1811905-1-anshuman.khandual@arm.com Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: frowand.list@gmail.com Cc: linux@armlinux.org.uk Cc: Mike Leach <mike.leach@linaro.org> Reviewed-by: Mike Leach <mike.leach@linaro.org> [ Fixed typo in the description RA0 => RAO ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230605133031.1827626-1-suzuki.poulose@arm.com
| * coresight: etm4x: Make etm4_remove_dev() return voidUwe Kleine-König2023-06-071-6/+3
| | | | | | | | | | | | | | | | | | | | | | etm4_remove_dev() returned zero unconditionally. Make it return void instead, which makes it clear in the callers that there is no error to handle. Simplify etm4_remove_platform_dev() accordingly. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230518201629.260672-1-u.kleine-koenig@pengutronix.de
| * coresight: etm4x: Fix missing trctraceidr file in sysfsMike Leach2023-06-061-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trace ID patchset adjusted the handling of the TRCTRACEIDR register sysfs to allocate on read. Although this was initally correct, the final version of the patch series introduced an error which resulted in the mgmt/trctraceidr file in sysfs not being visible. This patch fixes that issue. Fixes: df4871204e5d ("coresight: etm4x: Update ETM4 driver to use Trace ID API") Reported-by: Junhao He <hejunhao3@huawei.com> Link: https://lists.linaro.org/archives/list/coresight@lists.linaro.org/thread/KK3CVVMRHJWVUORKMFJRSXYCEDFKENQJ/ Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230512133054.235073-1-mike.leach@linaro.org
| * coresight: Fix CTI module refcount leak by making it a helper deviceJames Clark2023-06-056-105/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CTI module has some hard coded refcounting code that has a leak. For example running perf and then trying to unload it fails: perf record -e cs_etm// -a -- ls rmmod coresight_cti rmmod: ERROR: Module coresight_cti is in use The coresight core already handles references of devices in use, so by making CTI a normal helper device, we get working refcounting for free. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-14-james.clark@arm.com
| * coresight: Enable and disable helper devices adjacent to the pathJames Clark2023-06-055-54/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently CATU is the only helper device, and its enable and disable calls are hard coded. To allow more helper devices to be added in a generic way, remove these hard coded calls and just enable and disable all helper devices. This has to apply to helpers adjacent to the path, because they will never be in the path. CATU was already discovered in this way, so there is no change there. One change that is needed is for CATU to call back into ETR to allocate the buffer. Because the enable call was previously hard coded, it was done at a point where the buffer was already allocated, but this is no longer the case. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-13-james.clark@arm.com
| * coresight: Refactor out buffer allocation function for ETRJames Clark2023-06-052-7/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | When CATU is moved to the generic enable/disable path system in the next commit, it will need to call into ETR and get it to pre-allocate its buffer so add a function for it. No functional changes Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-12-james.clark@arm.com
| * coresight: Make refcount a property of the connectionJames Clark2023-06-0510-238/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes the need to do an additional lookup for the total number of ports used and also removes the need to allocate an array of refcounts which is just another representation of a connection array. This was only used for link type devices, for regular devices a single refcount on the coresight device is used. There is a both an input and output refcount in case two link type devices are connected together so that they don't overwrite each other's counts. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-11-james.clark@arm.com
| * coresight: Store in-connections as well as out-connectionsJames Clark2023-06-053-50/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow CATU to get its associated ETR in a generic way where currently the enable path has some hard coded searches which avoid the need to store input connections. This also means that the full search for connected devices on removal can be replaced with a loop through only the input and output devices. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-10-james.clark@arm.com
| * coresight: Simplify connection fixup mechanismJames Clark2023-06-051-52/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is some duplication between coresight_fixup_device_conns() and coresight_fixup_orphan_conns(). They both do the same thing except for the fact that coresight_fixup_orphan_conns() can't handle iterating over itself. By making it able to handle fixing up it's own connections the other function can be removed. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-9-james.clark@arm.com
| * coresight: Store pointers to connections rather than an array of themJames Clark2023-06-054-28/+41
| | | | | | | | | | | | | | | | | | | | This will allow the same connection object to be referenced via the input connection list in a later commit rather than duplicating them. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-8-james.clark@arm.com
| * coresight: Dynamically add connectionsJames Clark2023-06-052-77/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function for adding connections dynamically. This also removes the 1:1 mapping between port number and the index into the connections array. The only place this mapping was used was in the warning for duplicate output ports, which has been replaced by a search. Other uses of the port number already use the port member variable. Being able to dynamically add connections will allow other devices like CTI to re-use the connection mechanism despite not having explicit connections described in the DT. The connections array is now no longer sparse, so child_fwnode doesn't need to be checked as all connections have a target node. Because the array is no longer sparse, the high in and out port numbers are required for the refcount arrays. But these will also be removed in a later commit when the refcount is made a property of the connection. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-7-james.clark@arm.com
| * coresight: Rename connection members to make the direction explicitJames Clark2023-06-054-47/+46
| | | | | | | | | | | | | | | | | | | | | | When input connections are added they will use the same connection object as the output so parent and child could be misinterpreted. Making the direction unambiguous in the names should improve readability. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-6-james.clark@arm.com
| * coresight: Rename nr_outports to nr_outconnsJames Clark2023-06-053-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename to avoid confusion between port number and the index in the connection array. The port number is already stored in the connection, and in a later commit the connection array will be appended to, so the length of it will no longer reflect the number of ports. No functional changes. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-5-james.clark@arm.com
| * coresight: Change name of pdata->connsJames Clark2023-06-053-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | conns is actually for output connections. Change the name to make it clearer and so that we can add input connections later. No functional changes. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-4-james.clark@arm.com
| * coresight: Use enum type for cs_mode wherever possibleJames Clark2023-06-0513-31/+30
| | | | | | | | | | | | | | | | | | | | | | mode is stored as a local_t, but it is also passed around a lot as a plain u32, so use the correct type wherever local_t isn't currently used. This helps a little bit with readability. Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-3-james.clark@arm.com
| * coresight: Fix loss of connection info when a module is unloadedJames Clark2023-06-051-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | child_fwnode should be a read only property based on the DT or ACPI. If it's cleared on the parent device when a child is unloaded, then when the child is loaded again the connection won't be remade. child_dev should be cleared instead which signifies that the connection should be remade when the child_fwnode registers a new coresight_device. Similarly the reference count shouldn't be decremented as long as the parent device exists. The correct place to drop the reference is in coresight_release_platform_data() which is already done. Reproducible on Juno with the following steps: # load all coresight modules. $ cd /sys/bus/coresight/devices/ $ echo 1 > tmc_etr0/enable_sink $ echo 1 > etm0/enable_source # Works fine ^ $ echo 0 > etm0/enable_source $ rmmod coresight-funnel $ modprobe coresight-funnel $ echo 1 > etm0/enable_source -bash: echo: write error: Invalid argument Fixes: 37ea1ffddffa ("coresight: Use fwnode handle instead of device names") Fixes: 2af89ebacf29 ("coresight: Clear the connection field properly") Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425143542.2305069-2-james.clark@arm.com
* | Merge tag 'arm64-upstream' of ↵Linus Torvalds2023-06-262-39/+32
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: "Notable features are user-space support for the memcpy/memset instructions and the permission indirection extension. - Support for the Armv8.9 Permission Indirection Extensions. While this feature doesn't add new functionality, it enables future support for Guarded Control Stacks (GCS) and Permission Overlays - User-space support for the Armv8.8 memcpy/memset instructions - arm64 perf: support the HiSilicon SoC uncore PMU, Arm CMN sysfs identifier, support for the NXP i.MX9 SoC DDRC PMU, fixes and cleanups - Removal of superfluous ISBs on context switch (following retrospective architecture tightening) - Decode the ISS2 register during faults for additional information to help with debugging - KPTI clean-up/simplification of the trampoline exit code - Addressing several -Wmissing-prototype warnings - Kselftest improvements for signal handling and ptrace - Fix TPIDR2_EL0 restoring on sigreturn - Clean-up, robustness improvements of the module allocation code - More sysreg conversions to the automatic register/bitfields generation - CPU capabilities handling cleanup - Arm documentation updates: ACPI, ptdump" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (124 commits) kselftest/arm64: Add a test case for TPIDR2 restore arm64/signal: Restore TPIDR2 register rather than memory state arm64: alternatives: make clean_dcache_range_nopatch() noinstr-safe Documentation/arm64: Add ptdump documentation arm64: hibernate: remove WARN_ON in save_processor_state kselftest/arm64: Log signal code and address for unexpected signals docs: perf: Fix warning from 'make htmldocs' in hisi-pmu.rst arm64/fpsimd: Exit streaming mode when flushing tasks docs: perf: Add new description for HiSilicon UC PMU drivers/perf: hisi: Add support for HiSilicon UC PMU driver drivers/perf: hisi: Add support for HiSilicon H60PA and PAv3 PMU driver perf: arm_cspmu: Add missing MODULE_DEVICE_TABLE perf/arm-cmn: Add sysfs identifier perf/arm-cmn: Revamp model detection perf/arm_dmc620: Add cpumask arm64: mm: fix VA-range sanity check arm64/mm: remove now-superfluous ISBs from TTBR writes Documentation/arm64: Update ACPI tables from BBR Documentation/arm64: Update references in arm-acpi Documentation/arm64: Update ARM and arch reference ...
| * arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generationAnshuman Khandual2023-06-141-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts TRBLIMITR_EL1 register to automatic generation without causing any functional change. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-9-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64/sysreg: Rename TRBIDR_EL1 fields per auto-gen tools formatAnshuman Khandual2023-06-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames TRBIDR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-8-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64/sysreg: Rename TRBSR_EL1 fields per auto-gen tools formatAnshuman Khandual2023-06-142-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames TRBSR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-5-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64/sysreg: Rename TRBBASER_EL1 fields per auto-gen tools formatAnshuman Khandual2023-06-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames TRBBASER_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-4-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| * arm64/sysreg: Rename TRBLIMITR_EL1 fields per auto-gen tools formatAnshuman Khandual2023-06-142-13/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renames TRBLIMITR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon <will@kernel.org> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: James Morse <james.morse@arm.com> Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230614065949.146187-2-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | coresight: perf: Release Coresight path when alloc trace id failedRuidong Tian2023-05-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Error handler for etm_setup_aux can not release coresight path because cpu mask was cleared when coresight_trace_id_get_cpu_id failed. Call coresight_release_path function explicitly when alloc trace id filed. Fixes: 4ff1fdb4125c4 ("coresight: perf: traceid: Add perf ID allocation and notifiers") Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230425032416.125542-1-tianruidong@linux.alibaba.com
* | coresight: Fix signedness bug in tmc_etr_buf_insert_barrier_packet()Dan Carpenter2023-05-111-1/+1
|/ | | | | | | | | | | | | | | | | | This code generates a Smatch warning: drivers/hwtracing/coresight/coresight-tmc-etr.c:947 tmc_etr_buf_insert_barrier_packet() error: uninitialized symbol 'bufp'. The problem is that if tmc_sg_table_get_data() returns -EINVAL, then when we test if "len < CORESIGHT_BARRIER_PKT_SIZE", the negative "len" value is type promoted to a high unsigned long value which is greater than CORESIGHT_BARRIER_PKT_SIZE. Fix this bug by adding an explicit check for error codes. Fixes: 75f4e3619fe2 ("coresight: tmc-etr: Add transparent buffer management") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/7d33e244-d8b9-4c27-9653-883a13534b01@kili.mountain
* Merge tag 'coresight-next-v6.4' of ↵Greg Kroah-Hartman2023-04-191-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next Suzuki writes: coresight: Updates for v6.4 This is a relatively smaller update for CoreSight tracing subsystem targeting v6.4, with the following changes: - Removing Mathieu Poirier as MAINTAINER for the subsystem, with updates to CREDITS for his contributions. - Fix CoreSight ETM PMU to set the module field Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> * tag 'coresight-next-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: coresight: etm_pmu: Set the module field MAINTAINERS: Remove Mathieu Poirier as coresight maintainer
| * coresight: etm_pmu: Set the module fieldSuzuki K Poulose2023-04-141-0/+1
| | | | | | | | | | | | | | | | | | struct pmu::module must be set to the module owning the PMU driver. Set this for the coresight etm_pmu. Fixes: 8e264c52e1dab ("coresight: core: Allow the coresight core driver to be built as a module") Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230405094922.667834-1-suzuki.poulose@arm.com
* | coresight: etm4x: Do not access TRCIDR1 for identificationSuzuki K Poulose2023-03-212-27/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CoreSight ETM4x architecture clearly provides ways to identify a device via registers in the "Management" class, TRCDEVARCH and TRCDEVTYPE. These registers can be accessed without the Trace domain being powered on. We additionally added TRCIDR1 as fallback in order to cover for any ETMs that may not have implemented TRCDEVARCH. So far, nobody has reported hitting a WARNING we placed to catch such systems. Also, more importantly it is problematic to access TRCIDR1, which is a "Trace" register via MMIO access, without clearing the OSLK. But we cannot mess with the OSLK until we know for sure that this is an ETMv4 device. Thus, this kind of creates a chicken and egg problem unnecessarily for systems "which are compliant" to the ETMv4 architecture. Let us remove the TRCIDR1 fall back check and rely only on TRCDEVARCH. Fixes: 8b94db1edaee ("coresight: etm4x: Use TRCDEVARCH for component discovery") Cc: stable@vger.kernel.org Reported-by: Steve Clevenger <scclevenger@os.amperecomputing.com> Link: https://lore.kernel.org/all/143540e5623d4c7393d24833f2b80600d8d745d2.1677881753.git.scclevenger@os.amperecomputing.com/ Cc: Mike Leach <mike.leach@linaro.org> Cc: James Clark <james.clark@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230321104530.1547136-1-suzuki.poulose@arm.com
* | coresight-etm4: Fix for() loop drvdata->nr_addr_cmp range bugSteve Clevenger2023-03-211-1/+1
|/ | | | | | | | | | | In etm4_enable_hw, fix for() loop range to represent address comparator pairs. Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver") Cc: stable@vger.kernel.org Signed-off-by: Steve Clevenger <scclevenger@os.amperecomputing.com> Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/4a4ee61ce8ef402615a4528b21a051de3444fb7b.1677540079.git.scclevenger@os.amperecomputing.com
* Merge tag 'driver-core-6.3-rc1' of ↵Linus Torvalds2023-02-242-5/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg KH: "Here is the large set of driver core changes for 6.3-rc1. There's a lot of changes this development cycle, most of the work falls into two different categories: - fw_devlink fixes and updates. This has gone through numerous review cycles and lots of review and testing by lots of different devices. Hopefully all should be good now, and Saravana will be keeping a watch for any potential regression on odd embedded systems. - driver core changes to work to make struct bus_type able to be moved into read-only memory (i.e. const) The recent work with Rust has pointed out a number of areas in the driver core where we are passing around and working with structures that really do not have to be dynamic at all, and they should be able to be read-only making things safer overall. This is the contuation of that work (started last release with kobject changes) in moving struct bus_type to be constant. We didn't quite make it for this release, but the remaining patches will be finished up for the release after this one, but the groundwork has been laid for this effort. Other than that we have in here: - debugfs memory leak fixes in some subsystems - error path cleanups and fixes for some never-able-to-be-hit codepaths. - cacheinfo rework and fixes - Other tiny fixes, full details are in the shortlog All of these have been in linux-next for a while with no reported problems" [ Geert Uytterhoeven points out that that last sentence isn't true, and that there's a pending report that has a fix that is queued up - Linus ] * tag 'driver-core-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (124 commits) debugfs: drop inline constant formatting for ERR_PTR(-ERROR) OPP: fix error checking in opp_migrate_dentry() debugfs: update comment of debugfs_rename() i3c: fix device.h kernel-doc warnings dma-mapping: no need to pass a bus_type into get_arch_dma_ops() driver core: class: move EXPORT_SYMBOL_GPL() lines to the correct place Revert "driver core: add error handling for devtmpfs_create_node()" Revert "devtmpfs: add debug info to handle()" Revert "devtmpfs: remove return value of devtmpfs_delete_node()" driver core: cpu: don't hand-override the uevent bus_type callback. devtmpfs: remove return value of devtmpfs_delete_node() devtmpfs: add debug info to handle() driver core: add error handling for devtmpfs_create_node() driver core: bus: update my copyright notice driver core: bus: add bus_get_dev_root() function driver core: bus: constify bus_unregister() driver core: bus: constify some internal functions driver core: bus: constify bus_get_kset() driver core: bus: constify bus_register/unregister_notifier() driver core: remove private pointer from struct bus_type ...
| * driver core: make struct device_type.devnode() take a const *Greg Kroah-Hartman2023-01-272-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The devnode() callback in struct device_type should not be modifying the device that is passed into it, so mark it as a const * and propagate the function signature changes out into all relevant subsystems that use this callback. Cc: Jens Axboe <axboe@kernel.dk> Cc: Alison Schofield <alison.schofield@intel.com> Cc: Vishal Verma <vishal.l.verma@intel.com> Cc: Ira Weiny <ira.weiny@intel.com> Cc: Ben Widawsky <bwidawsk@kernel.org> Cc: Jeremy Kerr <jk@ozlabs.org> Cc: Joel Stanley <joel@jms.id.au> Cc: Alistar Popple <alistair@popple.id.au> Cc: Eddie James <eajames@linux.ibm.com> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Jilin Yuan <yuanjilin@cdjrlc.com> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Gunthorpe <jgg@ziepe.ca> Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: Won Chung <wonchung@google.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230111113018.459199-7-gregkh@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge tag 'char-misc-6.3-rc1' of ↵Linus Torvalds2023-02-2428-195/+2171
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver subsystem updates from Greg KH: "Here is the large set of driver changes for char/misc drivers and other smaller driver subsystems that flow through this git tree. Included in here are: - New IIO drivers and features and improvments in that subsystem - New hwtracing drivers and additions to that subsystem - lots of interconnect changes and new drivers as that subsystem seems under very active development recently. This required also merging in the icc subsystem changes through this tree. - FPGA driver updates - counter subsystem and driver updates - MHI driver updates - nvmem driver updates - documentation updates - Other smaller driver updates and fixes, full details in the shortlog All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits) scripts/tags.sh: fix incompatibility with PCRE2 firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries mei: lower the log level for non-fatal failed messages mei: bus: disallow driver match while dismantling device misc: vmw_balloon: fix memory leak with using debugfs_lookup() nvmem: stm32: fix OPTEE dependency dt-bindings: nvmem: qfprom: add IPQ8074 compatible nvmem: qcom-spmi-sdam: register at device init time nvmem: rave-sp-eeprm: fix kernel-doc bad line warning nvmem: stm32: detect bsec pta presence for STM32MP15x nvmem: stm32: add OP-TEE support for STM32MP13x nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of() nvmem: core: add nvmem_add_one_cell() nvmem: core: drop the removal of the cells in nvmem_add_cells() nvmem: core: move struct nvmem_cell_info to nvmem-provider.h nvmem: core: add an index parameter to the cell of: property: add #nvmem-cell-cells property of: property: make #.*-cells optional for simple props of: base: add of_parse_phandle_with_optional_args() net: add helper eth_addr_add() ...
| * | coresight: tmc: Don't enable TMC when it's not ready.Yabin Cui2023-01-304-14/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If TMC ETR is enabled without being ready, in later use we may see AXI bus errors caused by accessing invalid addresses. Signed-off-by: Yabin Cui <yabinc@google.com> [ Tweak error message ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230127231001.1920947-1-yabinc@google.com
| * | coresight: tpda: fix return value check in tpda_probe()Yang Yingliang2023-01-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_ioremap_resource() never returns NULL pointer, it will return ERR_PTR() when it fails, so replace the check with IS_ERR(). Fixes: 5b7916625c01 ("Coresight: Add TPDA link driver") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> [ Fix return value to the PTR_ERR(base) ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230129084246.537694-1-yangyingliang@huawei.com
| * | Coresight: tpda/tpdm: remove incorrect __exit annotationArnd Bergmann2023-01-262-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remove' callbacks get called whenever a device is unbound from the driver, which can get triggered from user space. Putting it into the __exit section means that the function gets dropped in for built-in drivers, as pointed out by this build warning: `tpda_remove' referenced in section `.data' of drivers/hwtracing/coresight/coresight-tpda.o: defined in discarded section `.exit.text' of drivers/hwtracing/coresight/coresight-tpda.o `tpdm_remove' referenced in section `.data' of drivers/hwtracing/coresight/coresight-tpdm.o: defined in discarded section `.exit.text' of drivers/hwtracing/coresight/coresight-tpdm.o Fixes: 5b7916625c01 ("Coresight: Add TPDA link driver") Fixes: b3c71626a933 ("Coresight: Add coresight TPDM source driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230126163530.3495413-1-arnd@kernel.org
| * | coresight: perf: Output trace id only onceSuzuki K Poulose2023-01-242-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the dynamic traceid allocation scheme in, we output the AUX_OUTPUT_HWID packet every time event->start() is called. This could cause too many such records in the perf.data, while only one per CPU throughout the life time of the event is required. Make sure we only output it once. Before this patch: $ perf report -D | grep OUTPUT_HW_ID ... AUX_OUTPUT_HW_ID events: 55 (18.3%) After this patch: $ perf report -D | grep OUTPUT_HW_ID ... AUX_OUTPUT_HW_ID events: 5 ( 1.9%) Cc: Mike Leach <mike.leach@linaro.org> Cc: James Clark <james.clark@arm.com> Cc: Leo Yan <leo.yan@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: James Clark <james.clark@arm.com> Link: https://lore.kernel.org/r/20230120103434.864318-1-suzuki.poulose@arm.com
| * | coresight: Fix uninitialised variable use in coresight_disableSuzuki K Poulose2023-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel test robot reports: drivers/hwtracing/coresight/coresight-core.c:1176:7: warning: variable 'hash' is used uninitialized whenever switch case is taken [-Wsometimes-uninitialized] case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/hwtracing/coresight/coresight-core.c:1195:24: note: uninitialized use occurs here idr_remove(&path_idr, hash); ^~~~ Fix this by moving the usage of the hash variable to where it actually should have been. Cc: Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lkml.kernel.org/r/202301211339.9mU0dccO-lkp@intel.com Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lkml.kernel.org/r/20230123164700.1074064-1-suzuki.poulose@arm.com
| * | Coresight: Add TPDA link driverMao Jinlong2023-01-204-0/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPDA(Trace, Profiling and Diagnostics Aggregator) is to provide packetization, funneling and timestamping of TPDM data. Multiple monitors are connected to different input ports of TPDA.This change is to add tpda enable/disable/probe functions for coresight tpda driver. - - - - - - - - - - - - | TPDM 0| | TPDM 1 | | TPDM 2| - - - - - - - - - - - - | | | |_ _ _ _ _ _ | _ _ _ _ | | | | | | | ------------------ | TPDA | ------------------ Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230120095301.30792-2-quic_jinlmao@quicinc.com
| * | coresight-tpdm: Add integration test supportMao Jinlong2023-01-202-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integration test for tpdm can help to generate the data for verification of the topology during TPDM software bring up. Sample: echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test cat /dev/tmc_etf0 > /data/etf-tpdm0.bin Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230117145708.16739-6-quic_jinlmao@quicinc.com
| * | coresight-tpdm: Add DSB dataset supportMao Jinlong2023-01-202-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPDM serves as data collection component for various dataset types. DSB(Discrete Single Bit) is one of the dataset types. DSB subunit can be enabled for data collection by writing 1 to the first bit of DSB_CR register. This change is to add enable/disable function for DSB dataset by writing DSB_CR register. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230117145708.16739-5-quic_jinlmao@quicinc.com
| * | Coresight: Add coresight TPDM source driverMao Jinlong2023-01-205-1/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver to support Coresight device TPDM (Trace, Profiling and Diagnostics Monitor). TPDM is a monitor to collect data from different datasets. This change is to add probe/enable/disable functions for tpdm source. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230120095301.30792-1-quic_jinlmao@quicinc.com
| * | coresight: core: Use IDR for non-cpu bound sources' paths.Mao Jinlong2023-01-191-11/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Except stm, there could be other sources which are not associated with cpus. Use IDR to store and search these sources' paths. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230117145708.16739-2-quic_jinlmao@quicinc.com
| * | coresight: trace-id: Add debug & test macros to Trace ID allocationMike Leach2023-01-191-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adds in a number of pr_debug macros to allow the debugging and test of the trace ID allocation system. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-15-mike.leach@linaro.org
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