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* Merge branch 'i2c/for-5.3' of ↵Linus Torvalds2019-07-1525-411/+1119
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "New stuff from the I2C world: - in the core, getting irqs from ACPI is now similar to OF - new driver for MediaTek MT7621/7628/7688 SoCs - bcm2835, i801, and tegra drivers got some more attention - GPIO API cleanups - cleanups in the core headers - lots of usual driver updates" * 'i2c/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (74 commits) i2c: mt7621: Fix platform_no_drv_owner.cocci warnings i2c: cpm: remove casting dma_alloc dt-bindings: i2c: sun6i-p2wi: Fix the binding example dt-bindings: i2c: mv64xxx: Fix the example compatible i2c: i801: Documentation update i2c: i801: Add support for Intel Tiger Lake i2c: i801: Fix PCI ID sorting dt-bindings: i2c-stm32: document optional dmas i2c: i2c-stm32f7: Add I2C_SMBUS_I2C_BLOCK_DATA support i2c: core: Tidy up handling of init_irq i2c: core: Move ACPI gpio IRQ handling into i2c_acpi_get_irq i2c: core: Move ACPI IRQ handling to probe time i2c: acpi: Factor out getting the IRQ from ACPI i2c: acpi: Use available IRQ helper functions i2c: core: Allow whole core to use i2c_dev_irq_from_resources eeprom: at24: modify a comment referring to platform data dt-bindings: i2c: omap: Add new compatible for J721E SoCs dt-bindings: i2c: mv64xxx: Add YAML schemas dt-bindings: i2c: sun6i-p2wi: Add YAML schemas i2c: mt7621: Add MediaTek MT7621/7628/7688 I2C driver ...
| * i2c: mt7621: Fix platform_no_drv_owner.cocci warningsYueHaibing2019-07-061-1/+0
| | | | | | | | | | | | | | | | | | Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: cpm: remove casting dma_allocVasyl Gomonovych2019-07-051-1/+3
| | | | | | | | | | | | | | | | Generated by: alloc_cast.cocci Signed-off-by: Vasyl Gomonovych <gomonovych@gmail.com> Acked-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i801: Add support for Intel Tiger LakeJarkko Nikula2019-07-052-0/+5
| | | | | | | | | | | | | | | | Add SMBUS PCI ID for Intel Tiger Lake -LP. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i801: Fix PCI ID sortingJarkko Nikula2019-07-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | I managed to break sorting in PCI ID defines in my last two patches: commit 5cd1c56c42be ("i2c: i801: Add support for Intel Comet Lake") commit 9be1485accd4 ("i2c: i801: Add support for Intel Elkhart Lake") Fix them up. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-stm32f7: Add I2C_SMBUS_I2C_BLOCK_DATA supportFabrice Gasnier2019-06-291-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support of I2C_SMBUS_I2C_BLOCK_DATA transaction type for the stm32f7 SMBUS Controller. Use emulated I2C_SMBUS_I2C_BLOCK_DATA transactions as there is no specific hardware in STM32 I2C to manage this (e.g. like no need for PEC here). Emulated transfer will fall back calling i2c transfer method where there's already support for DMAs for example. So, use the I2C_FUNC_SMBUS_I2C_BLOCK in stm32f7_i2c_func(), and rely on emulated transfer by returning -EOPNOTSUPP in the smbus_xfer() routine for such a case. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: core: Tidy up handling of init_irqCharles Keepax2019-06-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | Only set init_irq during i2c_device_new and only handle client->irq on the probe/remove paths. Suggested-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: core: Move ACPI gpio IRQ handling into i2c_acpi_get_irqCharles Keepax2019-06-292-3/+3
| | | | | | | | | | | | | | | | | | | | It makes sense to contain all the ACPI IRQ handling in a single helper function. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: core: Move ACPI IRQ handling to probe timeCharles Keepax2019-06-293-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | Bring the ACPI path in sync with the device tree path and handle all the IRQ fetching at probe time. This leaves the only IRQ handling at device registration time being that which is passed directly through the board info as either a resource or an actual IRQ number. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: acpi: Factor out getting the IRQ from ACPICharles Keepax2019-06-291-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | In preparation for future refactoring factor out the fetch of the IRQ into its own helper function. Whilst we are at it update the handling to return the actual error code returned from acpi_dev_get_resources as well. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: acpi: Use available IRQ helper functionsCharles Keepax2019-06-291-9/+13
| | | | | | | | | | | | | | | | | | | | | | Use the available IRQ helper functions, most of the functions have additional helpful side affects like configuring the trigger type of the IRQ. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: core: Allow whole core to use i2c_dev_irq_from_resourcesCharles Keepax2019-06-292-2/+4
| | | | | | | | | | | | | | | | | | | | Remove the static from i2c_dev_irq_from _resources so that other parts of the core code can use this helper function. Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * Merge branch 'i2c-mux/for-next' of https://github.com/peda-r/i2c-mux into ↵Wolfram Sang2019-06-295-150/+91
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i2c/for-5.3 I realize that there are changes in drivers/i2c/busses/i2c-i801.c that strictly speaking don't belong here, but I hope you don't mind. These changes are all about the interaction with the i2c-mux-gpio code, and I did a test-merge a few days ago w/o conflicts. Anyway, the GPIO-work from Linus Walleij (with help from Serge Semin) in the i2c-mux-gpio and i2c-arb-gpio-challenge drivers is the main feature.
| | * i2c: mux: add sysfs headerWolfram Sang2019-06-221-0/+1
| | | | | | | | | | | | | | | | | | | | | We are using sysfs functions directly, so we should include the header. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * i2c: mux/i801: Switch to use descriptor passingLinus Walleij2019-06-222-93/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This switches the i801 GPIO mux to use GPIO descriptors for handling the GPIO lines. The previous hack which was reaching inside the GPIO chips etc cannot live on. We pass descriptors along with the GPIO mux device at creation instead. The GPIO mux was only used by way of platform data with a platform device from one place in the kernel: the i801 i2c bus driver. Let's just associate the GPIO descriptor table with the actual device like everyone else and dynamically create a descriptor table passed along with the GPIO i2c mux. This enables simplification of the GPIO i2c mux driver to use only the descriptor API and the OF probe path gets simplified in the process. The i801 driver was registering the GPIO i2c mux with PLATFORM_DEVID_AUTO which would make it hard to predict the device name and assign the descriptor table properly, but this seems to be a mistake to begin with: all of the GPIO mux devices are hardcoded to look up GPIO lines from the "gpio_ich" GPIO chip. If there are more than one mux, there is certainly more than one gpio chip as well, and then we have more serious problems. Switch to PLATFORM_DEVID_NONE instead. There can be only one. Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Peter Rosin <peda@axentia.se> Cc: Jean Delvare <jdelvare@suse.com> Signed-off-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> [Removed a newline, suggested by Andy. /Peter] Signed-off-by: Peter Rosin <peda@axentia.se>
| | * i2c: mux: pinctrl: use flexible-array member and struct_size() helperGustavo A. R. Silva2019-06-101-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code to use a flexible array member instead of a pointer in structure i2c_mux_pinctrl and use the struct_size() helper. Also, make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes, in particular in the context in which this code is being used. So, replace the following form: sizeof(*mux) + num_names * sizeof(*mux->states) with: struct_size(mux, states, num_names) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * i2c: mux: arb-gpio: Rewrite to use GPIO descriptorsLinus Walleij2019-06-101-52/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of complex code picking GPIOs out of the device tree and keeping track of polarity for each GPIO line, use descriptors and pull polarity handling into the gpiolib. We look for "our-claim" and "their-claim" since the gpiolib code will try e.g. "our-claim-gpios" and "our-claim-gpio" in turn to locate these GPIO lines from the device tree. Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Doug Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * i2c: mux: Use struct_size() in devm_kzalloc()Gustavo A. R. Silva2019-06-101-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; struct boo entry[]; }; instance = devm_kzalloc(dev, sizeof(struct foo) + count * sizeof(struct boo), GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = devm_kzalloc(dev, struct_size(instance, entry, count), GFP_KERNEL); This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Peter Rosin <peda@axentia.se>
| * | i2c: mt7621: Add MediaTek MT7621/7628/7688 I2C driverStefan Roese2019-06-263-0/+365
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the I2C controller found on the MediaTek MT7621/7628/7688 SoC's. The base version of this driver was done by Steven Liu (according to the copyright and MODULE_AUTHOR lines). It can be found in the OpenWRT repositories (v4.14 at the time I looked). The base driver had many issues, which are disccussed here: https://en.forum.labs.mediatek.com/t/openwrt-15-05-loads-non-working-i2c-kernel-module-for-mt7688/1286/3 >From this link an enhanced driver version (complete rewrite, mayor changes: support clock stretching, repeated start, ACK handling and unlimited message length) from Jan Breuer can be found here: https://gist.github.com/j123b567/9b555b635c2b4069d716b24198546954 This patch now adds this enhanced I2C driver to mainline. Changes by Stefan Roese for upstreaming: - Add devicetree bindings - checkpatch clean - Use module_platform_driver() - Minor cosmetic enhancements - Removed IO warpped functions - Use readl_relaxed_poll_timeout() and drop poll_down_timeout() - Removed superfluous barrier() in mtk_i2c_reset() - Use i2c_8bit_addr_from_msg() - Added I2C_FUNC_PROTOCOL_MANGLING - Removed adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: René van Dorst <opensource@vdorst.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: core: add sysfs headerWolfram Sang2019-06-261-0/+1
| | | | | | | | | | | | | | | | | | | | | We are using sysfs functions directly, so we should include the header. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: bcm2835: Ensure clock exists when probingAnnaliese McDermond2019-06-261-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Probe function fails to recognize that upstream clock actually doesn't yet exist because clock driver has not been initialized. Actually try to go get the clock and test for its existence before trying to set up a downstream clock based upon it. This fixes a bug that causes the i2c driver not to work with monolithic kernels. Fixes: bebff81fb8b9 ("i2c: bcm2835: Model Divider in CCF") Signed-off-by: Annaliese McDermond <nh6z@nh6z.net> Acked-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: bcm2835: Move IRQ request after clock code in probeAnnaliese McDermond2019-06-261-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If any of the clock code in the probe fails and returns, the IRQ will not be freed. Moving the IRQ request to last allows it to be freed on any errors further up in the probe function. devm_ calls can apparently not be used because there are some potential race conditions that will arise. Fixes: bebff81fb8b9 ("i2c: bcm2835: Model Divider in CCF") Signed-off-by: Annaliese McDermond <nh6z@nh6z.net> Acked-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: add newly exported functions to the header, tooWolfram Sang2019-06-261-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nobody (including me) noticed that these functions were exported but not added to the header :/ Fixes: 7159dbdae3c5 ("i2c: core: improve return value handling of i2c_new_device and i2c_new_dummy") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: remove BUG() macroBitan Biswas2019-06-211-8/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usage of BUG() macro is generally discouraged in kernel, unless it's a problem that results in a physical damage or loss of data. This patch removes unnecessary BUG() macros and replaces the rest with warning. Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: i801: Add support for Intel Elkhart LakeJarkko Nikula2019-06-212-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add PCI ID for Intel Elkhart Lake PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: i801: Add Block Write-Block Read Process Call supportAlexander Sverdlin2019-06-211-6/+37
| | | | | | | | | | | | | | | | | | | | | | | | Add SMBUS 2.0 Block Write-Block Read Process Call command support. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: stm32f7: fix the get_irq error casesFabrice Gasnier2019-06-211-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During probe, return the "get_irq" error value instead of -EINVAL which allows the driver to be deferred probed if needed. Fix also the case where of_irq_get() returns a negative value. Note : On failure of_irq_get() returns 0 or a negative value while platform_get_irq() returns a negative value. Fixes: aeb068c57214 ("i2c: i2c-stm32f7: add driver") Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: i801: Use match_string() helper to simplify the codeAndy Shevchenko2019-06-211-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | match_string() returns the array index of a matching string. Use it instead of the open-coded implementation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Pali Rohár <pali.rohar@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qcom-geni: Provide support for ACPILee Jones2019-06-141-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a match table to allow automatic probing of ACPI device QCOM0220. Ignore clock attainment errors. Set default clock frequency value. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qcom-geni: Signify successful driver probeLee Jones2019-06-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm Geni I2C driver currently probes silently which can be confusing when debugging potential issues. Add a low level (INFO) print when each I2C controller is successfully initially set-up. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Add suspend-resume supportBitan Biswas2019-06-141-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Post suspend I2C registers have power on reset values. Before any transfer initialize I2C registers to prevent I2C transfer timeout and implement suspend and resume callbacks needed. Fix below errors post suspend: 1) Tegra I2C transfer timeout during jetson tx2 resume: [ 27.520613] pca953x 1-0074: calling pca953x_resume+0x0/0x1b0 @ 2939, parent: i2c-1 [ 27.633623] tegra-i2c 3160000.i2c: i2c transfer timed out [ 27.639162] pca953x 1-0074: Unable to sync registers 0x3-0x5. -110 [ 27.645336] pca953x 1-0074: Failed to sync GPIO dir registers: -110 [ 27.651596] PM: dpm_run_callback(): pca953x_resume+0x0/0x1b0 returns -110 [ 27.658375] pca953x 1-0074: pca953x_resume+0x0/0x1b0 returned -110 after 127152 usecs [ 27.666194] PM: Device 1-0074 failed to resume: error -110 2) Tegra I2C transfer timeout error on jetson Xavier post resume. Remove i2c bus lock-unlock calls in resume callback as i2c_mark_adapter_* (suspended-resumed) help ensure i2c core calls from client are not executed before i2c-tegra resume. Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: core: always have a named variable in argumentsWolfram Sang2019-06-141-2/+2
| | | | | | | | | | | | | | | | | | Much better to read and understand. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: ocores: add polling mode workaround for Sifive FU540-C000 SoCSagar Shrikant Kadam2019-06-141-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c-ocore driver already has a polling mode interface.But it needs a workaround for FU540 Chipset on HiFive unleashed board (RevA00). There is an erratum in FU540 chip that prevents interrupt driven i2c transfers from working, and also the I2C controller's interrupt bit cannot be cleared if set, due to this the existing i2c polling mode interface added in mainline earlier doesn't work, and CPU stall's infinitely, when-ever i2c transfer is initiated. Ref: commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling") The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for FU540-COOO SoC. The polling function identifies a SiFive device based on the device node and enables the workaround. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: ocores: add support for i2c device on Sifive FU540-c000 SoCSagar Shrikant Kadam2019-06-141-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update device id table for Opencore's I2C master based re-implementation used in FU540-c000 chipset on HiFive Unleashed platform. Device ID's include Sifive, soc-specific device for chip specific tweaks and sifive IP block specific device for generic programming model. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Avoid error message on deferred probeThierry Reding2019-06-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the driver defers probe because of a missing clock, avoid outputting an error message. The clock will show up eventually. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: i801: Fix kernel crash in is_dell_system_with_lis3lv02d()Andy Shevchenko2019-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 19b07cb4a187 ("i2c: i801: Register optional lis3lv02d I2C device on Dell machines") introduced a new check in order to enumerate some slave devices on Dell machines. Though, it brings a regression on machines where DMI vendor is not set. BUG: kernel NULL pointer dereference, address: 0000000000000000 #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page PGD 0 P4D 0 Oops: 0000 [#1] SMP PTI CPU: 8 PID: 1 Comm: swapper/0 Not tainted 5.2.0-rc4-next-20190613+ #317 RIP: 0010:strcmp+0xc/0x20 To fix this crash, check if vendor field is present before accessing to it. Fixes: 19b07cb4a187 ("i2c: i801: Register optional lis3lv02d I2C device on Dell machines") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: iop: Use GPIO descriptorsLinus Walleij2019-06-122-11/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IOP3xx has some elaborate code to directly slam the GPIO lines multiplexed with I2C down low before enablement, apparently a workaround for a hardware bug found in the early chips. After consulting the developer documentation for IOP80321 and IOP80331 I can clearly see that this may be useful for IOP80321 family (mach-iop32x) but it is highly dubious for any 80331 series or later chip: in these chips the lines are not multiplexed for UARTs. We convert the code to pass optional GPIO descriptors and register these only on the 80321-based boards where it makes sense, optionally obtain them in the driver and use the gpiod_set_raw_value() to ascertain the line gets driven low when needed. The GPIO driver does not give the GPIO chip a reasonable label so the patch also adds that so that these machine descriptor tables can be used. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: s3c2410: Convert to use GPIO descriptorsLinus Walleij2019-06-121-38/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The S3C2410 does some funny dance around its pins: - First try to call back to the platform to get and control some GPIO pins - If this doesn't work, it tries to get a pin control handle - If this doesn't work, it retrieves two GPIOs from the device tree node and does nothing with them If we're gonna retrieve two GPIOs and do nothing with them, we might as well do it using the GPIO descriptor API. When we use the resource management API, the code gets smaller. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: bcm2835: Model Divider in CCFAnnaliese McDermond2019-06-121-31/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Model the I2C bus clock divider as a part of the Core Clock Framework. Primarily this removes the clk_get_rate() call from each transfer. This call causes problems for slave drivers that themselves have internal clock components that are controlled by an I2C interface. When the slave's internal clock component is prepared, the prepare lock is obtained, and it makes calls to the I2C subsystem to command the hardware to activate the clock. In order to perform the I2C transfer, this driver sets the divider, which requires it to get the parent clock rate, which it does with clk_get_rate(). Unfortunately, this function will try to take the clock prepare lock, which is already held by the slave's internal clock calls creating a deadlock. Modeling the divider in the CCF natively removes this dependency and the divider value is only set upon changing the bus clock frequency or changes in the parent clock that cascade down to this divisor. This obviates the need to set the divider with every transfer and avoids the deadlock described above. It also should provide better clock debugging and save a few cycles on each transfer due to not having to recalcuate the divider value. Signed-off-by: Annaliese McDermond <nh6z@nh6z.net> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: fix msleep warningBitan Biswas2019-06-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix checkpatch.pl WARNING for delay of approximately 1msec in flush i2c FIFO polling loop by using usleep_range(1000, 2000): WARNING: msleep < 20ms can sleep for up to 20ms; see ... Documentation/timers/timers-howto.txt + msleep(1); Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: add spinlock definition commentBitan Biswas2019-06-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix checkpatch.pl CHECK as follows: CHECK: spinlock_t definition without comment + spinlock_t xfer_lock; Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: fix alignment and spacing violationsBitan Biswas2019-06-121-16/+19
| | | | | | | | | | | | | | | | | | | | | | | | Fix checkpatch.pl alignment and blank line check(s) in i2c-tegra.c Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: remove unnecessary variable initBitan Biswas2019-06-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove variable initializations in functions that are followed by assignments before use Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: clean up macrosBitan Biswas2019-06-121-14/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up macros by: 1) removing unused macros 2) replace constants by macro BIT() Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: fsi: Create busses for all portsOliver O'Halloran2019-06-081-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we only create an I2C bus for the ports listed in the device-tree for that master. There's no real reason for this since we can discover the number of ports the master supports by looking at the port_max field of the status register. This patch re-works the bus add logic so that we always create buses for each port, unless the bus is marked as unavailable in the DT. This is useful since it ensures that all the buses provided by the CFAM I2C master are accessible to debug tools. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: i801: Register optional lis3lv02d I2C device on Dell machinesPali Rohár2019-06-081-0/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dell platform team told us that some (DMI whitelisted) Dell Latitude machines have ST microelectronics accelerometer at I2C address 0x29. Presence of that ST microelectronics accelerometer is verified by existence of SMO88xx ACPI device which represent that accelerometer. Unfortunately ACPI device does not specify I2C address. This patch registers lis3lv02d device for selected Dell Latitude machines at I2C address 0x29 after detection. And for Dell Vostro V131 machine at I2C address 0x1d which was manually detected. Finally commit a7ae81952cda ("i2c: i801: Allow ACPI SystemIO OpRegion to conflict with PCI BAR") allowed to use i2c-i801 driver on Dell machines so lis3lv02d correctly initialize accelerometer. Tested on Dell Latitude E6440. Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: nvidia-gpu: resume ccgx i2c clientAjay Gupta2019-06-081-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cypress USB Type-C CCGx controller firmware version 3.1.10 (which is being used in many NVIDIA GPU cards) has known issue of not triggering interrupt when a USB device is hot plugged to runtime resume the controller. If any GPU card gets latest kernel with runtime pm support but does not get latest fixed firmware then also it should continue to work and therefore a workaround is required to check for any connector change event The workaround is to request runtime resume of i2c client which is UCSI Cypress CCGx driver. CCG driver will call the ISR for any connector change event only if NVIDIA GPU has old CCG firmware with the known issue. Signed-off-by: Ajay Gupta <ajayg@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: nvidia-gpu: add runtime pm supportAjay Gupta2019-06-081-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable runtime pm support with autosuspend delay of three second. This is to make sure I2C client device Cypress CCGx has completed all transaction. Signed-off-by: Ajay Gupta <ajayg@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: nvidia-gpu: refactor master_xferAjay Gupta2019-06-081-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added a local variable "send_stop" to simplify "goto" statements. The "send_stop" handles below two case 1) When first i2c start fails and so i2c stop is not sent before exiting 2) When i2c stop failed after all transfers and we do not need to send another stop before exiting. Signed-off-by: Ajay Gupta <ajayg@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: acpi: export i2c_acpi_find_adapter_by_handleRuslan Babayev2019-06-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows drivers to lookup i2c adapters on ACPI based systems similar to of_get_i2c_adapter_by_node() with DT based systems. Signed-off-by: Ruslan Babayev <ruslan@babayev.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 09:40:44 +0000