| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
commit f54e9f2be312a4e71b54aea865b2e33ccb95ef0c upstream.
Depending on conversion mode used, the ADC clock (ADCK) needs
to be below a maximum frequency. According to Vybrid's data
sheet this is 20MHz for the low power conversion mode.
The ADC clock is depending on input clock, which is the bus
clock by default. Vybrid SoC are typically clocked at at 400MHz
or 500MHz, which leads to 66MHz or 83MHz bus clock respectively.
Hence, a divider of 8 is required to stay below the specified
maximum clock of 20MHz.
Due to the different bus clock speeds, the resulting sampling
frequency is not static. Hence use the ADC clock and calculate
the actual available sampling frequency dynamically.
This fixes bogous values observed on some 500MHz clocked Vybrid
SoC. The resulting value usually showed Bit 9 being stuck at 1,
or 0, which lead to a value of +/-512.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
There is no need to pass a 'fake' return value when platform_get_irq() fails.
Propagate the real error instead.
While at it, only consider negative numbers returned by platform_get_irq()
as error.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
| |
|
|
|
|
|
|
|
| |
No need to call the SIMPLE_DEV_PM_OPS() macro in several lines.
It can fit into the 80-column range.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
| |
|
|
|
|
|
|
| |
If clk_prepare_enable() fails we should disable the regulator that was
previously enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
| |
|
|
|
|
|
|
|
| |
There is no need to pass the error clock code to the variable 'ret'.
Just return the error directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
| |
|
|
|
|
|
|
|
|
|
| |
Vybrid ADC peripheral includes a temperature sensor
which is connected to channel number 26. This patch
adds support for the sensor. The raw value is read
and the temperature calculated in milli degree Celsius,
which is returned using IIO_CHAN_INFO_PROCESSED option.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
| |
|
|
|
|
|
|
|
| |
This patch removes the .owner field for drivers which use the
platform_driver_register api because this is overriden in
_platform_driver_register.
Signed-off-by: Sanjeev Sharma <Sanjeev_Sharma@mentor.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Issue highlighted by smatch warning:
CHECK drivers/iio/adc/vf610_adc.c
drivers/iio/adc/vf610_adc.c:466 vf610_read_raw() warn: unsigned 'ret' is never less than zero.
As wait_for_completion_interruptible_timeout can return -ERESTARTSTSYS, if
interrupted, ret must be signed.
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Fugang Duan <B38611@freescale.com>
|
|
|
Add Freescale Vybrid vf610 adc driver. The driver only support
ADC software trigger.
VF610 ADC device documentation is available at below reference manual
(chapter 37):
http://cache.freescale.com/files/32bit/doc/ref_manual/VYBRIDRM.pdf?
fpsp=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT
=pdf&WT_ASSET=Documentation
CC: Shawn Guo <shawn.guo@linaro.org>
CC: Jonathan Cameron <jic23@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: Peter Meerwald <pmeerw@pmeerw.net>
CC: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
|
