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* Merge tag 'irq-urgent-2020-08-30' of ↵Linus Torvalds2020-08-309-93/+190
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A set of fixes for interrupt chip drivers: - Revert the platform driver conversion of interrupt chip drivers as it turned out to create more problems than it solves. - Fix a trivial typo in the new module helpers which made probing reliably fail. - Small fixes in the STM32 and MIPS Ingenic drivers - The TI firmware rework which had badly managed dependencies and had to wait post rc1" * tag 'irq-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/ingenic: Leave parent IRQ unmasked on suspend irqchip/stm32-exti: Avoid losing interrupts due to clearing pending bits by mistake irqchip: Revert modular support for drivers using IRQCHIP_PLATFORM_DRIVER helperse irqchip: Fix probing deferal when using IRQCHIP_PLATFORM_DRIVER helpers arm64: dts: k3-am65: Update the RM resource types arm64: dts: k3-am65: ti-sci-inta/intr: Update to latest bindings arm64: dts: k3-j721e: ti-sci-inta/intr: Update to latest bindings irqchip/ti-sci-inta: Add support for INTA directly connecting to GIC irqchip/ti-sci-inta: Do not store TISCI device id in platform device id field dt-bindings: irqchip: Convert ti, sci-inta bindings to yaml dt-bindings: irqchip: ti, sci-inta: Update docs to support different parent. irqchip/ti-sci-intr: Add support for INTR being a parent to INTR dt-bindings: irqchip: Convert ti, sci-intr bindings to yaml dt-bindings: irqchip: ti, sci-intr: Update bindings to drop the usage of gic as parent firmware: ti_sci: Add support for getting resource with subtype firmware: ti_sci: Drop unused structure ti_sci_rm_type_map firmware: ti_sci: Drop the device id to resource type translation
| * irqchip/ingenic: Leave parent IRQ unmasked on suspendPaul Cercueil2020-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | All the wakeup sources we possibly want will go through the interrupt controller, so the parent IRQ must not be masked during suspend, or there won't be any way to wake up the system. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200819180602.136969-1-paul@crapouillou.net
| * irqchip/stm32-exti: Avoid losing interrupts due to clearing pending bits by ↵qiuguorui12020-08-251-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mistake In the current code, when the eoi callback of the exti clears the pending bit of the current interrupt, it will first read the values of fpr and rpr, then logically OR the corresponding bit of the interrupt number, and finally write back to fpr and rpr. We found through experiments that if two exti interrupts, we call them int1/int2, arrive almost at the same time. in our scenario, the time difference is 30 microseconds, assuming int1 is triggered first. there will be an extreme scenario: both int's pending bit are set to 1, the irq handle of int1 is executed first, and eoi handle is then executed, at this moment, all pending bits are cleared, but the int 2 has not finally been reported to the cpu yet, which eventually lost int2. According to stm32's TRM description about rpr and fpr: Writing a 1 to this bit will trigger a rising edge event on event x, Writing 0 has no effect. Therefore, when clearing the pending bit, we only need to clear the pending bit of the irq. Fixes: 927abfc4461e7 ("irqchip/stm32: Add stm32mp1 support with hierarchy domain") Signed-off-by: qiuguorui1 <qiuguorui1@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org # v4.18+ Link: https://lore.kernel.org/r/20200820031629.15582-1-qiuguorui1@huawei.com
| * irqchip: Revert modular support for drivers using IRQCHIP_PLATFORM_DRIVER ↵Marc Zyngier2020-08-254-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | helperse It has become obvious that switching a number of irqchip drivers to being platform drivers without considering the platform was a mistake. We have multiple reports of end-point drivers not probing because the irqchip driver isn't there yet, breaking the expectations of the users. This patch reverts: 920ecb8c35cb ("irqchip/mtk-cirq: Convert to a platform driver") f97dbf48ca43 ("irqchip/mtk-sysirq: Convert to a platform driver") 5be57099d445 ("irqchip/qcom-pdc: Switch to using IRQCHIP_PLATFORM_DRIVER helper macros") 95bf9305d2e3 ("irqchip/qcom-pdc: Allow QCOM_PDC to be loadable as a permanent module") and leave QCOM PDC, MTK sysrq and cirq drivers as built-in, special purpose drivers for the time being until we have worked out a better solution. Reported-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reported-by: Frank Wunderlich <linux@fw-web.de> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/93debe6a0308b66d3f307af67ba7ec2c@kernel.org
| * irqchip: Fix probing deferal when using IRQCHIP_PLATFORM_DRIVER helpersMarc Zyngier2020-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When probing an interrupt controller that is behind a parent, we try to check whether the parent domain is available as an indication that we can actually try to probe. Unfortunately, we are checking this with the firmware node of the about to be probed device, not the parent. This is obviously bound to fail. Instead, use the parent node. Fixes: f8410e626569 ("irqchip: Add IRQCHIP_PLATFORM_DRIVER_BEGIN/END and IRQCHIP_MATCH helper macros") Reported-by: John Stultz <john.stultz@linaro.org> Tested-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
| * irqchip/ti-sci-inta: Add support for INTA directly connecting to GICLokesh Vutla2020-08-161-13/+74
| | | | | | | | | | | | | | | | | | | | | | Driver assumes that Interrupt parent to Interrupt Aggregator is always Interrupt router. This is not true always and GIC can be a parent to Interrupt Aggregator. Update the driver to detect the parent and request the parent irqs accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200806074826.24607-11-lokeshvutla@ti.com
| * irqchip/ti-sci-inta: Do not store TISCI device id in platform device id fieldLokesh Vutla2020-08-161-7/+9
| | | | | | | | | | | | | | | | | | | | Even though DT doesn't make active use of id field in platform_device, we cannot hijack it to store TISCI device id. So create a field in struct ti_sci_inta for storing TISCI id and drop usage of id field in platform_device. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200806074826.24607-10-lokeshvutla@ti.com
| * irqchip/ti-sci-intr: Add support for INTR being a parent to INTRLokesh Vutla2020-08-161-59/+93
| | | | | | | | | | | | | | | | | | | | | | Driver assumes that Interrupt parent to Interrupt router is always GIC. This is not true always and an Interrupt Router can be a parent to Interrupt Router. Update the driver to detect the parent and request the parent irqs accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200806074826.24607-7-lokeshvutla@ti.com
* | treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-235-9/+9
|/ | | | | | | | | | Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
* Merge tag 'irq-core-2020-08-04' of ↵Linus Torvalds2020-08-0423-181/+291
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "The usual boring updates from the interrupt subsystem: - Infrastructure to allow building irqchip drivers as modules - Consolidation of irqchip ACPI probing - Removal of the EOI-preflow interrupt handler which was required for SPARC support and became obsolete after SPARC was converted to use sparse interrupts. - Cleanups, fixes and improvements all over the place" * tag 'irq-core-2020-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (51 commits) irqchip/loongson-pch-pic: Fix the misused irq flow handler irqchip/loongson-htvec: Support 8 groups of HT vectors irqchip/loongson-liointc: Fix misuse of gc->mask_cache dt-bindings: interrupt-controller: Update Loongson HTVEC description irqchip/imx-intmux: Fix irqdata regs save in imx_intmux_runtime_suspend() irqchip/imx-intmux: Implement intmux runtime power management irqchip/gic-v4.1: Use GFP_ATOMIC flag in allocate_vpe_l1_table() irqchip: Fix IRQCHIP_PLATFORM_DRIVER_* compilation by including module.h irqchip/stm32-exti: Map direct event to irq parent irqchip/mtk-cirq: Convert to a platform driver irqchip/mtk-sysirq: Convert to a platform driver irqchip/qcom-pdc: Switch to using IRQCHIP_PLATFORM_DRIVER helper macros irqchip: Add IRQCHIP_PLATFORM_DRIVER_BEGIN/END and IRQCHIP_MATCH helper macros irqchip: irq-bcm2836.h: drop a duplicated word irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_map irqchip/gic-v3: Remove unused register definition irqchip/qcom-pdc: Allow QCOM_PDC to be loadable as a permanent module genirq: Export irq_chip_retrigger_hierarchy and irq_chip_set_vcpu_affinity_parent irqdomain: Export irq_domain_update_bus_token ...
| * irqchip/loongson-pch-pic: Fix the misused irq flow handlerHuacai Chen2020-07-301-11/+4
| | | | | | | | | | | | | | | | | | | | | | Loongson PCH PIC is a standard level triggered PIC, and it need to clear interrupt during unmask. Fixes: ef8c01eb64ca6719da449dab0 ("irqchip: Add Loongson PCH PIC controller") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://lore.kernel.org/r/1596099090-23516-6-git-send-email-chenhc@lemote.com
| * irqchip/loongson-htvec: Support 8 groups of HT vectorsHuacai Chen2020-07-301-12/+10
| | | | | | | | | | | | | | | | | | | | | | | | The original version can only used by old Loongson-3 which only use 4 groups of HT vectors. Now Loongson-3A R4 can use 8 groups, so improve the driver to support all 8 groups. Fixes: 818e915fbac518e8c78e1877a ("irqchip: Add Loongson HyperTransport Vector support") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://lore.kernel.org/r/1596099090-23516-5-git-send-email-chenhc@lemote.com
| * irqchip/loongson-liointc: Fix misuse of gc->mask_cacheHuacai Chen2020-07-301-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | In gc->mask_cache bits, 1 means enabled and 0 means disabled, but in the loongson-liointc driver mask_cache is misused by reverting its meaning. This patch fix the bug and update the comments as well. Fixes: dbb152267908c4b2c3639492a ("irqchip: Add driver for Loongson I/O Local Interrupt Controller") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1596099090-23516-4-git-send-email-chenhc@lemote.com
| * irqchip/imx-intmux: Fix irqdata regs save in imx_intmux_runtime_suspend()Wei Yongjun2020-07-301-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gcc report warning as follows: drivers/irqchip/irq-imx-intmux.c:316:29: warning: variable 'irqchip_data' set but not used [-Wunused-but-set-variable] 316 | struct intmux_irqchip_data irqchip_data; | ^~~~~~~~~~~~ irqdata regs is stored to this variable on the stack in imx_intmux_runtime_suspend(), which means a nop. this commit fix to save regs to the right place. Fixes: bb403111e017 ("irqchip/imx-intmux: Implement intmux runtime power management") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200729155849.33919-1-weiyongjun1@huawei.com
| * irqchip/imx-intmux: Implement intmux runtime power managementJoakim Zhang2020-07-271-2/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the system is suspended, we can explicitly disable clock to save power. To achieve this, we need save registers' state since it could be lost after power off. Implement power management which will: - Turn the clock off after probing - Disable clock and save registers' state on system suspend, as well as enable clock and restore registers' state on resume - Rely on the Power Domain framework to shutdown the intmux power domain Without CONFIG_PM, the clock is always on after probe stage. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> [maz: revamped commit message] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200727141734.24890-2-qiangqing.zhang@nxp.com
| * irqchip/gic-v4.1: Use GFP_ATOMIC flag in allocate_vpe_l1_table()Zenghui Yu2020-07-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting the latest kernel with DEBUG_ATOMIC_SLEEP=y on a GICv4.1 enabled box, I get the following kernel splat: [ 0.053766] BUG: sleeping function called from invalid context at mm/slab.h:567 [ 0.053767] in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/1 [ 0.053769] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.8.0-rc3+ #23 [ 0.053770] Call trace: [ 0.053774] dump_backtrace+0x0/0x218 [ 0.053775] show_stack+0x2c/0x38 [ 0.053777] dump_stack+0xc4/0x10c [ 0.053779] ___might_sleep+0xfc/0x140 [ 0.053780] __might_sleep+0x58/0x90 [ 0.053782] slab_pre_alloc_hook+0x7c/0x90 [ 0.053783] kmem_cache_alloc_trace+0x60/0x2f0 [ 0.053785] its_cpu_init+0x6f4/0xe40 [ 0.053786] gic_starting_cpu+0x24/0x38 [ 0.053788] cpuhp_invoke_callback+0xa0/0x710 [ 0.053789] notify_cpu_starting+0xcc/0xd8 [ 0.053790] secondary_start_kernel+0x148/0x200 # ./scripts/faddr2line vmlinux its_cpu_init+0x6f4/0xe40 its_cpu_init+0x6f4/0xe40: allocate_vpe_l1_table at drivers/irqchip/irq-gic-v3-its.c:2818 (inlined by) its_cpu_init_lpis at drivers/irqchip/irq-gic-v3-its.c:3138 (inlined by) its_cpu_init at drivers/irqchip/irq-gic-v3-its.c:5166 It turned out that we're allocating memory using GFP_KERNEL (may sleep) within the CPU hotplug notifier, which is indeed an atomic context. Bad thing may happen if we're playing on a system with more than a single CommonLPIAff group. Avoid it by turning this into an atomic allocation. Fixes: 5e5168461c22 ("irqchip/gic-v4.1: VPE table (aka GICR_VPROPBASER) allocation") Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200630133746.816-1-yuzenghui@huawei.com
| * irqchip/stm32-exti: Map direct event to irq parentAlexandre Torgue2020-07-271-34/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | EXTI lines are mainly used to wake-up system from CStop low power mode. Currently, if a device wants to use a EXTI (direct) line as wakeup line, it has to declare 2 interrupts: - one for EXTI used to wake-up system (with dedicated_wake_irq api). - one for GIC used to get the wake up reason inside the concerned IP. This split is not really needed as each EXTI line is actually "linked " to a GIC. So to avoid this useless double interrupt management in each wake-up driver, this patch lets the STM32 EXTI driver abstract it by mapping each EXTI line to his corresponding GIC. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200717140717.29606-1-alexandre.torgue@st.com
| * irqchip/mtk-cirq: Convert to a platform driverSaravana Kannan2020-07-271-1/+3
| | | | | | | | | | | | | | | | | | | | This driver can work as a platform driver. So covert it to a platform driver. Signed-off-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Hanks Chen <hanks.chen@mediatek.com> Link: https://lore.kernel.org/r/20200718000637.3632841-5-saravanak@google.com
| * irqchip/mtk-sysirq: Convert to a platform driverSaravana Kannan2020-07-271-1/+3
| | | | | | | | | | | | | | | | | | | | This driver can work as a platform driver. So covert it to a platform driver. Signed-off-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Hanks Chen <hanks.chen@mediatek.com> Link: https://lore.kernel.org/r/20200718000637.3632841-4-saravanak@google.com
| * irqchip/qcom-pdc: Switch to using IRQCHIP_PLATFORM_DRIVER helper macrosSaravana Kannan2020-07-271-23/+3
| | | | | | | | | | | | | | | | | | | | | | Switch the driver to use the helper macros. In addition to reducing the number of lines, this also adds module unload protection (if the driver is compiled as a module) by switching from module_platform_driver to builtin_platform_driver. Signed-off-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200718000637.3632841-3-saravanak@google.com
| * irqchip: Add IRQCHIP_PLATFORM_DRIVER_BEGIN/END and IRQCHIP_MATCH helper macrosSaravana Kannan2020-07-271-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compiling an irqchip driver as a platform driver needs to bunch of things to be done right: - Making sure the parent domain is initialized first - Making sure the device can't be unbound from sysfs - Disallowing module unload if it's built as a module - Finding the parent node - Etc. Instead of trying to make sure all future irqchip platform drivers get this right, provide boilerplate macros that take care of all of this. An example use would look something like this. Where acme_foo_init and acme_bar_init are similar to what would be passed to IRQCHIP_DECLARE. IRQCHIP_PLATFORM_DRIVER_BEGIN(acme_irq) IRQCHIP_MATCH("acme,foo", acme_foo_init) IRQCHIP_MATCH("acme,bar", acme_bar_init) IRQCHIP_PLATFORM_DRIVER_END(acme_irq) Signed-off-by: Saravana Kannan <saravanak@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: John Stultz <john.stultz@linaro.org> Link: https://lore.kernel.org/r/20200718000637.3632841-2-saravanak@google.com
| * irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLRZenghui Yu2020-07-271-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to issue a register-based invalidation operation for a vPEID not mapped to that RD, or another RD within the same CommonLPIAff group. To follow this rule, commit f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access") tried to address the race between the RD accesses and the vPE affinity change, but somehow forgot to take GICR_INVALLR into account. Let's take the vpe_lock before evaluating vpe->col_idx to fix it. Fixes: f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access") Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200720092328.708-1-yuzenghui@huawei.com
| * irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_mapFlorian Fainelli2020-07-271-0/+8
| | | | | | | | | | | | | | | | | | | | | | cpu_logical_map is only defined for CONFIG_SMP builds, when we are in an UP configuration, the boot CPU is 0. Fixes: 6468fc18b006 ("irqchip/irq-bcm7038-l1: Add PM support") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200724184157.29150-1-f.fainelli@gmail.com
| * irqchip/qcom-pdc: Allow QCOM_PDC to be loadable as a permanent moduleJohn Stultz2020-07-272-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows qcom-pdc driver to be loaded as a permanent module Also, due to the fact that IRQCHIP_DECLARE becomes a no-op when building as a module, we have to replace it with platform driver hooks explicitly. Thanks to Saravana for his help on pointing out the IRQCHIP_DECLARE issue and guidance on a solution. Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-arm-msm@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20200710231824.60699-4-john.stultz@linaro.org
| * irqchip/mips-gic: Make local symbols staticWei Yongjun2020-07-271-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sparse tool complains as follows: drivers/irqchip/irq-mips-gic.c:49:1: warning: symbol '__pcpu_scope_pcpu_masks' was not declared. Should it be static? drivers/irqchip/irq-mips-gic.c:620:6: warning: symbol 'gic_ipi_domain_free' was not declared. Should it be static? drivers/irqchip/irq-mips-gic.c:634:5: warning: symbol 'gic_ipi_domain_match' was not declared. Should it be static? Those symbols are not used outside of irq-mips-gic.c, so marks them static. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200714142245.16124-1-weiyongjun1@huawei.com
| * irqchip/ativic32: Constify irq_domain_opsMasahiro Yamada2020-07-271-1/+1
| | | | | | | | | | | | | | | | | | This is passed to irq_domain_add_linear(), which accepts a pointer to a const structure. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200714173857.477422-1-masahiroy@kernel.org
| * irqchip/stm32-exti: Use the hwspin_lock_timeout_in_atomic() APIFabien Dessenne2020-07-271-45/+20
| | | | | | | | | | | | | | | | | | Now that the hwspin_lock_timeout_in_atomic() API is available use it. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200706081115.25180-1-alexandre.torgue@st.com
| * irqchip/loongson-liointc: Fix potential dead lockTiezhu Yang2020-07-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | In the function liointc_set_type(), we need to call the function irq_gc_unlock_irqrestore() before returning. Fixes: dbb152267908 ("irqchip: Add driver for Loongson I/O Local Interrupt Controller") Reported-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-8-git-send-email-yangtiezhu@loongson.cn
| * irqchip/loongson-pch-msi: Remove unneeded variableTiezhu Yang2020-07-171-6/+1
| | | | | | | | | | | | | | | | | | | | | | irq_domain_alloc_irqs_parent() returns 0 on success and non-zero value on failure, it is redudant to check its non-zero return value and then return it, so just remove the variable "ret" and return directly in the function pch_msi_parent_domain_alloc(). Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-7-git-send-email-yangtiezhu@loongson.cn
| * irqchip/loongson-pch-pic: Check return value of irq_domain_translate_twocell()Tiezhu Yang2020-07-171-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | Check the return value of irq_domain_translate_twocell() due to it may returns -EINVAL if failed and use variable fwspec for it, and then use a new variable parent_fwspec which is proper for irq_domain_alloc_irqs_parent(). Fixes: ef8c01eb64ca ("irqchip: Add Loongson PCH PIC controller") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-6-git-send-email-yangtiezhu@loongson.cn
| * irqchip/loongson-htvec: Check return value of irq_domain_translate_onecell()Tiezhu Yang2020-07-171-1/+4
| | | | | | | | | | | | | | | | | | | | Check the return value of irq_domain_translate_onecell() due to it may returns -EINVAL if failed. Fixes: 818e915fbac5 ("irqchip: Add Loongson HyperTransport Vector support") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-5-git-send-email-yangtiezhu@loongson.cn
| * irqchip/loongson-htvec: Fix potential resource leakTiezhu Yang2020-07-171-1/+4
| | | | | | | | | | | | | | | | | | | | | | In the function htvec_of_init(), system resource "parent_irq" was not released in an error case. Thus add a jump target for the completion of the desired exception handling. Fixes: 818e915fbac5 ("irqchip: Add Loongson HyperTransport Vector support") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-4-git-send-email-yangtiezhu@loongson.cn
| * irqchip/loongson-htpic: Remove unneeded select of I8259Tiezhu Yang2020-07-171-1/+0
| | | | | | | | | | | | | | | | | | | | LOONGSON_HTPIC depends on MACH_LOONGSON64 and MACH_LOONGSON64 already selects I8259 in arch/mips/Kconfig, so no need to select I8259 again when config LOONGSON_HTPIC. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-3-git-send-email-yangtiezhu@loongson.cn
| * irqchip/loongson-htpic: Remove redundant kfree operationTiezhu Yang2020-07-171-4/+2
| | | | | | | | | | | | | | | | | | In the function htpic_of_init(), when kzalloc htpic fails, it should return -ENOMEM directly, no need to execute "goto" to kfree. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1594087972-21715-2-git-send-email-yangtiezhu@loongson.cn
| * irqchip/irq-bcm7038-l1: Allow building on ARM 32-bitFlorian Fainelli2020-07-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | We need to have a definition for cpu_logical_map[] which on ARM platforms is provided by asm/smp_plat.h. This header is not automatically included from linux/smp.h and untangling it is a bit difficult. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200709234141.4901-1-f.fainelli@gmail.com
| * irqchip/brcmstb-l2: Match UPG_AUX_AON_INTR2 compatibleFlorian Fainelli2020-07-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | The UPG_AUX_AON_INTR2 Level 2 interrupt controller node is defined with the "brcm,upg-aux-aon-l2-intc" compatible string in Device Tree and behaves as an edge triggered standard Broadcom STB L2 interrupt controller. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200709223016.989-7-f.fainelli@gmail.com
| * irqchip/brcmstb-l2: Match HIF_SPI_INTR2 compatibleKamal Dasu2020-07-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | The HIF_SPI_INTR2 Level 2 interrupt controller node is defined with the "brcm,hif-spi-l2-intc" compatible string in Device Tree and behaves as an edge triggered standard Broadcom STB L2 interrupt controller. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200709223016.989-5-f.fainelli@gmail.com
| * irqchip/brcmstb-l2: Set controller as wake-up sourceJustin Chen2020-07-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Utilize the Broadcom interrupt controller standard property "brcm,irq-can-wake" to flag whether this particular interrupt controller instance is wake-up capable. Since we do not know what type of parent interrupt controller we are interfaced with, ensure that enable_irq_wake() is called early on. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200709223016.989-3-f.fainelli@gmail.com
| * irqchip/bcm7120-l2: Set controller as wake-up sourceJustin Chen2020-07-171-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Utilize the Broadcom interrupt controller standard property "brcm,irq-can-wake" to flag whether this particular interrupt controller instance is wake-up capable. Since we do not know what type of parent interrupt controller we are interfaced with, ensure that enable_irq_wake() is called early on. Signed-off-by: Justin Chen <justinpopo6@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200709223016.989-2-f.fainelli@gmail.com
| * drivers/irqchip: Use new macro ACPI_DECLARE_SUBTABLE_PROBE_ENTRYOscar Carter2020-06-272-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In an effort to enable -Wcast-function-type in the top-level Makefile to support Control Flow Integrity builds, there are the need to remove all the function callback casts. To do this, modify the IRQCHIP_ACPI_DECLARE macro to use the new defined macro ACPI_DECLARE_SUBTABLE_PROBE_ENTRY instead of the macro ACPI_DECLARE_PROBE_ENTRY. This is necessary to be able to initialize the the acpi_probe_entry struct using the probe_subtbl field instead of the probe_table field and avoid function cast mismatches. Also, modify the prototype of the functions used by the invocation of the IRQCHIP_ACPI_DECLARE macro to match all the parameters. Co-developed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Oscar Carter <oscar.carter@gmx.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lore.kernel.org/r/20200530143430.5203-3-oscar.carter@gmx.com
| * irqchip/atmel-aic5: Add support for sam9x60 rtt fixupClaudiu Beznea2020-06-271-1/+7
| | | | | | | | | | | | | | | | | | Add support for SAM9X60 RTT fixup. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1591779936-18577-2-git-send-email-claudiu.beznea@microchip.com
| * irqchip/imx-intmux: Use struct_size() helper in devm_kzalloc()Gustavo A. R. Silva2020-06-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. This code was detected with the help of Coccinelle and, audited and fixed manually. Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200616230923.GA24937@embeddedor
| * irqchip/irq-mtk-sysirq: Replace spinlock with raw_spinlockBartosz Golaszewski2020-06-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver may take a regular spinlock when a raw spinlock (irq_desc->lock) is already taken which results in the following lockdep splat: ============================= [ BUG: Invalid wait context ] 5.7.0-rc7 #1 Not tainted ----------------------------- swapper/0/0 is trying to lock: ffffff800303b798 (&chip_data->lock){....}-{3:3}, at: mtk_sysirq_set_type+0x48/0xc0 other info that might help us debug this: context-{5:5} 2 locks held by swapper/0/0: #0: ffffff800302ee68 (&desc->request_mutex){....}-{4:4}, at: __setup_irq+0xc4/0x8a0 #1: ffffff800302ecf0 (&irq_desc_lock_class){....}-{2:2}, at: __setup_irq+0xe4/0x8a0 stack backtrace: CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.7.0-rc7 #1 Hardware name: Pumpkin MT8516 (DT) Call trace: dump_backtrace+0x0/0x180 show_stack+0x14/0x20 dump_stack+0xd0/0x118 __lock_acquire+0x8c8/0x2270 lock_acquire+0xf8/0x470 _raw_spin_lock_irqsave+0x50/0x78 mtk_sysirq_set_type+0x48/0xc0 __irq_set_trigger+0x58/0x170 __setup_irq+0x420/0x8a0 request_threaded_irq+0xd8/0x190 timer_of_init+0x1e8/0x2c4 mtk_gpt_init+0x5c/0x1dc timer_probe+0x74/0xf4 time_init+0x14/0x44 start_kernel+0x394/0x4f0 Replace the spinlock_t with raw_spinlock_t to avoid this warning. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200615074445.3579-1-brgl@bgdev.pl
| * irqchip/vic: Cut down the external APILinus Walleij2020-06-271-1/+4
| | | | | | | | | | | | | | | | | | | | There are registers and functions in the header file that are only used inside the driver. Move these into the driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200607215124.48638-2-linus.walleij@linaro.org
| * irqchip/vic: Drop cascaded intialization callLinus Walleij2020-06-271-21/+0
| | | | | | | | | | | | | | | | | | We got rid of the last user of the cascaded intialization from board files so drop this API. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200607215124.48638-1-linus.walleij@linaro.org
| * irqchip/ti-sci-inta: Fix typo about MODULE_AUTHORTiezhu Yang2020-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | It should be "ti.com" instead of "ticom". Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/1591437017-5295-3-git-send-email-yangtiezhu@loongson.cn
| * irqchip/ti-sci-inta: Fix return value about devm_ioremap_resource()Tiezhu Yang2020-06-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | When call function devm_ioremap_resource(), we should use IS_ERR() to check the return value and return PTR_ERR() if failed. Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/1591437017-5295-2-git-send-email-yangtiezhu@loongson.cn
| * irqchip/ti-sci-inta: Remove dead code in ti_sci_inta_set_type()Tiezhu Yang2020-06-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | In the function ti_sci_inta_set_type(), the statement "return -EINVAL;" out of switch case is dead code, remove it. Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/1591437017-5295-1-git-send-email-yangtiezhu@loongson.cn
* | Merge tag 'arm-drivers-5.9' of ↵Linus Torvalds2020-08-032-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "A couple of subsystems have their own subsystem maintainers but choose to have the code merged through the soc tree as upstream, as the code tends to be used across multiple SoCs or has SoC specific drivers itself: - memory controllers: Krzysztof Kozlowski takes ownership of the drivers/memory subsystem and its drivers, starting out with a set of cleanup patches. A larger driver for the Tegra memory controller that was accidentally missed for v5.8 is now added. - reset controllers: Only minor updates to drivers/reset this time - firmware: The "turris mox" firmware driver gains support for signed firmware blobs The tegra firmware driver gets extended to export some debug information Various updates to i.MX firmware drivers, mostly cosmetic - ARM SCMI/SCPI: A new mechanism for platform notifications is added, among a number of minor changes. - optee: Probing of the TEE bus is rewritten to better support detection of devices that depend on the tee-supplicant user space. A new firmware based trusted platform module (fTPM) driver is added based on OP-TEE - SoC attributes: A new driver is added to provide a generic soc_device for identifying a machine through the SMCCC ARCH_SOC_ID firmware interface rather than by probing SoC family specific registers. The series also contains some cleanups to the common soc_device code. There are also a number of updates to SoC specific drivers, the main ones are: - Mediatek cmdq driver gains a few in-kernel interfaces - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding support for additional SoC variants - The Qualcomm GENI core code gains interconnect path voting and performance level support, and integrating this into a number of device drivers. - A new driver for Samsung Exynos5800 voltage coupler for - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC specific device drivers - Updates to the TI K3 Ring Accelerator driver" * tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits) soc: qcom: geni: Fix unused label warning soc: qcom: smd-rpm: Fix kerneldoc memory: jz4780_nemc: Only request IO memory the driver will use soc: qcom: pdr: Reorder the PD state indication ack MAINTAINERS: Add Git repository for memory controller drivers memory: brcmstb_dpfe: Fix language typo memory: samsung: exynos5422-dmc: Correct white space issues memory: samsung: exynos-srom: Correct alignment memory: pl172: Enclose macro argument usage in parenthesis memory: of: Correct kerneldoc memory: omap-gpmc: Fix language typo memory: omap-gpmc: Correct white space issues memory: omap-gpmc: Use 'unsigned int' for consistency memory: omap-gpmc: Enclose macro argument usage in parenthesis memory: omap-gpmc: Correct kerneldoc memory: mvebu-devbus: Align with open parenthesis memory: mvebu-devbus: Add missing braces to all arms of if statement memory: bt1-l2-ctl: Add blank lines after declarations soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static firmware: ti_sci: Replace HTTP links with HTTPS ones ...
| * | firmware: ti_sci: Replace HTTP links with HTTPS onesAlexander A. Klimov2020-07-242-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-18 06:37:33 +0000