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* mtd: spi-nor: Add support for is25wp series chipsKimmo Rautkoski2018-11-041-0/+6
| | | | | | | | | | | | | [ Upstream commit d616f81cdd2a21edfa90a595a4e9b143f5ba8414 ] Added support for is25wp032, is25wp064 and is25wp128. Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> [ Adrian Bunk: Trivial adaption to changed context. ] Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
* mtd: spi-nor: cadence-quadspi: Fix page fault kernel panicThor Thayer2018-05-011-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 47016b341fc3b3fd4909e058c6fa38f165b53646 upstream. The current Cadence QSPI driver caused a kernel panic when loading a Root Filesystem from QSPI. The problem was caused by reading more bytes than needed because the QSPI operated on 4 bytes at a time. <snip> [ 7.947754] spi_nor_read[1048]:from 0x037cad74, len 1 [bfe07fff] [ 7.956247] cqspi_read[910]:offset 0x58502516, buffer=bfe07fff [ 7.956247] [ 7.966046] Unable to handle kernel paging request at virtual address bfe08002 [ 7.973239] pgd = eebfc000 [ 7.975931] [bfe08002] *pgd=2fffb811, *pte=00000000, *ppte=00000000 </snip> Notice above how only 1 byte needed to be read but by reading 4 bytes into the end of a mapped page, an unrecoverable page fault occurred. This patch uses a temporary buffer to hold the 4 bytes read and then copies only the bytes required into the buffer. A min() function is used to limit the length to prevent buffer overflows. Request testing of this patch on other platforms. This was tested on the Intel Arria10 SoCFPGA DevKit. Fixes: 0cf1725676a97fc8 ("mtd: spi-nor: cqspi: Fix build on arches missing readsl/writesl") Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Cc: <stable@vger.kernel.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* mtd: spi-nor: stm32-quadspi: Fix uninitialized error return codeGeert Uytterhoeven2017-12-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | [ Upstream commit 05521bd3d117704a1458eb4d0c3ae821858658f2 ] With gcc 4.1.2: drivers/mtd/spi-nor/stm32-quadspi.c: In function ‘stm32_qspi_tx_poll’: drivers/mtd/spi-nor/stm32-quadspi.c:230: warning: ‘ret’ may be used uninitialized in this function Indeed, if stm32_qspi_cmd.len is zero, ret will be uninitialized. This length is passed from outside the driver using the spi_nor.{read,write}{,_reg}() callbacks. Several functions in drivers/mtd/spi-nor/spi-nor.c (e.g. write_enable(), write_disable(), and erase_chip()) call spi_nor.write_reg() with a zero length. Fix this by returning an explicit zero on success. Fixes: 0d43d7ab277a048c ("mtd: spi-nor: add driver for STM32 quad spi flash controller") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* spi-nor: intel-spi: Fix broken software sequencing codesBin Meng2017-11-301-2/+2
| | | | | | | | | | | | | | | | commit 9d63f17661e25fd28714dac94bdebc4ff5b75f09 upstream. There are two bugs in current intel_spi_sw_cycle(): - The 'data byte count' field should be the number of bytes transferred minus 1 - SSFSTS_CTL is the offset from ispi->sregs, not ispi->base Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* mtd: spi-nor: fix DMA unsafe buffer issue in spi_nor_read_sfdp()Cyrille Pitchen2017-09-181-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | spi_nor_read_sfdp() calls nor->read() to read the SFDP data. When the m25p80 driver is used (pretty common case), nor->read() is then implemented by the m25p80_read() function, which is likely to initialize a 'struct spi_transfer' from its buf argument before appending this structure inside the 'struct spi_message' argument of spi_sync(). Besides the SPI sub-system states that both .tx_buf and .rx_buf members of 'struct spi_transfer' must point into dma-safe memory. However, two of the three calls of spi_nor_read_sfdp() were given pointers to stack allocated memory as buf argument, hence not in a dma-safe area. Hopefully, the third and last call of spi_nor_read_sfdp() was already given a kmalloc'ed buffer argument, hence dma-safe. So this patch fixes this issue by introducing a spi_nor_read_sfdp_dma_unsafe() function which simply wraps the existing spi_nor_read_sfdp() function and uses some kmalloc'ed memory as a bounce buffer. Fixes: f384b352cbf0 ("mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tables") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: spi-nor: Check consistency of the memory size extracted from the SFDPBoris Brezillon2017-09-181-0/+9
| | | | | | | | | | | | | | | | | | | One field of the flash parameter table contains information about the flash device size. Most of the time the data extracted from this field is valid, but sometimes the BFPT section of the SFDP table is corrupted or invalid and this field is set to 0xffffffff, thus resulting in an integer overflow when setting params->size. Since NOR devices are anayway always smaller than 2^64 bytes, we can easily stop the BFPT parsing if the size reported in this table is invalid. Fixes: f384b352cbf0 ("mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tables") Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.com>
* Merge tag 'spi-nor/for-4.14' of git://git.infradead.org/l2-mtd into mtd/nextBoris Brezillon2017-09-017-31/+890
|\ | | | | | | | | | | | | | | | | | | | | | | | | From Cyrille: " This pull request contains the following notable changes: - add support to the JEDEC JESD216B specification (SFDP tables). - add support to the Intel Denverton SPI flash controller. - fix error recovery for Spansion/Cypress SPI NOR memories. - fix 4-byte address management for the Aspeed SPI controller. - add support to some Microchip SST26 memory parts - remove unneeded pinctrl header "
| * mtd: spi-nor: add support for Microchip sst26vf064b QSPI memoryClaudiu Beznea2017-08-221-0/+1
| | | | | | | | | | | | | | Add support for Microchip sst26vf064b QSPI memory. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
| * mtd: spi-nor: fix "No newline at end of file"Matthew Gerlach2017-08-141-1/+1
| | | | | | | | | | | | | | | | | | Add a newline to the end of drivers/spi-nor/Makefile to get rid the message, "No newline at end of file", produced by git. This fix will allow subsequent changes to the file to be able to produce clean patches. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
| * mtd: spi-nor: aspeed: set 4B setting for all chipsCédric Le Goater2017-08-141-7/+6
| | | | | | | | | | | | | | | | | | The driver made the wrong assumption that the 4B setting was autodetected for all chips of the AST2500 FMC flash controller. This is only the case for the CS0. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
| * mtd: mtk-quadspi: Remove unneeded pinctrl headerFabio Estevam2017-08-011-1/+0
| | | | | | | | | | | | | | | | There is no need to include <linux/pinctrl/consumer.h> as no pinctrl function is used in this driver, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
| * mtd: atmel-quadspi: Remove unneeded pinctrl headerFabio Estevam2017-08-011-1/+0
| | | | | | | | | | | | | | | | There is no need to include <linux/pinctrl/consumer.h> as no pinctrl function is used in this driver, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
| * mtd: spi-nor: Recover from Spansion/Cypress errorsAlexander Sverdlin2017-08-011-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | S25FL{128|256|512}S datasheets say: "When P_ERR or E_ERR bits are set to one, the WIP bit will remain set to one indicating the device remains busy and unable to receive new operation commands. A Clear Status Register (CLSR) command must be received to return the device to standby mode." Current spi-nor code works until first error occurs, but write/erase errors are not just rare hardware failures, they also occur if user tries to flash write-protected areas. After such attempt no SPI command can be executed any more and even read fails. This patch adds support for P_ERR and E_ERR bits in Status Register 1 (so that operation fails immediately and not after a long timeout) and proper recovery from the error condition. Tested on Spansion S25FS128S, which is supported by S25FL129P entry. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
| * mtd: spi-nor: intel-spi: Add support for Intel Denverton SPI serial flash ↵Mika Westerberg2017-08-013-0/+99
| | | | | | | | | | | | | | | | | | | | controller Intel Denverton exposes the SPI serial flash controller as a PCI device instead of being part of the LPC chip as previous generations did. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
| * mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tablesCyrille Pitchen2017-07-181-13/+762
| | | | | | | | | | | | | | | | This patch adds support to the JESD216 rev B standard and parses the SFDP tables to dynamically initialize the 'struct spi_nor_flash_parameter'. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
* | mtd: Convert to using %pOF instead of full_nameRob Herring2017-08-151-4/+4
|/ | | | | | | | | | | | | | | | Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Richard Weinberger <richard@nod.at> Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> Cc: linux-mtd@lists.infradead.org Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: spi-nor: cqspi: remove duplicate constArnd Bergmann2017-06-271-1/+1
| | | | | | | | | | | | | | The variable was already marked 'const' before the previous patch, but the qualifier was in an unusual place, and now the extra 'const' causes a harmless warning: drivers/mtd/spi-nor/cadence-quadspi.c:1286:34: error: duplicate 'const' declaration specifier [-Werror=duplicate-decl-specifier] This removes the other 'const' instead. Fixes: f993c123b461 ("mtd: spi-nor: cqspi: make of_device_ids const") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: Add support for Spansion S25FL064LHarry Chou2017-06-261-0/+1
| | | | | | | It's an 8 MiB flash with 4 KiB erase sectors. Signed-off-by: Harry Chou <HarryYC.Chou@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: Add support for mx66u51235fAlexander Sverdlin2017-06-261-0/+1
| | | | | | | | This chip supports stateless 4-byte opcodes, dual and quad read and uniform 4K-byte erase. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: aspeed: configure chip window on AHB busCédric Le Goater2017-06-221-3/+154
| | | | | | | | | | | | | | | | | | | | The segment registers of the SMC controller provide a way to configure the mapping windows of the chips on the AHB bus. The settings are required to be correct when the controller operates in Command mode, which is the case for DMAs and the LPC mapping. This tries to set the segment registers of each chip depending on the size of the flash device and depending on the previous segment settings, in order to have a contiguous window across multiple chips. Unfortunately, the AST2500 SPI controller has a bug and it is not possible to configure a full 128MB window for a chip of the same size. The window size needs to be restricted to 120MB. This issue only applies to CE0. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: aspeed: remove dummies from keep maskCédric Le Goater2017-06-211-2/+1
| | | | | | | | | | | There is no need to keep the dummy bytes in the control register if the command mode is not kept also. This could lead to an inconsistent setting : normal read mode (command 0x3) and dummy bytes. It is to be noted that the HW allows such a configuration. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: add Dual and Quad read mode support to some flash devicesCédric Le Goater2017-06-211-4/+4
| | | | | | | | | These devices are used on OpenPOWER systems. The SPI_NOR_DUAL_READ flags is added for the Aspeed SoCs which do not support QUAD reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: Add support for Macronix mx66l1g45g spi flashCédric Le Goater2017-06-211-0/+1
| | | | | | | | | | These modules are used on the OpenPOWER Witherspoon systems to hold the POWER9 host firmware image. The SPI_NOR_DUAL_READ flags is added for the Aspeed SoCs which do not support QUAD reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: cqspi: make of_device_ids constArvind Yadav2017-06-201-1/+1
| | | | | | | | | | of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* spi-nor: Add Winbond w25m512jvBenjamin Herrenschmidt2017-06-201-0/+2
| | | | | | | | | | | | | Similar to the other ones, different size. The "JV" suffix is in the datasheet, I haven't seen mentions of a different one. The datasheet indicates DUAL and QUAD are supported. http://www.winbond.com/resource-files/w25m512jv%20revc%2001062017.pdf Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: Potential oops on error path in quad_enable()Dan Carpenter2017-05-151-2/+3
| | | | | | | | | | | | Before commit cff959958832 ("mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocols") then we treated 1 as -EINVAL in the caller but after that commit we changed to propagate the return. My static checker complains that it's eventually passed to an ERR_PTR() and later dereferenced, but I'm not totally certain if that's true. Regardless, returning 1 is wrong. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: stm32-quadspi: allow building with COMPILE_TESTBrian Norris2017-05-151-1/+1
| | | | | | Cc: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: stm32-quadspi: fix compiler errors with COMPILE_TESTCyrille Pitchen2017-05-151-2/+3
| | | | | | | | | This patch fixes some compiler errors: - change format strings to use %zx for size_t - add missing #include <linux/sizes.h> Cc: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
* mtd: spi-nor: introduce Octo SPI protocolsCyrille Pitchen2017-05-151-1/+21
| | | | | | | | | | | | This patch starts adding support to Octo SPI protocols (SPI x-y-8). Op codes for Fast Read and/or Page Program operations using Octo SPI protocols are not known yet (no JEDEC specification has defined them yet) but we'd rather introduce the Octo SPI protocols now so it's done as it should be. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
* mtd: spi-nor: introduce Double Transfer Rate (DTR) SPI protocolsCyrille Pitchen2017-05-151-0/+10
| | | | | | | | | | | | This patch introduces support to Double Transfer Rate (DTR) SPI protocols. DTR is used only for Fast Read operations. According to manufacturer datasheets, whatever the number of I/O lines used during instruction (x) and address/mode/dummy (y) clock cycles, DTR is used only during data (z) clock cycles of SPI x-y-z protocols. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
* mtd: spi-nor: introduce SPI 1-2-2 and SPI 1-4-4 protocolsCyrille Pitchen2017-05-1510-178/+494
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the prototype of spi_nor_scan(): its 3rd parameter is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor framework about the actual hardware capabilities supported by the SPI controller and its driver. Besides, this patch also introduces a new 'struct spi_nor_flash_parameter' telling the spi-nor framework about the hardware capabilities supported by the SPI flash memory and the associated settings required to use those hardware caps. Then, to improve the readability of spi_nor_scan(), the discovery of the memory settings and the memory initialization are now split into two dedicated functions. 1 - spi_nor_init_params() The spi_nor_init_params() function is responsible for initializing the 'struct spi_nor_flash_parameter'. Currently this structure is filled with legacy values but further patches will allow to override some parameter values dynamically, for instance by reading the JESD216 Serial Flash Discoverable Parameter (SFDP) tables from the SPI memory. The spi_nor_init_params() function only deals with the hardware capabilities of the SPI flash memory: especially it doesn't care about the hardware capabilities supported by the SPI controller. 2 - spi_nor_setup() The second function is called once the 'struct spi_nor_flash_parameter' has been initialized by spi_nor_init_params(). With both 'struct spi_nor_flash_parameter' and 'struct spi_nor_hwcaps', the new argument of spi_nor_scan(), spi_nor_setup() computes the best match between hardware caps supported by both the (Q)SPI memory and controller hence selecting the relevant settings for (Fast) Read and Page Program operations. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
* Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtdLinus Torvalds2017-05-117-6/+749
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "NAND, from Boris: - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc, davinci, brcmnand, omap) - a huge cleanup/rework of the denali driver accompanied with core fixes/improvements to simplify the driver code - a complete rewrite of the atmel driver to support new DT bindings make future evolution easier - the addition of per-vendor detection/initialization steps to avoid extending the nand_ids table with more extended-id entries SPI NOR, from Cyrille: - fixes in the hisi, intel and Mediatek SPI controller drivers - fixes to some SPI flash memories not supporting the Chip Erase command. - add support to some new memory parts (Winbond, Macronix, Micron, ESMT). - add new driver for the STM32 QSPI controller And a few fixes for Gemini and Versatile platforms on physmap-of" * tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits) MAINTAINERS: Update NAND subsystem git repositories mtd: nand: gpio: update binding mtd: nand: add ooblayout for old hamming layout mtd: oxnas_nand: Allocating more than necessary in probe() dt-bindings: mtd: Document the STM32 QSPI bindings mtd: mtk-nor: set controller's address width according to nor flash mtd: spi-nor: add driver for STM32 quad spi flash controller mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program mtd: nand: davinci: add comment on NAND subpage write status on keystone mtd: nand: omap2: Fix partition creation via cmdline mtdparts mtd: nand: NULL terminate a of_device_id table mtd: nand: Fix a couple error codes mtd: nand: allow drivers to request minimum alignment for passed buffer mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset mtd: nand: denali: allow to override revision number mtd: nand: denali_dt: use pdev instead of ofdev for platform_device mtd: nand: denali_dt: remove dma-mask DT property mtd: nand: denali: support 64bit capable DMA engine mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant mtd: nand: denali: support HW_ECC_FIXUP capability ...
| * mtd: mtk-nor: set controller's address width according to nor flashGuochun Mao2017-05-011-0/+27
| | | | | | | | | | | | | | | | | | When nor's size larger than 16MByte, nor's address width maybe set to 3 or 4, and controller should change address width according to nor's setting. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: add driver for STM32 quad spi flash controllerLudovic Barre2017-05-013-0/+701
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The quadspi is a specialized communication interface targeting single, dual or quad SPI Flash memories. It can operate in any of the following modes: -indirect mode: all the operations are performed using the quadspi registers -read memory-mapped mode: the external Flash memory is mapped to the microcontroller address space and is seen by the system as if it was an internal memory Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: enable stateless 4b op codes for mx25u25635fMathias Kresin2017-04-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | All required stateless 4-byte op codes are supported by this flash chip. The stateless 4-byte support can't be autodetected due to a missing 4-byte Address Instruction Table in SFDP. Fixes hangs on reboot for SoCs expecting the flash chip in 3byte mode. Signed-off-by: Mathias Kresin <dev@kresin.me> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: Add support for N25Q256A11Nobuhiro Iwamatsu2017-04-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Add new Micron N25Q256A (N25Q256A11) 256Mbit NOR Flash in the list of supported devices. This chip has the same structure as the N25Q256A but ID and voltage (1V8) to use is different. Therefore, this adds N25Q256A11 as n25q256ax1. In the future, for new Micron memories we could use the patterns "n25q*ax1" for 1V8 and "n25q*ax3" for 3V3 memories. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.kw@hitachi.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * drivers mtd: spi-nor: add Macronix MX25Ux033E and MX25Ux035 variantsAlexander Kurz2017-03-221-0/+3
| | | | | | | | | | | | | | | | | | | | Macronix MX25U2033E, MX25U4033E and MX25U4035 devices are used in 4/5/6th generation Kindle ebook readers. Both MX25U403x variants share the same JEDEC id. Add those spi-nor variants and the similar MX25U8035 mentioned in the same set of datasheets. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * drivers mtd: spi-nor: add Winbond W25Q20 variantsAlexander Kurz2017-03-221-0/+3
| | | | | | | | | | | | | | | | | | Winbond W25Q20BW devices are used in 4/5th generation Kindle ebook readers. Add this spi-nor device and the similar W25Q20 devices to the list of known devices. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: Disable chip erase for Micron n25q00.mar.krzeminski2017-03-221-2/+2
| | | | | | | | | | | | | | | | | | Micron n25q00 are stacked chips, thus do not support chip erase. >From now spi-nor framework will not send chip erase command, instead will use sector at time erase procedure. Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: Fix whole chip erasing for stacked chips.mar.krzeminski2017-03-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | Currently it is possible to disable chip erase for spi-nor driver. Some modern stacked (multi die) flash chips do not support chip erase opcode at all but spi-nor framework needs to cope with them too. This commit extends existing functionality to allow disable chip erase for a single flash chip. Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: Add support for ESMT F25L32QA and F25L64QAL. D. Pinney2017-03-071-0/+2
| | | | | | | | | | | | | | | | | | Add support for the ESMT F25L32QA and F25L64QA. These are 4MB and 8MB SPI-NOR Chips from Elite Semiconductor Memory Technology. Signed-off-by: L. D. Pinney <ldpinney@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: intel: use ERR_CAST in return statementNicholas Mc Guire2017-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | This fixes a sparse warning about incorrect type in return expression. Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: intel: use true/false for booleanNicholas Mc Guire2017-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | writeable in struct intel_spi is a boolean and assignment should be to true/false not 1/0 as recommended by boolinit.cocci. Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: spi-nor: hisi: do not ignore clk_prepare_enable() failureAlexey Khoroshilov2017-03-071-1/+4
| | | | | | | | | | | | | | | | | | | | | | hisi_spi_nor_probe() ignores clk_prepare_enable() error code. The patch fixes that. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
* | scripts/spelling.txt: add "disble(d)" pattern and fix typo instancesMasahiro Yamada2017-03-091-1/+1
|/ | | | | | | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: disble||disable disbled||disabled I kept the TSL2563_INT_DISBLED in /drivers/iio/light/tsl2563.c untouched. The macro is not referenced at all, but this commit is touching only comment blocks just in case. Link: http://lkml.kernel.org/r/1481573103-11329-20-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mtd: aspeed: remove redundant dev_err call in aspeed_smc_probe()Wei Yongjun2017-02-101-6/+2
| | | | | | | | | | There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linuxBrian Norris2017-02-109-67/+1913
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Cyrille: """ This pull request contains the following notable changes: - add support to the 4-byte address instruction set. - add support to new memory parts. - add support to S3AN memories. - add support to the Intel SPI controller. - add support to the Aspeed AST2400 and AST2550 controllers. - fix max SPI transfer and message sizes in m25p80_read(). - fix the Candence QSPI driver. - fix the Freescale QSPI driver. """
| * mtd: spi-nor: cqspi: remove redundant dead code on error return checkColin Ian King2017-02-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | Checking for ret < 0 is redundant because a previous check on ret being non-zero already handles the ret < 0 case. Remove the redundant code. Found by CoverityScan, CID#1398863, CID#1398864 Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Richard Weinberger <richard@nod.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
| * mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READYunhui Cui2017-02-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | There are some read modes for flash, such as NORMAL, FAST, QUAD, DDR QUAD. These modes will use the identical lut table base So rename SEQID_QUAD_READ to SEQID_READ. Signed-off-by: Yunhui Cui <B56489@freescale.com> Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
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