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path: root/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
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* atlantic: Fix statistics logic for production hardwareDmitry Bogdanov2021-11-291-0/+2
| | | | | | | | | | | | B0 is the main and widespread device revision of atlantic2 HW. In the current state, driver will incorrectly fetch the statistics for this revision. Fixes: 5cfd54d7dc186 ("net: atlantic: minimal A2 fw_ops") Signed-off-by: Dmitry Bogdanov <dbezrukov@marvell.com> Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* ethernet: constify references to netdev->dev_addr in driversJakub Kicinski2021-10-141-3/+3
| | | | | | | | | | | | | | | | | | | | | This big patch sprinkles const on local variables and function arguments which may refer to netdev->dev_addr. Commit 406f42fa0d3c ("net-next: When a bond have a massive amount of VLANs...") introduced a rbtree for faster Ethernet address look up. To maintain netdev->dev_addr in this tree we need to make all the writes to it got through appropriate helpers. Some of the changes here are not strictly required - const is sometimes cast off but pointer is not used for writing. It seems like it's still better to add the const in case the code changes later or relevant -W flags get enabled for the build. No functional changes. Link: https://lore.kernel.org/r/20211014142432.449314-1-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
* net: atlantic: implement media detect feature via phy tunablesIgor Russkikh2020-10-061-0/+4
| | | | | | | | | | | | | | | | Mediadetect is another name for the EDPD (energy detect power down). This feature allows device to save extra power when no link is available. PHY goes into the extreme power saving mode and only periodically wakes up and checks for the link. AQC devices has fixed check period of 6 seconds The feature may increase linkup time. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: implement phy downshift featureIgor Russkikh2020-10-061-0/+2
| | | | | | | | | | | | | PHY downshift allows phy to try renegotiate if link is unstable and can carry higher speed. AQC devices has integrated PHY which is controlled by MAC firmware. Thus, driver defines new ethtool callbacks to implement phy tunables via netdev. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller2020-07-251-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UDP reuseport conflict was a little bit tricky. The net-next code, via bpf-next, extracted the reuseport handling into a helper so that the BPF sk lookup code could invoke it. At the same time, the logic for reuseport handling of unconnected sockets changed via commit efc6b6f6c3113e8b203b9debfb72d81e0f3dcace which changed the logic to carry on the reuseport result into the rest of the lookup loop if we do not return immediately. This requires moving the reuseport_has_conns() logic into the callers. While we are here, get rid of inline directives as they do not belong in foo.c files. The other changes were cases of more straightforward overlapping modifications. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: atlantic: disable PTP on AQC111, AQC112Nikita Danilov2020-07-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch disables PTP on AQC111 and AQC112 due to a known HW issue, which can cause datapath issues. Ideally PTP block should have been disabled via PHY provisioning, but unfortunately many units have been shipped with enabled PTP block. Thus, we have to work around this in the driver. Fixes: dbcd6806af420 ("net: aquantia: add support for Phy access") Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: atlantic: add hwmon getter for MAC temperatureMark Starovoytov2020-07-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | This patch adds the possibility to obtain MAC temperature via hwmon. On A1 there are two separate temperature sensors. On A2 there's only one temperature sensor, which is used for reporting both MAC and PHY temperature. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: atlantic: add support for 64-bit reads/writesPavel Belous2020-07-201-0/+1
| | | | | | | | | | | | | | | | | | | | This patch adds support for 64-bit reads/writes where applicable, e.g. A2 supports them. Signed-off-by: Pavel Belous <pbelous@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: atlantic: move FRAC_PER_NS to aq_hw.hMark Starovoytov2020-07-201-0/+2
| | | | | | | | | | | | | | | | | | This patch moves FRAC_PER_NS to aq_hw.h so that it can be used in both hw_atl (A1) and hw_atl2 (A2) in the future. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: atlantic: A2: report link partner capabilitiesDmitry Bogdanov2020-06-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds link partner capabilities reporting support on A2. In particular, the following capabilities are available for reporting: * link rate; * EEE; * flow control. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: atlantic: A2: half duplex supportIgor Russkikh2020-06-221-3/+5
|/ | | | | | | | This patch adds support for 10M/100M/1G half duplex rates, which are supported by A2 in additional to full duplex rates supported by A1. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: QoS implementation: min_rateMark Starovoytov2020-05-221-0/+2
| | | | | | | | | | | This patch adds support for mqprio min_rate limiters. A2 HW supports Weighted Strict Priority (WSP) arbitration for Tx Descriptor Queue scheduling among TCs, which can be used for min_rate shaping. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: QoS implementation: max_rateMark Starovoytov2020-05-221-0/+3
| | | | | | | | | | | | | | This patch adds initial support for mqprio rate limiters (max_rate only). Atlantic HW supports Rate-Shaping for time-sensitive traffic at per Traffic Class (TC) granularity. Target rate is defined by: * nominal link rate (always 10G); * rate factor (ratio between nominal rate and max allowed). Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: QoS implementation: multi-TC supportDmitry Bezrukov2020-05-221-0/+1
| | | | | | | | | | | | | | | This patch adds multi-TC support. PTP is automatically disabled when the user enables more than 2 TCs, otherwise traffic on TC2 won't quite work, because it's reserved for PTP. Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: changes for multi-TC supportDmitry Bezrukov2020-05-221-4/+6
| | | | | | | | | | | | | | | | | | | | | | This patch contains the following changes: * add cfg->is_ptp (used for PTP enable/disable switch, which is described in more details below); * add cfg->tc_mode (A1 supports 2 HW modes only); * setup queue to TC mapping based on TC mode on A2; * remove hw_tx_tc_mode_get / hw_rx_tc_mode_get hw_ops. In the first generation of our hardware (A1), a whole traffic class is consumed for PTP handling in FW (FW uses it to send the ptp data and to send back timestamps). The 'is_ptp' flag introduced in this patch will be used in to automatically disable PTP when a conflicting configuration is detected, e.g. when multiple TCs are enabled. Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: changes for multi-TC supportDmitry Bezrukov2020-05-221-1/+3
| | | | | | | | | | | | | | | | | | | | | | | This patch contains the following changes: * access cfg via aq_nic_get_cfg() in aq_nic_start() and aq_nic_map_skb(); * call aq_nic_get_dev() just once in aq_nic_map_skb(); * move ring allocation/deallocation out of aq_vec_alloc()/aq_vec_free(); * add the missing aq_nic_deinit() in atl_resume_common(); * rename 'tcs' field to 'tcs_max' in aq_hw_caps_s to differentiate it from the 'tcs' field in aq_nic_cfg_s, which is used for the current number of TCs; * update _TC_MAX defines to the actual number of supported TCs; * move tx_tc_mode register defines slightly higher (just to keep the order of definitions); * separate variables for TX/RX buff_size in hw_atl*_hw_qos_set(); * use AQ_HW_*_TC instead of hardcoded magic numbers; * actually use the 'ret' value in aq_mdo_add_secy(); Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: A2 hw_ops skeletonIgor Russkikh2020-05-011-0/+1
| | | | | | | | | | This patch adds basic hw_ops layout for A2. Actual implementation will be added in the follow-up patches. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: minimal A2 HW bindings required for fw_opsDmitry Bogdanov2020-05-011-0/+1
| | | | | | | | | This patch adds the bare minimum of A2 HW bindings required to get fw_ops working. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: move IS_CHIP_FEATURE to aq_hw.hMark Starovoytov2020-05-011-0/+13
| | | | | | | | | IS_CHIP feature will be used to differentiate between A1 and A2, where necessary. Thus, move it to aq_hw.h, rename it and make it accept the 'hw' pointer. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: simplify hw_get_fw_version() usageNikita Danilov2020-05-011-1/+1
| | | | | | | | | hw_get_fw_version() never fails, so this patch simplifies its usage by utilizing return value instead of output argument. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: add hw_soft_reset, hw_prepare to hw_opsMark Starovoytov2020-05-011-0/+5
| | | | | | | | | | A2 will have a different implementation of these 2 APIs, so this patch moves them to hw_ops in preparation for A2. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Co-developed-by: Dmitry Bezrukov <dbezrukov@marvell.com> Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: MACSec offload skeletonDmitry Bogdanov2020-03-261-0/+6
| | | | | | | | | | | | | | | | This patch adds basic functionality for MACSec offloading for Atlantic NICs. MACSec offloading functionality is enabled if network card has appropriate FW that has MACSec offloading enabled in config. Actual functionality (ingress, egress, etc) will be added in follow-up patches. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: ptp gpio adjustmentsEgor Pomozov2020-02-161-0/+2
| | | | | | | | | | Clock adjustment data should be passed to FW as well, otherwise in some cases a drift was observed when using GPIO features. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: loopback tests via private flagsIgor Russkikh2019-11-071-0/+18
| | | | | | | | | | Here we add a number of ethtool private flags to allow enabling various loopbacks on HW. Thats useful for verification and bringup works. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: add fw configuration memory areaNikita Danilov2019-11-071-0/+1
| | | | | | | | | | | | | | | Device FW has a separate memory area where various config fields are stored and could be used by the driver. Here we modify download/upload infrastructure to allow accessing this area. Lateron this will be used to configure various behaviours Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: atlantic: adding ethtool physical identificationNikita Danilov2019-11-071-0/+5
| | | | | | | | | `ethtool -p eth0` will blink leds helping identify physical port. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add support for PIN funcsDmitry Bezrukov2019-10-241-0/+10
| | | | | | | | | | | | | | | | | | | Depending on FW configuration we can manage from 0 to 3 PINs for periodic output and from 0 to 1 ext ts PIN for getting TS for external event. Ext TS PIN functionality is implemented via periodic timestamps polling directly from PHY, because right now there is now way to receive the PIN trigger interrupt from phy. The polling interval is 15 milliseconds. Co-developed-by: Egor Pomozov <epomozov@marvell.com> Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Pavel Belous <pavel.belous@aquantia.com> Signed-off-by: Pavel Belous <pavel.belous@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add support for Phy accessDmitry Bezrukov2019-10-241-0/+1
| | | | | | | | | | | | | | | GPIO PIN control and access is done by direct phy manipulation. Here we add an aq_phy module which is able to access phy registers via MDIO access mailbox. Access is controlled via HW semaphore. Co-developed-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: implement data PTP datapathEgor Pomozov2019-10-241-0/+12
| | | | | | | | | | | | | Here we do alloc/free IRQs for PTP rings. We also implement processing of PTP packets on TX and RX sides. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add PTP rings infrastructureEgor Pomozov2019-10-241-0/+4
| | | | | | | | | | | | | | | | | | Add implementations of PTP rings alloc/free. PTP desing on this device uses two separate rings on a separate traffic class for traffic rx/tx. Third ring (hwts) is not a traffic ring, but is used only to receive timestamps of the transmitted packets. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add basic ptp_clock callbacksEgor Pomozov2019-10-241-1/+20
| | | | | | | | | | | | | | | | | Basic HW functions implemented for adjusting frequency, adjusting time, getting and setting time. With these callbacks we now do register ptp clock in the system. Firmware interface parts are defined for PTP requests and interactions. Enable/disable PTP counters in HW on clock register/unregister. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422Thomas Gleixner2019-06-051-4/+1
| | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 101 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190113.822954939@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* net: aquantia: add link interrupt fieldsIgor Russkikh2019-05-011-0/+2
| | | | | | | | | Declare macroes and nic fields to support link interrupt handling Signed-off-by: Nikita Danilov <ndanilov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add infrastructure to readout chip temperatureYana Esina2019-05-011-0/+2
| | | | | | | | | | | Ability to read the chip temperature from memory via hwmon interface Signed-off-by: Yana Esina <yana.esina@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add support of rx-vlan-filter offloadDmitry Bogdanov2018-11-141-0/+1
| | | | | | | | | | Since it uses the same NIC table as rx flow vlan filter therefore rx-flow vlan filter accepts only vlans that present on the interface in case of rx-vlan-filter is on. Signed-off-by: Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add ethertype and PCP to rx flow filtersDmitry Bogdanov2018-11-141-0/+8
| | | | | | | | | | | | | | | | | | L2 EtherType filters allows to filter packet by EtherType field or both EtherType and User Priority (PCP) field of 802.1Q. UserPriority (vlan) parameter must be accompanied by mask 0x1FFF. That is to distinguish VLAN filter from L2 Ethertype filter with UserPriority since both User Priority and VLAN ID are passed in the same 'vlan' parameter. Example: To add a filter that directs IP4 packess of priority 3 to queue 3: ethtool -N <ethX> flow-type ether proto 0x800 vlan 0x600 m 0x1FFF \ action 3 loc 16 Signed-off-by: Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add vlan id to rx flow filtersDmitry Bogdanov2018-11-141-0/+9
| | | | | | | | | | | | | | | | | | The VLAN filter (VLAN id) is compared against 16 filters. VLAN id must be accompanied by mask 0xF000. That is to distinguish VLAN filter from L2 Ethertype filter with UserPriority since both User Priority and VLAN ID are passed in the same 'vlan' parameter. Flow type may be any as it is not matched for VLAN filter. Due to fixed order of the rules in the NIC, the location 0-15 are reserved for vlan filters. Example: To add a rule that directs packets from VLAN 2001 to queue 5: ethtool -N <ethX> flow-type ip4 vlan 2001 m 0xF000 action 5 loc 0 Signed-off-by: Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: add support of L3/L4 ntuple filtersDmitry Bogdanov2018-11-141-0/+11
| | | | | | | | | | | | | | | | | | | | | Add support of L3/L4 5-tuple {protocol, src-ip, dst-ip, src-port, dst-port} filters. Mask is not supported. Src-port and dst-port are only compared for TCP/UDP/SCTP packets. Both IPv4 and IPv6 are supported. The supported actions are the drop and the queue assignment. Due to fixed order of the rules in the NIC, the location 32-39 are reserved for L3/L4 5-tuple filters. The locations 32 and 36 are reserved for IPv6 filters. Examples: sudo ethtool -N eth0 flow-type ip6 src-ip 2001:db8:0:f101::2 \ dst-ip 2001:db8:0:f101::5 action -1 loc 36 sudo ethtool -N eth0 flow-type udp4 src-ip 10.0.0.4 \ dst-ip 10.0.0.7 src-port 2000 dst-port 2001 action 2 loc 32 Signed-off-by: Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: allow rx checksum offload configurationDmitry Bogdanov2018-11-091-0/+3
| | | | | | | | | RX Checksum offloads could not be configured and ignored netdev features flag for checksumming. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: Dmitry Bogdanov <dmitry.bogdanov@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: synchronized flow control between mac/phyIgor Russkikh2018-11-091-0/+3
| | | | | | | | | | | | | | | Flow control statuses were not synchronized between blocks, that caused packets/link drop on some corner cases, when MAC sent PFC although Phy was not expecting these to come. Driver should readout the negotiated FC from phy and configure RX block accordigly. This is done on each link change event with information from FW. Fixes: 288551de45aa ("net: aquantia: Implement rx/tx flow control ethtools callback") Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: renaming for better visibilityNikita Danilov2018-09-111-2/+2
| | | | | | | | | | Removed extra characters from the names of structures to unify prefixes used through the driver code (we normally use hw_atl for hw specifics). HW_ATL_B0_ and HW_ATL_A0_ are the same and useless copies. Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: implement EEE supportYana Esina2018-09-111-0/+5
| | | | | | | | | | | | Support of Energy-Efficient Ethernet to aQuantia NIC's via ethtool (according to the IEEE 802.3az specifications) Signed-off-by: Yana Esina <yana.esina@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Tested-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: implement WOL supportYana Esina2018-09-111-1/+3
| | | | | | | | | | | | | | | | Add WOL support. Currently only magic packet (ethtool -s <ethX> wol g) feature is implemented. Remove hw_set_power and move that to FW_OPS set_power: because WOL configuration behaves differently on 1x and 2x firmwares Signed-off-by: Yana Esina <yana.esina@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Tested-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge ra.kernel.org:/pub/scm/linux/kernel/git/torvalds/linuxDavid S. Miller2018-07-201-1/+3
|\ | | | | | | | | | | | | All conflicts were trivial overlapping changes, so reasonably easy to resolve. Signed-off-by: David S. Miller <davem@davemloft.net>
| * net: aquantia: vlan unicast address list correct handlingIgor Russkikh2018-07-061-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting up macvlan/macvtap networks over atlantic NIC results in no traffic over these networks because ndo_set_rx_mode did not listed UC MACs as registered in unicast filter. Here we fix that taking into account maximum number of UC filters supported by hardware. If more than MAX addresses were registered, we just enable promisc and/or allmulti to pass the traffic in. We also remove MULTICAST_ADDRESS_MAX constant from aq_cfg since thats not a configurable parameter at all. Fixes: b21f502 ("net:ethernet:aquantia: Fix for multicast filter handling.") Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: aquantia: Add renegotiate ethtool operation supportAnton Mikaev2018-07-031-0/+2
| | | | | | | | | | | | | | | | | | Adds ethtool -r|--negotiate operation support. It triggers special control bit on FW interface causing FW to restart link negotiation. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: Anton Mikaev <amikaev@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: aquantia: Improve adapter init/deinit logicIgor Russkikh2018-07-031-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | We now pass link drop status to FW on init/deinit. This is required to inform FW that driver took/released a control on link. FW then will manage its own state and device power profile based on this information. To improve management we remove mpi_set function which ambiguously took both state and speed parameters. Deinit callback is now a part of FW ops, as it actually manages the FW. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | net: aquantia: Ethtool based ring size configurationAnton Mikaev2018-07-031-2/+7
|/ | | | | | | | | Implemented ring size setup, min/max validation and reconfiguration in runtime. Signed-off-by: Anton Mikaev <amikaev@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: Introduce global AQC hardware reset sequenceIgor Russkikh2018-01-211-0/+1
| | | | | | | | | The detailed reset sequence ensures all HW components are in aligned state before NIC startup. It also supports cards with signed firmware (RBL) and checks if their FW is valid. Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: aquantia: Introduce support for new firmware on AQC cardsIgor Russkikh2018-01-211-1/+0
| | | | | | | | This defines fw2x operations table and corresponding methods. Some of the functions are being shared with 1.x firmware Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 03:03:35 +0000