summaryrefslogtreecommitdiffstats
path: root/drivers/nvmem/Kconfig
Commit message (Collapse)AuthorAgeFilesLines
* nvmem: imx: support i.MX93 OCOTPPeng Fan2023-06-151-0/+9
| | | | | | | | | | | | | | Add i.MX93 OCOTP support. i.MX93 OCOTP has two parts: Fuse shadow block(fsb) and fuse managed by ELE. The FSB part could be directly accessed with MMIO, the ELE could only be accessed with ELE API. Currently the ELE API is not ready, so NULL function callback is used, but it was tested with downstream ELE API. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Message-ID: <20230611140330.154222-22-srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: brcm_nvram: add .read_post_process() for MACsRafał Miłecki2023-06-151-0/+1
| | | | | | | | | | 1. Parse ASCII MAC format into byte based 2. Calculate relative addresses based on index argument Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Message-ID: <20230611140330.154222-5-srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: u-boot-env: post-process "ethaddr" env variableRafał Miłecki2023-04-051-0/+1
| | | | | | | | | | | | U-Boot environment variables are stored in ASCII format so "ethaddr" requires parsing into binary to make it work with Ethernet interfaces. This includes support for indexes to support #nvmem-cell-cells = <1>. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230404172148.82422-36-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: core: introduce NVMEM layoutsMichael Walle2023-04-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | NVMEM layouts are used to generate NVMEM cells during runtime. Think of an EEPROM with a well-defined conent. For now, the content can be described by a device tree or a board file. But this only works if the offsets and lengths are static and don't change. One could also argue that putting the layout of the EEPROM in the device tree is the wrong place. Instead, the device tree should just have a specific compatible string. Right now there are two use cases: (1) The NVMEM cell needs special processing. E.g. if it only specifies a base MAC address offset and you need to add an offset, or it needs to parse a MAC from ASCII format or some proprietary format. (Post processing of cells is added in a later commit). (2) u-boot environment parsing. The cells don't have a particular offset but it needs parsing the content to determine the offsets and length. Co-developed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230404172148.82422-14-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: xilinx: zynqmp: make modularNick Alcock2023-04-051-1/+1
| | | | | | | | | | | | | | | | | | This driver has a MODULE_LICENSE but is not tristate so cannot be built as a module, unlike all its peers: make it modular to match. Signed-off-by: Nick Alcock <nick.alcock@oracle.com> Suggested-by: Michal Simek <michal.simek@amd.com> Cc: Luis Chamberlain <mcgrof@kernel.org> Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230404172148.82422-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: stm32: fix OPTEE dependencyArnd Bergmann2023-02-061-3/+2
| | | | | | | | | | | | | | | | | | | The stm32 nvmem driver fails to link as built-in when OPTEE is a loadable module: aarch64-linux-ld: drivers/nvmem/stm32-bsec-optee-ta.o: in function `stm32_bsec: stm32-bsec-optee-ta.c:(.text+0xc8): undefined reference to `tee_client_open_session' aarch64-linux-ld: drivers/nvmem/stm32-bsec-optee-ta.o: in function `stm32_bsec: stm32-bsec-optee-ta.c:(.text+0x1fc): undefined reference to `tee_client_open_context' Change the CONFIG_NVMEM_STM32_ROMEM definition so it can only be built-in if OPTEE is either built-in or disabled, and make NVMEM_STM32_BSEC_OPTEE_TA a hidden symbol instead. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230206134356.839737-23-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: stm32: add OP-TEE support for STM32MP13xPatrick Delaunay2023-02-061-0/+11
| | | | | | | | | | | | | | | | For boot with OP-TEE on STM32MP13, the communication with the secure world no more use STMicroelectronics SMC but communication with the STM32MP BSEC TA, for data access (read/write) or lock operation: - all the request are sent to OP-TEE trusted application, - for upper OTP with ECC protection and with word programming only each OTP are permanently locked when programmed to avoid ECC error on the second write operation Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230206134356.839737-18-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Kconfig: Fix spelling mistake "controlls" -> "controls"Colin Ian King2022-11-231-1/+1
| | | | | | | | | There is a spelling mistake in a Kconfig description. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20221118063932.6418-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: lan9662-otp: add supportHoratiu Vultur2022-09-241-0/+8
| | | | | | | | | | | | Add support for OTP controller available on LAN9662. The OTPC controls the access to a non-volatile memory. The size of the memory is 8KB. The OTPC can access the memory based on an offset. Implement both the read and the write functionality. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220916122100.170016-13-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: sort config symbols alphabeticallyRafał Miłecki2022-09-241-149/+151
| | | | | | | | | | | | | 1. Match what most subsystems do 2. Simplify maintenance a bit 3. Reduce amount of conflicts for new drivers patches While at it unify indent level in Makefile. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220916122100.170016-9-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: prefix all symbols with NVMEM_Rafał Miłecki2022-09-241-12/+12
| | | | | | | | | | | This unifies all NVMEM symbols. They follow one style now. Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220916122100.170016-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add driver handling U-Boot environment variablesRafał Miłecki2022-09-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | U-Boot stores its setup as environment variables. It's a list of key-value pairs stored on flash device with a custom header. This commit adds an NVMEM driver that: 1. Provides NVMEM access to environment vars binary data 2. Extracts variables as NVMEM cells Current Linux's NVMEM sysfs API allows reading whole NVMEM data block. It can be used by user-space tools for reading U-Boot env vars block without the hassle of finding its location. Parsing will still need to be re-done there. Kernel-parsed NVMEM cells can be read however by Linux drivers. This may be useful for Ethernet drivers for reading device MAC address which is often stored as U-Boot env variable. Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220916122100.170016-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: microchip-otpc: add supportClaudiu Beznea2022-07-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Microchip OTP controller available on SAMA7G5. The OTPC controls the access to a non-volatile memory. The memory behind OTPC is organized into packets, packets are composed by a fixed length header (4 bytes long) and a variable length payload (payload length is available in the header). When software request the data at an offset in memory the OTPC will return (via header + data registers) the whole packet that has a word at that offset. For the OTP memory layout like below: offset OTP Memory layout . . . ... . . . 0x0E +-----------+ <--- packet X | header X | 0x12 +-----------+ | payload X | 0x16 | | | | 0x1A | | +-----------+ . . . ... . . . if user requests data at address 0x16 the data started at 0x0E will be returned by controller. User will be able to fetch the whole packet starting at 0x0E (or parts of the packet) via proper registers. The same packet will be returned if software request the data at offset 0x0E or 0x12 or 0x1A. The OTP will be populated by Microchip with at least 2 packets first one being boot configuration packet and the 2nd one being temperature calibration packet. The packet order will be preserved b/w different chip revisions but the packet sizes may change. For the above reasons and to keep the same software able to work on all chip variants the read function of the driver is working with a packet id instead of an offset in OTP memory. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220706100627.6534-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: sfp: Use regmapSean Anderson2022-05-091-0/+1
| | | | | | | | | | | | This converts the SFP driver to use regmap. This will allow easily supporting devices with different endians. We disallow byte-level access, as regmap_bulk_read doesn't support it (and it's unclear what the correct result would be when we have an endianness difference). Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220429162701.2222-16-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add Apple eFuse driverSven Peter2022-05-091-0/+12
| | | | | | | | | | | Apple SoCs contain eFuses used to store factory-programmed data such as calibration values for the PCIe or the Type-C PHY. They are organized as 32bit values exposed as MMIO. Signed-off-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220429162701.2222-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add driver for OCOTP in Sunplus SP7021Vincent Shih2022-02-251-0/+12
| | | | | | | | | Add driver for OCOTP in Sunplus SP7021 Signed-off-by: Vincent Shih <vincent.sunplus@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220223223502.29454-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add driver for Layerscape SFP (Security Fuse Processor)Michael Walle2022-02-211-0/+12
| | | | | | | | | | Add support for the Security Fuse Processor found on Layerscape SoCs. This driver implements basic read access. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220220151527.17216-10-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: NVMEM_NINTENDO_OTP should depend on WIIGeert Uytterhoeven2021-09-211-0/+1
| | | | | | | | | | | | | The Nintendo Wii and Wii U OTP is only present on Nintendo Wii and Wii U consoles. Hence add a dependency on WII, to prevent asking the user about this driver when configuring a kernel without Nintendo Wii and Wii U console support. Fixes: 3683b761fe3a10ad ("nvmem: nintendo-otp: Add new driver for the Wii and Wii U OTP") Reviewed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/01318920709dddc4d85fe895e2083ca0eee234d8.1631611652.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: nintendo-otp: Add new driver for the Wii and Wii U OTPEmmanuel Gil Peyrot2021-08-131-0/+11
| | | | | | | | | | | | | | | | | | | | | This OTP is read-only and contains various keys used by the console to decrypt, encrypt or verify various pieces of storage. Its size depends on the console, it is 128 bytes on the Wii and 1024 bytes on the Wii U (split into eight 128 bytes banks). It can be used directly by writing into one register and reading from the other one, without any additional synchronisation. This driver was written based on reversed documentation, see: https://wiiubrew.org/wiki/Hardware/OTP Tested-by: Jonathan Neuschäfer <j.ne@posteo.net> # on Wii Tested-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> # on Wii U Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210810153036.1494-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: rmem: fix undefined reference to memremapSrinivas Kandagatla2021-04-021-0/+1
| | | | | | | | | | | | | Fix below error reporte by kernel test robot rmem.c:(.text+0x14e): undefined reference to memremap s390x-linux-gnu-ld: rmem.c:(.text+0x1b6): undefined reference to memunmap Fixes: 5a3fa75a4d9c ("nvmem: Add driver to expose reserved memory as nvmem") Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210330111241.19401-9-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: brcm_nvram: new driver exposing Broadcom's NVRAMRafał Miłecki2021-04-021-0/+9
| | | | | | | | | This driver provides access to Broadcom's NVRAM. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210330111241.19401-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Kconfig: Correct typo in NVMEM_RMEMNicolas Saenz Julienne2021-02-051-1/+1
| | | | | | | | | | | s/drivers/driver/ as the configuration selects a single driver. Suggested-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210205100853.32372-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add driver to expose reserved memory as nvmemNicolas Saenz Julienne2021-02-041-0/+8
| | | | | | | | | | | | | | | | | Firmware/co-processors might use reserved memory areas in order to pass data stemming from an nvmem device otherwise non accessible to Linux. For example an EEPROM memory only physically accessible to firmware, or data only accessible early at boot time. In order to expose this data to other drivers and user-space, the driver models the reserved memory area as an nvmem device. Tested-by: Tim Gover <tim.gover@raspberrypi.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210129171430.11328-5-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: update Kconfig descriptionMatteo Croce2020-07-291-3/+0
| | | | | | | | | | nvmem can't be built as module anymore, update its Kconfig description. Fixes: 2a37ce25d9f2 ("nvmem: disallow modular CONFIG_NVMEM") Signed-off-by: Matteo Croce <mcroce@microsoft.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200722100705.7772-13-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add driver for JZ4780 efusePrasannaKumar Muralidharan2020-03-191-0/+12
| | | | | | | | | | | | | | | | | | This patch brings support for the JZ4780 efuse. Currently it only exposes a read only access to the entire 8K bits efuse memory and nvmem cells. To fetch for example the MAC address: dd if=/sys/devices/platform/134100d0.efuse/jz4780-efuse0/nvmem bs=1 skip=34 count=6 status=none | xxd Tested-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Signed-off-by: Mathieu Malaterre <malat@debian.org> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200310132257.23358-13-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add QTI SDAM driverAnirudh Ghayal2020-01-161-0/+8
| | | | | | | | | | | | | | | QTI SDAM driver allows PMIC peripherals to access the shared memory that is available on QTI PMICs. Use subsys_initcall as PMIC SDAM NV memory is accessed by multiple PMIC drivers (charger, fuel gauge) to store/restore data across reboots required during their initialization. Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org> Signed-off-by: Shyam Kumar Thella <sthella@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200116161100.30637-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add Rockchip OTP driverFinley Xiao2019-11-051-0/+11
| | | | | | | | | | | | | Newer Rockchip socs like the px30 use a different one-time-programmable memory controller for things like cpu-id and leakage information, so add the necessary driver for it. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> [ported from vendor 4.4, converted to clock-bulk API and cleanups] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-11-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: scu: fix dependency in KconfigSrinivas Kandagatla2019-11-051-0/+1
| | | | | | | | | | Fix below error by adding HAVE_ARM_SMCCC dependency in Kconfig ERROR: "__arm_smccc_smc" [drivers/nvmem/nvmem-imx-ocotp-scu.ko] undefined! Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-9-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: sprd: Add Spreadtrum SoCs eFuse supportFreeman Liu2019-11-051-0/+11
| | | | | | | | | | | | The Spreadtrum eFuse controller is widely used to dump chip ID, configuration setting, function select and so on, as well as supporting one-time programming. Signed-off-by: Freeman Liu <freeman.liu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Broaden the selection of NVMEM_SNVS_LPGPRFabio Estevam2019-06-191-1/+1
| | | | | | | | | | | | | | The SNVS LPGR IP block is also found on other i.MX SoCs that are not covered by the current SOC_IMX6 || SOC_IMX7D logic. One example is the i.MX7ULP. To avoid keep expanding the SoC logic selection, make it broader by using the more generic ARCH_MXC symbol instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: add i.MX8 nvmem driverPeng Fan2019-06-191-0/+7
| | | | | | | | | | | | | | | | | This patch adds i.MX8 nvmem ocotp driver to access fuse via RPC to i.MX8 system controller. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
| | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: core: add NVMEM_SYSFS KconfigSrinivas Kandagatla2019-04-251-0/+10
| | | | | | | | | | | | | | | | | | | Many nvmem providers are not very keen on having default sysfs nvmem entry, as most of the usecases for them are inside kernel itself. And in some cases read/writes to some areas in nvmem are restricted and trapped at secure monitor level, so accessing them from userspace would result in board reboots. This patch adds new NVMEM_SYSFS Kconfig to make binary sysfs entry an optional one. This provision will give more flexibility to users. This patch also moves existing sysfs code to a new file so that its not compiled in when its not really required. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Gaurav Kohli <gkohli@codeaurora.org> Tested-by: Gaurav Kohli <gkohli@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add driver for STM32 factory-programmed read only memFabrice Gasnier2019-04-251-0/+10
| | | | | | | | | Add a read only nvmem driver for STM32 factory-programmed memory area (on-chip non-volatile storage). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: broaden Kconfig dependencyLucas Stach2019-04-251-2/+2
| | | | | | | | | | | | The i.MX OCOTP controller is used in numerous Freescale/NXP SoCs from the MXC family, so the strict dependency on the i.MX6 SoC is too narrow. Broaden it to cover all the MXC familiy members. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'char-misc-5.1-rc1' of ↵Linus Torvalds2019-03-061-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver patch pull request for 5.1-rc1. The largest thing by far is the new habanalabs driver for their AI accelerator chip. For now it is in the drivers/misc directory but will probably move to a new directory soon along with other drivers of this type. Other than that, just the usual set of individual driver updates and fixes. There's an "odd" merge in here from the DRM tree that they asked me to do as the MEI driver is starting to interact with the i915 driver, and it needed some coordination. All of those patches have been properly acked by the relevant subsystem maintainers. All of these have been in linux-next with no reported issues, most for quite some time" * tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits) habanalabs: adjust Kconfig to fix build errors habanalabs: use %px instead of %p in error print habanalabs: use do_div for 64-bit divisions intel_th: gth: Fix an off-by-one in output unassigning habanalabs: fix little-endian<->cpu conversion warnings habanalabs: use NULL to initialize array of pointers habanalabs: fix little-endian<->cpu conversion warnings habanalabs: soft-reset device if context-switch fails habanalabs: print pointer using %p habanalabs: fix memory leak with CBs with unaligned size habanalabs: return correct error code on MMU mapping failure habanalabs: add comments in uapi/misc/habanalabs.h habanalabs: extend QMAN0 job timeout habanalabs: set DMA0 completion to SOB 1007 habanalabs: fix validation of WREG32 to DMA completion habanalabs: fix mmu cache registers init habanalabs: disable CPU access on timeouts habanalabs: add MMU DRAM default page mapping habanalabs: Dissociate RAZWI info from event types misc/habanalabs: adjust Kconfig to fix build errors ...
| * nvmem: allow to select i.MX nvmem driver for i.MX 7DStefan Agner2019-02-031-1/+1
| | | | | | | | | | | | | | | | | | | | The imx-ocotp nvmem driver supports the i.MX 7D SoC too. Allow to select the imx-ocotp driver even if only the i.MX 7D SoC has been selected. Fixes: 711d45477931 ("nvmem: octop: Add i.MX7D support") Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | nvmem: zynqmp: Added zynqmp nvmem firmware driverNava kishore Manne2019-02-051-0/+10
|/ | | | | | | | | This patch adds zynqmp nvmem firmware driver to access the SoC revision information from the hardware register. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nvmem: Add Spreadtrum SC27XX efuse supportFreeman Liu2018-07-151-0/+11
| | | | | | | | | | | This patch add the efuse driver which is embeded in Spreadtrum SC27XX series PMICs. The sc27xx efuse contains 32 blocks and each block's data width is 16 bits. Signed-off-by: Freeman Liu <freeman.liu@spreadtrum.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add RAVE SP EEPROM driverAndrey Smirnov2018-05-141-0/+6
| | | | | | | | | | | | | Add driver providing access to EEPROMs connected to RAVE SP devices Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Aleksander Morgado <aleksander@aleksander.es> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'char-misc-4.17-rc1' of ↵Linus Torvalds2018-04-041-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc updates from Greg KH: "Here is the big set of char/misc driver patches for 4.17-rc1. There are a lot of little things in here, nothing huge, but all important to the different hardware types involved: - thunderbolt driver updates - parport updates (people still care...) - nvmem driver updates - mei updates (as always) - hwtracing driver updates - hyperv driver updates - extcon driver updates - ... and a handful of even smaller driver subsystem and individual driver updates All of these have been in linux-next with no reported issues" * tag 'char-misc-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (149 commits) hwtracing: Add HW tracing support menu intel_th: Add ACPI glue layer intel_th: Allow forcing host mode through drvdata intel_th: Pick up irq number from resources intel_th: Don't touch switch routing in host mode intel_th: Use correct method of finding hub intel_th: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate stm class: Make dummy's master/channel ranges configurable stm class: Add SPDX GPL-2.0 header to replace GPLv2 boilerplate MAINTAINERS: Bestow upon myself the care for drivers/hwtracing hv: add SPDX license id to Kconfig hv: add SPDX license to trace Drivers: hv: vmbus: do not mark HV_PCIE as perf_device Drivers: hv: vmbus: respect what we get from hv_get_synint_state() /dev/mem: Avoid overwriting "err" in read_mem() eeprom: at24: use SPDX identifier instead of GPL boiler-plate eeprom: at24: simplify the i2c functionality checking eeprom: at24: fix a line break eeprom: at24: tweak newlines eeprom: at24: refactor at24_probe() ...
| * nvmem: add i.MX7 support to snvs-lpgprAndrey Yurovsky2018-03-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | The i.MX7 family has similar SNVS hardware so make the snvs-lpgpr support it along with the i.MX6 family. The register interface is the same except for the number and offset of the general purpose registers. Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | nvmem: disallow modular CONFIG_NVMEMArnd Bergmann2018-04-041-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new of_get_nvmem_mac_address() helper function causes a link error with CONFIG_NVMEM=m: drivers/of/of_net.o: In function `of_get_nvmem_mac_address': of_net.c:(.text+0x168): undefined reference to `of_nvmem_cell_get' of_net.c:(.text+0x19c): undefined reference to `nvmem_cell_read' of_net.c:(.text+0x1a8): undefined reference to `nvmem_cell_put' I could not come up with a good solution for this, as the code is always built-in. Using an #if IS_REACHABLE() check around it would solve the link time issue but then stop it from working in that configuration. Making of_nvmem_cell_get() an inline function could also solve that, but seems a bit ugly since it's somewhat larger than most inline functions, and it would just bring that problem into the callers. Splitting the function into a separate file might be an alternative. This uses the big hammer by making CONFIG_NVMEM itself a 'bool' symbol, which avoids the problem entirely but makes the vmlinux larger for anyone that might use NVMEM support but doesn't need it built-in otherwise. Fixes: 9217e566bdee ("of_net: Implement of_get_nvmem_mac_address helper") Cc: Mike Looijmans <mike.looijmans@topic.nl> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: netdev@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Mike Looijmans Signed-off-by: David S. Miller <davem@davemloft.net>
* nvmem: uniphier: add UniPhier eFuse driverKeiji Hayashibara2017-11-081-0/+11
| | | | | | | | | | Add eFuse driver for Socionext UniPhier series SoC. Note that eFuse device is under soc-glue and this register implements as read only. Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add a driver for the Amlogic Meson6/Meson8/Meson8b SoCsMartin Blumenstingl2017-10-201-0/+10
| | | | | | | | | | | | | | | | | | | | This adds a driver to access the efuse on Amlogic Meson6, Meson8 and Meson8b SoCs. These SoCs are accessing the efuse IP block directly through the registers in the "secbus" region. This makes it different from the Meson GX efuse driver which uses the "secure monitor" firmware to access the efuse. The efuse on Meson6 can only read one byte at a time, while the efuse on Meson8 and Meson8b always reads 4 bytes at a time. The new driver supports both, but due to lack of hardware Meson6 support was not tested. The hardware also supports writing. However, this is currently not supported by the driver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: meson-efuse: indicate that this driver is only for Meson GX SoCsMartin Blumenstingl2017-10-201-2/+2
| | | | | | | | | | | | The current Amlogic Meson eFuse driver only supports the 64-bit SoCs (GXBB and newer). Older SoCs cannot be supported by the same driver because they do not use the meson secure monitor firmware to access the hardware. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add snvs_lpgpr driverOleksij Rempel2017-10-041-0/+10
| | | | | | | | | | | | | | | This is a driver for Low Power General Purpose Register (LPGPR) available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS) of this chip. It is a 32-bit read/write register located in the low power domain. Since LPGPR is located in the battery-backed power domain, LPGPR can be used by any application for retaining data during an SoC power-down mode. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add driver for the i.MX IIMMichael Grzeschik2017-04-081-0/+11
| | | | | | | | | | | | | | | | | | This adds a readonly nvmem driver for the i.MX IC Identification Module (IIM). The IIM is found on the older i.MX SoCs like the i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and the i.MX53. The IIM can control up to 8 fuse banks with 256 bit each. Not all of the banks are equipped on the different SoCs. The actual number of fuses differ from 512 on the i.MX27 and 1152 on the i.MX53. The fuses are one time writable, but writing is currently not supported in the driver. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: Add the Broadcom OTP controller driverJonathan Richardson2016-11-101-0/+12
| | | | | | | | | | | | | | Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP controller. These controllers are used on SoC's such as Cygnus and Stingray. Reviewed-by: Ray Jui <ray.jui@broadcom.com> Tested-by: Jonathan Richardson <jonathan.richardson@broadcom.com> Signed-off-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Oza Pawandeep <oza@broadcom.com> Signed-off-by: Jonathan Richardson <jonathan.richardson@broadcom.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: add NXP LPC18xx OTP driverJoachim Eastwood2016-11-101-0/+10
| | | | | | | | | | | | | | | Add simple read only driver for the internal OTP (One Time Programmable) memory found on all NXP LPC18xx and LPC43xx devices. The OTP memory is split into 4 banks each with 4 32-bits word. Some of the banks contain predefined data while others are for general purpose and user programmable via the OTP API in ROM. Note that writing to the OTP memory is not yet supported. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Tested-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-09 11:13:05 +0000