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path: root/drivers/nvmem/imx-ocotp.c
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* nvmem: imx-ocotp: add support for the unaliged word countPeng Fan2020-11-271-6/+24
| | | | | | | | | | | | | When offset is not 4 bytes aligned, directly shift righty by 2 bits will cause reading out wrong data. Since imx ocotp only supports 4 bytes reading once, we need handle offset is not 4 bytes aligned and enlarge the bytes to 4 bytes aligned. After reading finished, copy the needed data from buffer to caller and free buffer. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20201127102837.19366-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Improve logic to save many code linesAnson Huang2020-05-151-7/+2
| | | | | | | | | | | | | Several logic improvements to save many code lines: - no need to use goto; - no need to assign return value; - combine different conditions of return value into one line. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200511145042.31223-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Drop unnecessary initializationsAnson Huang2020-03-191-4/+4
| | | | | | | | | Drop unnecessary initialization of variable 'clk_rate' and 'timing'. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200310132257.23358-11-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: ocotp: add i.MX8MP supportPeng Fan2020-03-191-0/+21
| | | | | | | | | | i.MX8MP has 96 banks with each bank 4 words. And it has different ctrl register layout, so add new macros for that. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200310132257.23358-2-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx: ocotp: introduce ocotp_ctrl_regPeng Fan2020-01-101-22/+57
| | | | | | | | | | | | | | Introduce ocotp_ctrl_reg to include the low 16bits mask of CTRL register. i.MX chips will have different layout of the low 16bits of CTRL register, so use ocotp_ctrl_reg will make it clean to add new chip support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200109104017.6249-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: reset error status on probeLucas Stach2019-11-051-0/+4
| | | | | | | | | | | | If software running before the OCOTP driver is loaded left the controller with the error status pending, the driver will never be able to complete the read timing setup. Reset the error status on probe to make sure the controller is in usable state. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20191029114240.14905-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Add i.MX8MN supportAnson Huang2019-08-181-0/+7
| | | | | | | | | | | i.MX8MN is a new SoC of i.MX8M series, it is similar to i.MX8MM in terms of addressing and clock setup, add support for its fuse read/write. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20190818093345.29647-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: imx8mq is compatible with imx6 not imx7Leonard Crestez2019-06-261-2/+2
| | | | | | | | | | | | | | | | | According to NXP Reference Manuals and uboot/atf sources the OCOTP block on imx8m behaves more like imx6 than imx7. - Fuses can be read/written 32bits at a time (no imx7-like banking) - The OCOTP_HW_OCOTP_TIMING register is like imx6 not imx7 Since nvmem doesn't support uboot-style "sense" and "override" this issue only affected "write" which is very rarely used. Fixes: 163c0dbd0cb1 ("nvmem: imx-ocotp: add support for imx8mq") Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Add i.MX8MM supportBryan O'Donoghue2019-06-261-0/+7
| | | | | | | | | | | | | | | | This patch adds support to burn the fuses on the i.MX8MM. https://www.nxp.com/webapp/Download?colCode=IMX8MMRM The i.MX8MM is similar to i.MX6 processors in terms of addressing and clock setup. The documentation specifies 60 discreet OTP registers but, the fusemap address space encompasses up to 256 registers. We map the entire putative 256 OTP registers. Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Change TIMING calculation to u-boot algorithmBryan O'Donoghue2019-06-261-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The RELAX field of the OCOTP block is turning out as a zero on i.MX8MM. This messes up the subsequent re-load of the fuse shadow registers. After some discussion with people @ NXP its clear we have missed a trick here in Linux. The OCOTP fuse programming time has a physical minimum 'burn time' that is not related to the ipg_clk. We need to define the RELAX, STROBE_READ and STROBE_PROG fields in terms of desired timings to allow for the burn-in to safely complete. Right now only the RELAX field is calculated in terms of an absolute time and we are ending up with a value of zero. This patch inherits the u-boot timings for the OCOTP_TIMING calculation on the i.MX6 and i.MX8. Those timings are known to work and critically specify values such as STROBE_PROG as a minimum timing. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Suggested-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Ensure WAIT bits are preserved when setting timingBryan O'Donoghue2019-06-261-1/+2
| | | | | | | | | | | | | | | | | | | The i.MX6 and i.MX8 both have a bit-field spanning bits 27:22 called the WAIT field. The WAIT field according to the documentation for both parts "specifies time interval between auto read and write access in one time program. It is given in number of ipg_clk periods." This patch ensures that the relevant field is read and written back to the timing register. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Elongate OCOTP_CTRL ADDR field to eight bitsBryan O'Donoghue2019-06-261-1/+1
| | | | | | | | | | | | | | | | | | | i.MX6 defines OCOTP_CTRLn:ADDR as seven bit address-field with a one bit RSVD0 field, i.MX7 defines OCOTP_CTRLn:ADDR as a four bit address-field with a four bit RSVD0 field. i.MX8 defines the OCOTP_CTRLn:ADDR bit-field as a full range eight bits. i.MX6 and i.MX7 should return zero for their respective RSVD0 bits and ignore a write-back of zero where i.MX8 will make use of the full range. This patch expands the bit-field definition for all users to eight bits, which is safe due to RSVD0 being a no-op for the i.MX6 and i.MX7. Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 460Thomas Gleixner2019-06-191-7/+1
| | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation http www opensource org licenses gpl license html http www gnu org copyleft gpl html extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 3 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081201.897982733@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: use devm_platform_ioremap_resource() to simplify codeAnson Huang2019-04-251-3/+1
| | | | | | | | | | | Use the new helper devm_platform_ioremap_resource() which wraps the platform_get_resource() and devm_ioremap_resource() together, to simplify the code. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: add support for imx8mqLucas Stach2019-04-251-0/+7
| | | | | | | | | | The i.MX8MQ uses the same OCOTP block as the i.MX7D, but with fourfold increase in fuse banks. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Implement i.MX6ULL/ULZ supportStefan Wahren2019-01-311-0/+7
| | | | | | | | | In comparision to the i.MX6UL the lower cost variants i.MX6ULL/ULZ only supports 8 OTP banks a 8 words. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: add i.MX7ULP supportAnson Huang2019-01-311-0/+6
| | | | | | | | | i.MX7ULP is a new SoC of i.MX family which has 8 kbit eFuse OTP, enable ocotp driver support for this SoC. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: add support for imx6sllAnson Huang2018-07-151-0/+7
| | | | | | | | | i.MX6SLL is a new SoC of i.MX6 family, enable ocotp driver support for this SoC. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: remove unused dead codeDong Aisheng2018-03-141-2/+0
| | | | | | | | | | | remove unused dead code Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Convert to use devm_nvmem_register()Andrey Smirnov2018-03-141-14/+2
| | | | | | | | | | | | | | | | | | | | | Drop all of the code related to .remove hook and make use of devm_nvmem_register() instead. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: cphealy@gmail.com Cc: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Cc: linux-rockchip@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Update module descriptionBryan O'Donoghue2017-11-081-1/+1
| | | | | | | | | | | This imx-ocotp driver encapsulates support for a subset of both i.MX6 and i.MX7 processors. Update the module description to reflect. Fixes: 711d45477931 ("nvmem: octop: Add i.MX7D support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Enable i.MX7D OTP write supportBryan O'Donoghue2017-11-081-2/+0
| | | | | | | | | | | After applying patches for both banked access and write timings we can re-enable the OTP write interface on i.MX7D processors. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Add i.MX7D timing write clock setup supportBryan O'Donoghue2017-11-081-7/+36
| | | | | | | | | | | This patch adds logic to correctly setup the write timing parameters when blowing an OTP fuse for the i.MX7S/D. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Move i.MX6 write clock setup to dedicated functionBryan O'Donoghue2017-11-081-20/+27
| | | | | | | | | | | | | The i.MX7S/D has a different set of timing requirements, as a pre-cursor to adding the i.MX7 timing parameters, move the i.MX6 stuff to a dedicated function. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Add support for banked OTP addressingBryan O'Donoghue2017-11-081-4/+64
| | | | | | | | | | | | | | The i.MX7S/D takes the bank address in the CTRLn.ADDR field and the data value in one of the DATAx {0, 1, 2, 3} register fields. The current write routine is based on writing the CTRLn.ADDR field and writing a single DATA register only. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Pass parameters via a structBryan O'Donoghue2017-11-081-10/+34
| | | | | | | | | | | | It will be useful in later patches to know the register access mode and bit-shift to apply to a given input offset. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Restrict OTP write to IMX6 processorsBryan O'Donoghue2017-11-081-0/+2
| | | | | | | | | | | | | | | | i.MX7S/D have a different scheme for addressing the OTP registers inside the OCOTP block. Currently it's possible to address the wrong OTP registers given the disparity between IMX6 and IMX7 OTP addressing. Since OTP programming is one-time destructive its important we restrict this interface ASAP. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: set nvmem->owner to nvmem->dev->driver->owner if unsetMasahiro Yamada2017-11-081-1/+0
| | | | | | | | | | | | | | | All nvmem drivers are supposed to set the owner field of struct nvmem_config, but this matches nvmem->dev->driver->owner. As far as I see in drivers/nvmem/ directory, all the drivers are the case. So, make nvmem_register() set the nvmem's owner to the associated driver's owner unless nvmem_config sets otherwise. Remove .owner settings in the drivers that are now redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: add write supportRichard Leitner2017-04-081-2/+208
| | | | | | | | | | Implement write routine for OCOTP controller found in i.MX6 SoC's. Furthermore add locking to the read function to prevent race conditions. The write routine code is based on the fsl_otp driver from Freescale. Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: clear error bit after reading locked valuesRichard Leitner2017-04-081-3/+38
| | | | | | | | | | | | When reading a "read locked" value from the OCOTP controller on i.MX6 SoC's an error bit is set. This bit has to be cleared by software before any new write, read or reload access can be issued. Therefore clear it after we detect such an "locked read". Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: octop: Add i.MX7D supportPeng Fan2017-04-081-0/+1
| | | | | | | | | | | | Add i.MX7D support. There is 16 banks, each bank 4 words. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: fix usage of "dev" pointersRichard Leitner2017-04-081-1/+3
| | | | | | | | | | Assign the correct dev pointer to struct ocotp_priv during probe. This is needed to display dev_* messages correctly. Furthermore harmonize the usage of dev (instead of &pdev->dev) in the probe function. Signed-off-by: Richard Leitner <richard.leitner@skidata.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: octop: Add support for imx6ulBai Ping2017-01-251-0/+1
| | | | | | | | | i.MX6UL is an new SOC of i.MX6 family. Enable ocotp driver support for this SOC. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Fix wrong register sizeDaniel Schultz2017-01-041-1/+1
| | | | | | | | | | | | | | | | | | | | | All i.MX6 SoCs have an OCOTP Controller with 4kbit fuses. The i.MX6SL is an exception and has only 2kbit fuses. In the TRM for the i.MX6DQ (IMX6QDRM - Rev 2, 06/2014) the fuses size is described in chapter 46.1.1 with: "32-bit word restricted program and read to 4Kbits of eFuse OTP(512x8)." In the TRM for the i.MX6SL (IMX6SLRM - Rev 2, 06/2015) the fuses size is described in chapter 34.1.1 with: "32-bit word restricted program and read to 2 kbit of eFuse OTP(128x8)." Since the Freescale Linux kernel OCOTP driver works with a fuses size of 2 kbit for the i.MX6SL, it looks like the TRM is wrong and the formula to calculate the correct fuses size has to be 256x8. Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Fix assignment warning.Srinivas Kandagatla2016-06-251-1/+1
| | | | | | | | | | | | This patch fixes below error if the driver is compiled with 64 bit machine configuration. "drivers/nvmem/imx-ocotp.c:102:14: warning: assignment makes integer from pointer without a cast" Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: handling clockPeng Fan2016-06-251-1/+14
| | | | | | | | | | | | | | | | | Before access ocotp nvmem area, the clock should be enabled. Or, `hexdump nvmem` will hang the system. So, use such flow: " 1. clock_enable_prepare 2. read nvmem ocotp area 3. clock_disable_unprepare " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: remove nvmem regmap dependencySrinivas Kandagatla2016-05-011-44/+11
| | | | | | | | This patch moves to nvmem support in the driver to use callback instead of regmap. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Fix return value of imx_ocotp_readAxel Lin2016-03-051-1/+1
| | | | | | | | imx_ocotp_read() should return 0 on success. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* nvmem: imx-ocotp: Add i.MX6 OCOTP driverPhilipp Zabel2015-10-041-0/+154
This driver handles the i.MX On-Chip OTP Controller found in i.MX6Q/D, i.MX6S/DL, i.MX6SL, and i.MX6SX SoCs. Currently it just returns the values stored in the shadow registers. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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