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* PCI: thunder-pem: Fix legacy firmware PEM-specific resourcesTomasz Nowicki2017-04-031-2/+8
| | | | | | | | | | | | | | | | | | SZ_16M PEM resource size includes PEM-specific register and its children resources. Reservation of the whole SZ_16M range leads to child device driver failure when pcieport driver is requesting resources: pcieport 0004:1f:00.0: can't enable device: BAR 0 [mem 0x87e0c0f00000-0x87e0c0ffffff 64bit] not claimed So we cannot reserve full 16M here and instead we want to reserve PEM-specific register only which is SZ_64K. At the end increase PEM resource to SZ_16M since this is what thunder_pem_init() call expects for proper initialization. Fixes: 9abb27c7594a ("PCI: thunder-pem: Add legacy firmware support for Cavium ThunderX host controller") Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.10+
* PCI: thunder-pem: Add legacy firmware support for Cavium ThunderX host ↵Tomasz Nowicki2017-03-231-2/+54
| | | | | | | | | | | | | | | | | | | controller During early days of PCI quirks support, ThunderX firmware did not provide PNP0c02 node with PCI configuration space and PEM-specific register ranges. This means that for legacy FW we are not reserving these resources and cannot gather PEM-specific resources for further PEM initialization. To support already deployed legacy FW, calculate PEM-specific ranges and provide resources reservation as fallback scenario into PEM driver when we could not gather PEM reg base from ACPI tables. Tested-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Vadim Lomovtsev <Vadim.Lomovtsev@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Robert Richter <rrichter@cavium.com> CC: stable@vger.kernel.org # v4.10+
* PCI: thunder-pem: Use Cavium assigned hardware ID for ThunderX host controllerTomasz Nowicki2017-03-231-1/+1
| | | | | | | | | | | "CAV" is the only PNP/ACPI hardware ID vendor prefix assigned to Cavium so fix this as it should be from day one. Fixes: 44f22bd91e88 ("PCI: Add MCFG quirks for Cavium ThunderX pass2.x host controller") Tested-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Tomasz Nowicki <tn@semihalf.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Robert Richter <rrichter@cavium.com> CC: stable@vger.kernel.org # v4.10+
* PCI: iproc: Save host bridge window resource in struct iproc_pcieBjorn Helgaas2017-03-093-21/+23
| | | | | | | | | | | | | | | | | | The host bridge memory window resource is inserted into the iomem_resource tree and cannot be deallocated until the host bridge itself is removed. Previously, the window was on the stack, which meant the iomem_resource entry pointed into the stack and was corrupted as soon as the probe function returned, which caused memory corruption and errors like this: pcie_iproc_bcma bcma0:8: resource collision: [mem 0x40000000-0x47ffffff] conflicts with PCIe MEM space [mem 0x40000000-0x47ffffff] Move the memory window resource from the stack into struct iproc_pcie so its lifetime matches that of the host bridge. Fixes: c3245a566400 ("PCI: iproc: Request host bridge window resources") Reported-and-tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.8+
* Merge tag 'pci-v4.11-fixes-1' of ↵Linus Torvalds2017-03-031-3/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - fix NULL pointer dereferences in many DesignWare-based drivers due to refactoring error - fix Altera config write breakage due to my refactoring error * tag 'pci-v4.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: altera: Fix TLP_CFG_DW0 for TLP write PCI: dwc: Fix crashes seen due to missing assignments
| * PCI: altera: Fix TLP_CFG_DW0 for TLP writeLey Foon Tan2017-02-281-3/+7
| | | | | | | | | | | | | | | | | | | | | | eb5767122feb ("PCI: altera: Simplify TLB_CFG_DW0 usage") used TLP_FMTTYPE_CFGRD* (instead of TLP_FMTTYPE_CFGWR*) for TLP writes, which causes writing to configuration space to fail. Fix it by using correct FMTTYPE for write operation. Fixes: eb5767122feb ("PCI: altera: Simplify TLB_CFG_DW0 usage") Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.9+
* | Merge tag 'for-next-dma_ops' of ↵Linus Torvalds2017-02-251-1/+1
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma Pull rdma DMA mapping updates from Doug Ledford: "Drop IB DMA mapping code and use core DMA code instead. Bart Van Assche noted that the ib DMA mapping code was significantly similar enough to the core DMA mapping code that with a few changes it was possible to remove the IB DMA mapping code entirely and switch the RDMA stack to use the core DMA mapping code. This resulted in a nice set of cleanups, but touched the entire tree and has been kept separate for that reason." * tag 'for-next-dma_ops' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: (37 commits) IB/rxe, IB/rdmavt: Use dma_virt_ops instead of duplicating it IB/core: Remove ib_device.dma_device nvme-rdma: Switch from dma_device to dev.parent RDS: net: Switch from dma_device to dev.parent IB/srpt: Modify a debug statement IB/srp: Switch from dma_device to dev.parent IB/iser: Switch from dma_device to dev.parent IB/IPoIB: Switch from dma_device to dev.parent IB/rxe: Switch from dma_device to dev.parent IB/vmw_pvrdma: Switch from dma_device to dev.parent IB/usnic: Switch from dma_device to dev.parent IB/qib: Switch from dma_device to dev.parent IB/qedr: Switch from dma_device to dev.parent IB/ocrdma: Switch from dma_device to dev.parent IB/nes: Remove a superfluous assignment statement IB/mthca: Switch from dma_device to dev.parent IB/mlx5: Switch from dma_device to dev.parent IB/mlx4: Switch from dma_device to dev.parent IB/i40iw: Remove a superfluous assignment statement IB/hns: Switch from dma_device to dev.parent ...
| * treewide: Constify most dma_map_ops structuresBart Van Assche2017-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most dma_map_ops structures are never modified. Constify these structures such that these can be write-protected. This patch has been generated as follows: git grep -l 'struct dma_map_ops' | xargs -d\\n sed -i \ -e 's/struct dma_map_ops/const struct dma_map_ops/g' \ -e 's/const struct dma_map_ops {/struct dma_map_ops {/g' \ -e 's/^const struct dma_map_ops;$/struct dma_map_ops;/' \ -e 's/const const struct dma_map_ops /const struct dma_map_ops /g'; sed -i -e 's/const \(struct dma_map_ops intel_dma_ops\)/\1/' \ $(git grep -l 'struct dma_map_ops intel_dma_ops'); sed -i -e 's/const \(struct dma_map_ops dma_iommu_ops\)/\1/' \ $(git grep -l 'struct dma_map_ops' | grep ^arch/powerpc); sed -i -e '/^struct vmd_dev {$/,/^};$/ s/const \(struct dma_map_ops[[:blank:]]dma_ops;\)/\1/' \ -e '/^static void vmd_setup_dma_ops/,/^}$/ s/const \(struct dma_map_ops \*dest\)/\1/' \ -e 's/const \(struct dma_map_ops \*dest = \&vmd->dma_ops\)/\1/' \ drivers/pci/host/*.c sed -i -e '/^void __init pci_iommu_alloc(void)$/,/^}$/ s/dma_ops->/intel_dma_ops./' arch/ia64/kernel/pci-dma.c sed -i -e 's/static const struct dma_map_ops sn_dma_ops/static struct dma_map_ops sn_dma_ops/' arch/ia64/sn/pci/pci_dma.c sed -i -e 's/(const struct dma_map_ops \*)//' drivers/misc/mic/bus/vop_bus.c Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Juergen Gross <jgross@suse.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Russell King <linux@armlinux.org.uk> Cc: x86@kernel.org Signed-off-by: Doug Ledford <dledford@redhat.com>
* | Merge tag 'pci-v4.11-changes' of ↵Linus Torvalds2017-02-2330-6541/+256
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - add ASPM L1 substate support - enable PCIe Extended Tags when supported - configure PCIe MPS settings on iProc, Versatile, X-Gene, and Xilinx - increase VPD access timeout - add ACS quirks for Intel Union Point, Qualcomm QDF2400 and QDF2432 - use new pci_irq_alloc_vectors() in more drivers - fix MSI affinity memory leak - remove unused MSI interfaces and update documentation - remove unused AER .link_reset() callback - avoid pci_lock / p->pi_lock deadlock seen with perf - serialize sysfs enable/disable num_vfs operations - move DesignWare IP from drivers/pci/host/ to drivers/pci/dwc/ and refactor so we can support both hosts and endpoints - add DT ECAM-like support for HiSilicon Hip06/Hip07 controllers - add Rockchip system power management support - add Thunder-X cn81xx and cn83xx support - add Exynos 5440 PCIe PHY support * tag 'pci-v4.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (93 commits) PCI: dwc: Remove dependency of designware on CONFIG_PCI PCI: dwc: Add CONFIG_PCIE_DW_HOST to enable PCI dwc host PCI: dwc: Split pcie-designware.c into host and core files PCI: dwc: designware: Fix style errors in pcie-designware.c PCI: dwc: designware: Parse "num-lanes" property in dw_pcie_setup_rc() PCI: dwc: all: Split struct pcie_port into host-only and core structures PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init() PCI: dwc: all: Rename cfg_read/cfg_write to read/write PCI: dwc: all: Use platform_set_drvdata() to save private data PCI: dwc: designware: Move register defines to designware header file PCI: dwc: Use PTR_ERR_OR_ZERO to simplify code PCI: dra7xx: Group PHY API invocations PCI: dra7xx: Enable MSI and legacy interrupts simultaneously PCI: dra7xx: Add support to force RC to work in GEN1 mode PCI: dra7xx: Simplify probe code with devm_gpiod_get_optional() PCI: Move DesignWare IP support to new drivers/pci/dwc/ directory PCI: exynos: Support the PHY generic framework Documentation: binding: Modify the exynos5440 PCIe binding phy: phy-exynos-pcie: Add support for Exynos PCIe PHY Documentation: samsung-phy: Add exynos-pcie-phy binding ...
| * \ Merge branch 'pci/host-xilinx' into nextBjorn Helgaas2017-02-212-14/+4
| |\ \ | | | | | | | | | | | | | | | | | | | | * pci/host-xilinx: PCI: xilinx-nwl: Remove mask for messages not supported by AXI PCI: xilinx: Configure PCIe MPS settings
| | * | PCI: xilinx-nwl: Remove mask for messages not supported by AXIBharat Kumar Gogada2017-02-101-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove support for vendor-defined messages which are not supported by AXI. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: xilinx: Configure PCIe MPS settingsBjorn Helgaas2017-02-081-1/+3
| | |/ | | | | | | | | | | | | | | | Make sure PCIe MPS settings are valid when we enumerate a new hierarchy. Based-on-patch-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/host-xgene' into nextBjorn Helgaas2017-02-211-6/+5
| |\ \ | | | | | | | | | | | | | | | | | | | | * pci/host-xgene: PCI: xgene: Configure PCIe MPS settings PCI: xgene: Fix double free on init error
| | * | PCI: xgene: Configure PCIe MPS settingsBjorn Helgaas2017-02-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Make sure PCIe MPS settings are valid when we enumerate a new hierarchy. Based-on-patch-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: xgene: Fix double free on init errorDan Carpenter2017-01-301-5/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "port" variable was allocated with devm_kzalloc() so if we free it with kfree() it will be freed twice. Also I changed it to propogate the error from devm_ioremap_resource() instead of returning -ENOMEM. Fixes: c5d460396100 ("PCI: Add MCFG quirks for X-Gene host controller") Also-posted-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Tanmay Inamdar <tinamdar@apm.com>
| * | Merge branch 'pci/host-versatile' into nextBjorn Helgaas2017-02-211-1/+3
| |\ \ | | | | | | | | | | | | | | | | * pci/host-versatile: PCI: versatile: Configure PCIe MPS settings
| | * | PCI: versatile: Configure PCIe MPS settingsBjorn Helgaas2017-02-081-1/+3
| | |/ | | | | | | | | | | | | | | | Make sure PCIe MPS settings are valid when we enumerate a new hierarchy. Based-on-patch-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/host-thunder' into nextBjorn Helgaas2017-02-211-5/+20
| |\ \ | | | | | | | | | | | | | | | | * pci/host-thunder: PCI: thunder-pem: Add support for cn81xx and cn83xx SoCs
| | * | PCI: thunder-pem: Add support for cn81xx and cn83xx SoCsDavid Daney2017-01-121-5/+20
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci-thunder-pem driver was initially developed for cn88xx SoCs. The cn81xx and cn83xx members of the same family of SoCs have a slightly different configuration of interrupt resources in the PEM hardware, which prevents the INTA legacy interrupt source from functioning with the current driver. There are two fixes required: 1) Don't fixup the PME interrupt on the newer SoCs as it already has the proper value. 2) Report MSI-X Capability Table Size of 2 for the newer SoCs, so the core MSI-X code doesn't inadvertently clobber the INTA machinery that happens to reside immediately following the table. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/host-rockchip' into nextBjorn Helgaas2017-02-211-39/+136
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/host-rockchip: PCI: rockchip: Set vendor ID from local core config space PCI: rockchip: Fix rockchip_pcie_probe() error path to free resource list PCI: rockchip: Mark PM functions as __maybe_unused PCI: rockchip: Use readl_poll_timeout() instead of open-coding it PCI: rockchip: Disable RC's ASPM L0s based on DT "aspm-no-l0s" PCI: rockchip: Add system PM support
| | * | PCI: rockchip: Set vendor ID from local core config spaceShawn Lin2017-02-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TRM says the vendor ID in the RC's configure space can be rewritten and the value must be the same as the value read from the local core configure space. But we misread that and didn't notice it before. Actually we should only able to rewrite it from the local core configure space. Fix that issue to make lspci show the correct IP vendor infomation. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: rockchip: Fix rockchip_pcie_probe() error path to free resource listShawn Lin2017-02-101-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rockchip_pcie_probe() calls of_pci_get_host_bridge_resources() to parse resources from DT and build a resource list. The caller is responsible for disposing of the resource list. This is normally done by pci_release_host_bridge_dev() when the host bridge is removed. If the host bridge probe fails, dispose of the resource list in the probe error path. [bhelgaas: changelog] Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: rockchip: Mark PM functions as __maybe_unusedArnd Bergmann2017-01-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_PM_SLEEP is disabled, we get harmless build warnings: host/pcie-rockchip.c:1267:12: error: 'rockchip_pcie_resume_noirq' defined but not used [-Werror=unused-function] host/pcie-rockchip.c:1240:12: error: 'rockchip_pcie_suspend_noirq' defined but not used [-Werror=unused-function] Marking both functions as __maybe_unused avoids the warning without the need for #ifdef around them. Fixes: 013dd3d5e183 ("PCI: rockchip: Add system PM support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
| | * | PCI: rockchip: Use readl_poll_timeout() instead of open-coding itShawn Lin2017-01-301-36/+16
| | | | | | | | | | | | | | | | | | | | | | | | Use readl_poll_timeout() instead of open-coding it. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: rockchip: Disable RC's ASPM L0s based on DT "aspm-no-l0s"Shawn Lin2017-01-121-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip's RC produces a 100MHz reference clock but there are two methods for the PHY to generate it: (1) Use the system PLL to generate a 100MHz clock. The PHY will relock it, filter signal noise, and output the reference clock. ASPM L0s works correctly, but circuit noise issues make it difficult to pass the TX compatibility test. (2) Share the SoC's 24MHZ crystal oscillator with the PHY and force the PHY's PLL to generate 100MHz internally. In this case, exit from ASPM L0s sometimes fails due to a design error in the RC receiver circuit. Even if we use extended-synch, the PHY sometimes fails to relock the bits from FTS, which will hang the system. We want the flexibility to use both clocking methods, so add a DT property, "aspm-no-l0s". If that's present, disable L0s to avoid the issues with case (2). [bhelgaas: changelog] Reported-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Acked-by: Rob Herring <robh@kernel.org>
| | * | PCI: rockchip: Add system PM supportShawn Lin2017-01-111-0/+106
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add system PM support for Rockchip's RC. For pre S3, the EP is configured into D3 state which guarantees the link state should be in L1. So we could send PME_Turn_Off message to the EP and wait for its ACK to make the link state into L2 or L3 without the aux-supply. This could help save more power which I think should be very important for mobile devices. As note that there is a 5s timeout for RC to wait for the PMA_ACK after sending PME_Turn_Off. Technically it should depend on the hierarchy of devices but seems PCIe core framework doesn't handle the L2/3 for S3 at all. So that means we should presume to set a default value for PME_ACK. From the bug report[1], we could find a statement that Microsoft Windows versions typically wait for 5 seconds. So we are prone to take 5s for this timeout here. [1] https://lists.launchpad.net/kernel-packages/msg123315.html Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Brian Norris <briannorris@chromium.org>
| * | Merge branch 'pci/host-rcar' into nextBjorn Helgaas2017-02-211-7/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | * pci/host-rcar: PCI: rcar: Use of_device_get_match_data() to simplify probe PCI: rcar: Add compatible string for r8a7796 PCI: rcar: Return -ENODEV from host bridge probe when no card present
| | * | PCI: rcar: Use of_device_get_match_data() to simplify probeBjorn Helgaas2017-01-311-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a DT-only driver, so the only way to call rcar_pcie_probe() is to match an entry in rcar_pcie_of_match[], so of_id cannot be NULL. Furthermore, of_id->data can only be NULL if an rcar_pcie_of_match[] entry has a NULL .data member. That's a driver defect, and we don't want to return -EINVAL, which is easy to ignore. We'd rather take the NULL pointer dereference so we notice the problem and fix it. Use of_device_get_match_data() to retrieve the hw_init_fn pointer. No functional change intended. Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au>
| | * | PCI: rcar: Return -ENODEV from host bridge probe when no card presentHarunobu Kurokawa2017-01-111-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | R-Car PCIe does not support hotplug so it is appropriate to treat the absence of a PCIe card as an -ENODEV error. Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> [simon: updated changelog] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/host-mvebu' into nextBjorn Helgaas2017-02-211-42/+61
| |\ \ | | | | | | | | | | | | | | | | | | | | * pci/host-mvebu: PCI: mvebu: Change delay after reset to the PCIe spec mandated 100ms PCI: mvebu: Handle changes to the bridge windows while enabled
| | * | PCI: mvebu: Change delay after reset to the PCIe spec mandated 100msLucas Stach2017-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current default of 20ms cause some devices, which are slow to initialize, to not show up during the bus scanning. Change this to the PCIe spec mandated 100ms and document this in the DT binding. From PCIe base spec rev 3.0, chapter "6.6.1. Conventional Reset": To allow components to perform internal initialization, system software must wait a specified minimum period following the end of a Conventional Reset of one or more devices before it is permitted to issue Configuration Requests to those devices. With a Downstream Port that does not support Link speeds greater than 5.0 GT/s, software must wait a minimum of 100 ms before sending a Configuration Request to the device immediately below that Port. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
| | * | PCI: mvebu: Handle changes to the bridge windows while enabledJason Gunthorpe2017-01-301-41/+60
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI core will write to the bridge window config multiple times while they are enabled. This can lead to mbus failures like this: mvebu_mbus: cannot add window '4:e8', conflicts with another window mvebu-pcie mbus:pex@e0000000: Could not create MBus window at [mem 0xe0000000-0xe00fffff]: -22 For me this is happening during a hotplug cycle. The PCI core is not changing the values, just writing them twice while active. The patch addresses the general case of any change to an active window, but not atomically. The code is slightly refactored so io and mem can share more of the window logic. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jason Cooper <jason@lakedaemon.net>
| * | Merge branch 'pci/host-iproc' into nextBjorn Helgaas2017-02-212-7/+5
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | * pci/host-iproc: PCI: Add Broadcom Northstar2 PAXC quirk for device class and MPSS PCI: iproc: Configure PCIe MPS settings PCI: iproc: Use of_device_get_match_data() to simplify probe
| | * | PCI: iproc: Configure PCIe MPS settingsJon Mason2017-02-081-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure PCIe MPS settings are valid when we enumerate a new hierarchy. [bhelgaas: changelog] Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ray Jui <ray.jui@broadcom.com>
| | * | PCI: iproc: Use of_device_get_match_data() to simplify probeBjorn Helgaas2017-01-311-6/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way to call iproc_pcie_pltfm_probe() is to match an entry in iproc_pcie_of_match_table[], so match cannot be NULL. Use of_device_get_match_data() to retrieve the pcie->type. No functional change intended. Based-on-suggestion-from: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/host-hv' into nextBjorn Helgaas2017-02-211-3/+17
| |\ \ | | | | | | | | | | | | | | | | | | | | * pci/host-hv: PCI: hv: Use device serial number as PCI domain PCI: hv: Fix wslot_to_devfn() to fix warnings on device removal
| | * | PCI: hv: Use device serial number as PCI domainHaiyang Zhang2017-02-171-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the device serial number as the PCI domain. The serial numbers start with 1 and are unique within a VM. So names, such as VF NIC names, that include domain number as part of the name, can be shorter than that based on part of bus UUID previously. The new names will also stay same for VMs created with copied VHD and same number of devices. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: K. Y. Srinivasan <kys@microsoft.com>
| | * | PCI: hv: Fix wslot_to_devfn() to fix warnings on device removalDexuan Cui2017-02-101-3/+5
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The devfn of 00:02.0 is 0x10. devfn_to_wslot(0x10) == 0x2, and wslot_to_devfn(0x2) should be 0x10, while it's 0x2 in the current code. Due to this, hv_eject_device_work() -> pci_get_domain_bus_and_slot() returns NULL and pci_stop_and_remove_bus_device() is not called. Later when the real device driver's .remove() is invoked by hv_pci_remove() -> pci_stop_root_bus(), some warnings can be noticed because the VM has lost the access to the underlying device at that time. Signed-off-by: Jake Oshins <jakeo@microsoft.com> Signed-off-by: Dexuan Cui <decui@microsoft.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Haiyang Zhang <haiyangz@microsoft.com> CC: stable@vger.kernel.org CC: K. Y. Srinivasan <kys@microsoft.com> CC: Stephen Hemminger <sthemmin@microsoft.com>
| * | Merge branch 'pci/host-hisi' into nextBjorn Helgaas2017-02-211-0/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * pci/host-hisi: PCI: generic: Call pci_fixup_irqs() only on ARM PCI: Disable MSI for HiSilicon Hip06/Hip07 Root Ports PCI: hisi: Rename config space accessors to remove "acpi" PCI: hisi: Add DT almost-ECAM support for Hip06/Hip07 host controllers PCI: hisi: Use of_device_get_match_data() to simplify probe Conflicts: drivers/pci/dwc/pcie-hisi.c
| | * | PCI: generic: Call pci_fixup_irqs() only on ARMDongdong Liu2017-02-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_fixup_irqs() is problematic because: - it's called when we enumerate a host bridge, so we don't fixup IRQs for hot-added PCI devices, and - it fixes up IRQs for all PCI devices in the system, so if we call it multiple times, e.g., if we have several host controllers, we may reallocate an IRQ for a device after a driver has already claimed it. We plan to replace pci_fixup_irqs() soon, but we still need it on ARM because we don't have any other generic method for doing this. On ARM64, we don't need pci_fixup_irqs() because we do IRQ setup when we bind a driver to the device (in the pci_device_probe() -> pcibios_alloc_irq() path). pci-host-common.c is currently only used on ARM and ARM64. In principle, it could be used on x86, and we wouldn't want pci_fixup_irqs() there either, because x86 does IRQ setup in the pci_enable_device() path. [bhelgaas: changelog, use #ifdef ARM, not #ifndef ARM64] Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
| | * | PCI: hisi: Rename config space accessors to remove "acpi"Bjorn Helgaas2017-02-091-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's nothing ACPI-specific about the config space accessors hisi_pcie_acpi_rd_conf() and hisi_pcie_acpi_wr_conf(), and they're used for both the ACPI and the DT driver model. Rename them to hisi_pcie_rd_conf() and hisi_pcie_wr_conf(). No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| | * | PCI: hisi: Add DT almost-ECAM support for Hip06/Hip07 host controllersDongdong Liu2017-02-061-1/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCIe controller in HiSilicon Hip06/Hip07 SoCs is not completely ECAM-compliant. It is non-ECAM only for the RC bus config space; for any other bus underneath the root bus it does support ECAM access. Add DT support for the almost-ECAM Hip06/Hip07 controllers. [bhelgaas: drop dev->of_node test, driver name "hisi-pcie-almost-ecam"] Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
| | * | PCI: hisi: Use of_device_get_match_data() to simplify probeShailendra Verma2017-02-031-5/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way to call hisi_pcie_probe() is to match an entry in hisi_pcie_of_match[], so match cannot be NULL. Use of_device_get_match_data() to retrieve the soc_ops pointer. No functional change intended. [bhelgaas: use of_device_get_match_data(), changelog] Based-on-suggestion-from: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Shailendra Verma <shailendra.v@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| * | Merge branch 'pci/host-altera' into nextBjorn Helgaas2017-02-211-1/+1
| |\ \ | | | | | | | | | | | | | | | | * pci/host-altera: PCI: altera: Extract TLP completion status correctly
| | * | PCI: altera: Extract TLP completion status correctlyYadi Hu2017-02-171-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | Previously we extracted 'Completion Status' from b14:12, but it is actually b15:13. Extract it from the correct bits. Signed-off-by: Hu Yadi<yadi.hu@windriver.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Ley Foon Tan <ley.foon.tan@intel.com>
| * | PCI: Move DesignWare IP support to new drivers/pci/dwc/ directoryKishon Vijay Abraham I2017-02-2117-6416/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Group all the PCI drivers that use DesignWare core in dwc directory. dwc IP is capable of operating in both host mode and device mode and keeping it inside the *host* directory is misleading. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Minghuan Lian <minghuan.Lian@freescale.com> Cc: Mingkai Hu <mingkai.hu@freescale.com> Cc: Roy Zang <tie-fei.zang@freescale.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Pratyush Anand <pratyush.anand@gmail.com> Cc: Niklas Cassel <niklas.cassel@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Zhou Wang <wangzhou1@hisilicon.com> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com> Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
* | | PCI/MSI: pci-xgene-msi: Fix CPU hotplug registration handlingMarc Zyngier2017-01-171-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The conversion to the new hotplug state machine introduced a regression where a successful hotplug registration would be treated as an error, effectively disabling the MSI driver forever. Fix it by doing the proper check on the return value. Fixes: 9c248f8896e6 ("PCI/xgene-msi: Convert to hotplug state machine") Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Tested-by: Duc Dang <dhdang@apm.com> CC: Thomas Gleixner <tglx@linutronix.de> CC: stable@vger.kernel.org
* / PCI: designware: Check for iATU unroll only on platforms that use ATUMurali Karicheri2017-01-101-5/+5
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we checked for iATU unroll support by reading PCIE_ATU_VIEWPORT even on platforms, e.g., Keystone, that do not have ATU ports. This can cause bad behavior such as asynchronous external aborts: OF: PCI: MEM 0x60000000..0x6fffffff -> 0x60000000 Unhandled fault: asynchronous external abort (0x1211) at 0x00000000 pgd = c0003000 [00000000] *pgd=80000800004003, *pmd=00000000 Internal error: : 1211 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-00009-g6ff59d2-dirty #7 Hardware name: Keystone task: eb878000 task.stack: eb866000 PC is at dw_pcie_setup_rc+0x24/0x380 LR is at ks_pcie_host_init+0x10/0x170 Move the dw_pcie_iatu_unroll_enabled() check so we only call it on platforms that do not use the ATU. These platforms supply their own ->rd_other_conf() and ->wr_other_conf() methods. [bhelgaas: changelog] Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature") Fixes: 416379f9ebde ("PCI: designware: Check for iATU unroll support after initializing host") Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-By: Joao Pinto <jpinto@synopsys.com> CC: stable@vger.kernel.org # v4.9+
* Merge tag 'pci-v4.10-changes' of ↵Linus Torvalds2016-12-1521-417/+1772
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "PCI changes: - add support for PCI on ARM64 boxes with ACPI. We already had this for theoretical spec-compliant hardware; now we're adding quirks for the actual hardware (Cavium, HiSilicon, Qualcomm, X-Gene) - add runtime PM support for hotplug ports - enable runtime suspend for Intel UHCI that uses platform-specific wakeup signaling - add yet another host bridge registration interface. We hope this is extensible enough to subsume the others - expose device revision in sysfs for DRM - to avoid device conflicts, make sure any VF BAR updates are done before enabling the VF - avoid unnecessary link retrains for ASPM - allow INTx masking on Mellanox devices that support it - allow access to non-standard VPD for Chelsio devices - update Broadcom iProc support for PAXB v2, PAXC v2, inbound DMA, etc - update Rockchip support for max-link-speed - add NVIDIA Tegra210 support - add Layerscape LS1046a support - update R-Car compatibility strings - add Qualcomm MSM8996 support - remove some uninformative bootup messages" * tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (115 commits) PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3) PCI: Expand "VPD access disabled" quirk message PCI: pciehp: Remove loading message PCI: hotplug: Remove hotplug core message PCI: Remove service driver load/unload messages PCI/AER: Log AER IRQ when claiming Root Port PCI/AER: Log errors with PCI device, not PCIe service device PCI/AER: Remove unused version macros PCI/PME: Log PME IRQ when claiming Root Port PCI/PME: Drop unused support for PMEs from Root Complex Event Collectors PCI: Move config space size macros to pci_regs.h x86/platform/intel-mid: Constify mid_pci_platform_pm PCI/ASPM: Don't retrain link if ASPM not possible PCI: iproc: Skip check for legacy IRQ on PAXC buses PCI: pciehp: Leave power indicator on when enabling already-enabled slot PCI: pciehp: Prioritize data-link event over presence detect PCI: rcar: Add gen3 fallback compatibility string for pcie-rcar PCI: rcar: Use gen2 fallback compatibility last PCI: rcar-gen2: Use gen2 fallback compatibility last PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init() ..
| * Merge branch 'pci/host-vmd' into nextBjorn Helgaas2016-12-122-9/+23
| |\ | | | | | | | | | | | | | | | | | | * pci/host-vmd: PCI: vmd: Fix suspend handlers defined-but-not-used warning PCI: vmd: Use SRCU as a local RCU to prevent delaying global RCU PCI: vmd: Remove unnecessary pci_set_drvdata()
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