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* phy: tegra: Select USB_COMMON for usb_get_maximum_speed()Thierry Reding2020-04-161-1/+2
| | | | | | | | | | | | | | | The usb_get_maximum_speed() function is part of the usb-common module, so enable it by selecting the corresponding Kconfig symbol. While at it, also make sure to depend on USB_SUPPORT because USB_PHY requires that. This can lead to Kconfig conflicts if USB_SUPPORT is not enabled while attempting to enable PHY_TEGRA_XUSB. Reported-by: kbuild test robot <lkp@intel.com> Suggested-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200330101038.2422389-1-thierry.reding@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* phy: tegra: Select USB_PHYCorentin Labbe2020-03-191-0/+1
| | | | | | | | | | | | | | | | I have hit the following build error: armv7a-hardfloat-linux-gnueabi-ld: drivers/phy/tegra/xusb.o: in function `tegra_xusb_port_unregister': xusb.c:(.text+0x2ac): undefined reference to `usb_remove_phy' armv7a-hardfloat-linux-gnueabi-ld: drivers/phy/tegra/xusb.o: in function `tegra_xusb_setup_ports': xusb.c:(.text+0xf30): undefined reference to `usb_add_phy_dev' PHY_TEGRA_XUSB should select USB_PHY because it uses symbols defined in the code enabled by that. Fixes: 23babe30fb45d ("phy: tegra: xusb: Add usb-phy support") Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: Don't use device-managed API to allocate portsThierry Reding2020-03-195-4/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device-managed allocation API doesn't work well with the life-cycle of device objects. Since ports have device objects allocated within, it can lead to situations where these devices need to stay around until after their parent pad controller has been unbound from its driver. The device-managed memory allocated for the port objects will, however, get freed when the pad controller unbinds from the driver. This can cause use-after-free errors down the road. Note that the device is deleted as part of the driver unbind operation, so there isn't much that can be done with it after that point, but the memory still needs to stay around to ensure none of the references are invalidated. One situation where this arises is when a VBUS supply is associated with a USB 2 or 3 port. When that supply is released using regulator_put() an SRCU call will queue the release of the device link connecting the port and the regulator after a grace period. This means that the regulator is going to keep on to the last reference of the port device even after the pad controller driver was unbound (which is when the memory backing the port device is freed). Fix this by allocating port objects using non-device-managed memory. Add release callbacks for these objects so that their memory gets freed when the last reference goes away. This decouples the port devices' lifetime from the "active" lifetime of the pad controller (i.e. the time during which the pad controller driver owns the device). Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: Fix regulator leakThierry Reding2020-03-195-2/+28
| | | | | | | | | | | | | | | | | | | | | | Devices are created for each port of the XUSB pad controller. Each USB 2 and USB 3 port can potentially have an associated VBUS power supply that needs to be removed when the device is removed. Since port devices never bind to a driver, the driver core will not get to perform the cleanup of device-managed resources that usually happens on driver unbind. Now, the driver core will also perform device-managed resource cleanup for driver-less devices when they are released. However, when a device link is created between the regulator and the port device, as part of regulator_get(), the regulator takes a reference to the port device and prevents it from being released unless regulator_put() is called, which will never happen. Avoid this by using the non-device-managed API and manually releasing the regulator reference when the port is unregistered. Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: Print -EPROBE_DEFER error message at debug levelThierry Reding2020-03-191-1/+7
| | | | | | | | | Probe deferral is an expected error condition that will usually be recovered from. Print such error messages at debug level to make them available for diagnostic purposes when building with debugging enabled and hide them otherwise to not spam the kernel log with them. Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Don't warn on probe deferJon Hunter2020-03-191-1/+3
| | | | | | | | | | Deferred probe is an expected return value for tegra_fuse_readl(). Given that the driver deals with it properly, there's no need to output a warning that may potentially confuse users. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Add Tegra194 supportJC Kuo2020-03-194-0/+96
| | | | | | | | | | | | | | | | | | | | | Add support for the XUSB pad controller found on Tegra194 SoCs. It is mostly similar to the same IP found on Tegra186, but the number of pads exposed differs, as do the programming sequences. Because most of the Tegra194 XUSB PADCTL registers definition and programming sequence are the same as Tegra186, Tegra194 XUSB PADCTL can share the same driver, xusb-tegra186.c, with Tegra186 XUSB PADCTL. Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, it is possible for some platforms have long signal trace that could not provide sufficient electrical environment for Gen 2 speed. This patch adds a "maximum-speed" property to usb3 ports which can be used to specify the maximum supported speed for any particular USB 3.1 port. For a port that is not capable of SuperSpeedPlus, "maximum-speed" property should carry "super-speed". Signed-off-by: JC Kuo <jckuo@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Protect Tegra186 soc with configJC Kuo2020-03-191-34/+36
| | | | | | | | | | | As xusb-tegra186.c will be reused for Tegra194, it would be good to protect Tegra186 soc data with CONFIG_ARCH_TEGRA_186_SOC. This commit also reshuffles Tegra186 soc data single CONFIG_ARCH_TEGRA_186_SOC will be sufficient. Signed-off-by: JC Kuo <jckuo@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Add set_mode support for UTMI phy on Tegra186Nagarjuna Kristam2020-03-191-22/+92
| | | | | | | | | Add support for set_mode on UTMI phy. This allow XUSB host/device mode drivers to configure the hardware to corresponding modes. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Add set_mode support for USB 2 phy on Tegra210Nagarjuna Kristam2020-03-191-27/+104
| | | | | | | | | Add support for set_mode on USB 2 phy. This allow XUSB host/device mode drivers to configure the hardware to corresponding modes. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Add support to get companion USB 3 portNagarjuna Kristam2020-03-191-0/+21
| | | | | | | | | | Tegra XUSB host, device mode driver requires the USB 3 companion port number for corresponding USB 2 port. Add API to retrieve the same. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Reviewed-by: JC Kuo <jckuo@nvidia.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Add usb-phy supportNagarjuna Kristam2020-03-192-0/+86
| | | | | | | | | | | | For USB 2 ports that has usb-role-switch enabled, add usb-phy for corresponding USB 2 phy. USB role changes from role switch are then updated to corresponding host and device mode drivers via usb-phy notifier block. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> [treding@nvidia.com: rebase onto Greg's usb-next branch] Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: xusb: Add usb-role-switch supportNagarjuna Kristam2020-03-193-0/+76
| | | | | | | | | | If usb-role-switch property is present in USB 2 port, register usb-role-switch to receive usb role changes. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> [treding@nvidia.com: rebase onto Greg's usb-next branch] Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: tegra: use regulator_bulk_set_supply_names()Bartosz Golaszewski2019-10-251-3/+3
| | | | | | | Use the new regulator helper instead of a for loop. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Add vbus override support on Tegra186Nagarjuna Kristam2019-10-231-0/+23
| | | | | | | | Tegra XUSB device control driver needs to control vbus override during its operations, add API for the support. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Add vbus override support on Tegra210Nagarjuna Kristam2019-10-233-0/+82
| | | | | | | | | Tegra XUSB device control driver needs to control vbus override during its operations, add API for the support. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Add usb3 port fake support on Tegra210Nagarjuna Kristam2019-10-233-0/+123
| | | | | | | | | | | | | On Tegra210, usb2 only otg/peripheral ports dont work in device mode. They need an assosciated usb3 port to work in device mode. Identify an unused usb3 port and assign it as a fake USB3 port to USB2 only port whose mode is otg/peripheral. Based on work by BH Hsieh <bhsieh@nvidia.com>. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Add XUSB dual mode support on Tegra210Nagarjuna Kristam2019-10-231-2/+18
| | | | | | | | | | | Configure the port capabilities based on usb_dr_mode settings. Based on work by JC Kuo <jckuo@nvidia.com>. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Reviewed-by: JC Kuo <jckuo@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: remove unused variableChunfeng Yun2019-10-231-3/+0
| | | | | | | | The local variable @priv is set but not used, can be removed Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: Add PCIe PIPE2UPHY supportVidya Sagar2019-08-133-0/+128
| | | | | | | | | | | | | | Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module. For each PCIe lane of a controller, there is a P2U unit instantiated at hardware level. This driver provides support for the programming required for each P2U that is going to be used for a PCIe controller. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Thierry Reding <treding@nvidia.com>
* Merge tag 'phy-for-5.2-rc_v2' of ↵Greg Kroah-Hartman2019-07-012-0/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 5.2-rc *) Move Tegra124 PLL power supplies to be enabled by xusb-tegra124 *) Move Tegra210 PLL power supplies to be enabled by xusb-tegra210 *) Minor fixes: fix memory leaks at error path and addresses coverity. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.2-rc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: phy: tegra: xusb: Add Tegra210 PLL power supplies phy: tegra: xusb: Add Tegra124 PLL power supplies dt-bindings: phy: tegra-xusb: List PLL power supplies phy: usb: phy-brcm-usb: Remove sysfs attributes upon driver removal phy: renesas: rcar-gen2: Fix memory leak at error paths phy: qcom-qusb2: fix missing assignment of ret when calling clk_prepare_enable
| * phy: tegra: xusb: Add Tegra210 PLL power suppliesThierry Reding2019-06-121-0/+9
| | | | | | | | | | | | | | | | | | | | The Tegra210 SoC has four inputs that consume power in order to supply the PLLs that drive the various USB, PCI and SATA pads. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * phy: tegra: xusb: Add Tegra124 PLL power suppliesThierry Reding2019-06-121-0/+9
| | | | | | | | | | | | | | | | | | | | The Tegra124 SoC has four inputs that consume power in order to supply the PLLs that drive the various USB, PCI and SATA pads. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner2019-06-054-36/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 263 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-212-0/+2
|/ | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* phy: tegra: xusb: Add Tegra186 supportJC Kuo2019-04-174-0/+933
| | | | | | | | | | | | | | | | | | Add support for the XUSB pad controller found on Tegra186 SoCs. It is mostly similar to the same IP found on earlier chips, but the number of pads exposed differs, as do the programming sequences. Note that the DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL power supplies of the XUSB pad controller require strict power sequencing and are therefore controlled by the PMIC on Tegra186. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> [dan.carpenter@oracle.com: Fix testing the wrong variable in probe()] Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> [yuehaibing@huawei.com: Make two functions static to fix sparse warning] Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Add support for power suppliesThierry Reding2019-04-172-1/+38
| | | | | | | | | Support enabling various supplies needed to provide power to the PLLs and logic used to drive the USB, PCI and SATA pads. Reviewed-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Parse dual-role mode propertyThierry Reding2019-04-172-0/+24
| | | | | | | | | | | | The device tree bindings document the "mode" property of "ports" subnodes, but the driver was not parsing the property. In preparation for adding role switching, parse the property at probe time. Based on work by JC Kuo <jckuo@nvidia.com>. Reviewed-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Skip single function lane programmingJC Kuo2019-04-171-1/+5
| | | | | | | | | | Tegra186 USB2 pads and USB3 pads do not have hardware mux for changing the pad function. For such "lanes", we can skip the lane mux register programming. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: Convert to using %pOFn instead of device_node.nameRob Herring2018-09-251-2/+2
| | | | | | | | | | In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: Convert to use match_string() helperAndy Shevchenko2018-05-201-14/+1
| | | | | | | | | The new helper returns index of the matching string in an array. We are going to use it here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: xusb: Uncomment register writeThierry Reding2018-03-161-4/+2
| | | | | | | | | | | | | | | | | The reason why this was originally commented out is no longer clear. The UPHY driver for SATA works fine with or without this change. The reset value of the XDIGCLK_EN bit is 0, so unless programmed by the bootloader this shouldn't make a difference anyway. Define a macro for this bit and uncomment the code. This also fixes a coverity issue brought to my attention by Rohith because not only is the XDIGCLK_EN field modification commented out, but also the register write which causes none of the earlier modifications of the register value to be written to the register and the value being overwritten. Reported-by: Rohith Seelaboyina <rseelaboyina@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: remove redundant self assignment of 'map'Colin Ian King2018-02-211-1/+1
| | | | | | | | The assignment of map to itself is redundant and can be removed. Detected with Coccinelle. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: fix device-tree node lookupsJohan Hovold2017-12-151-29/+29
| | | | | | | | | | | | | | | | Fix child-node lookups during probe, which ended up searching the whole device tree depth-first starting at the parents rather than just matching on their children. To make things worse, some parent nodes could end up being being prematurely freed (by tegra_xusb_pad_register()) as of_find_node_by_name() drops a reference to its first argument. Fixes: 53d2a715c240 ("phy: Add Tegra XUSB pad controller support") Cc: stable <stable@vger.kernel.org> # 4.7 Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: Handle return value of kasprintfArvind Yadav2017-09-261-0/+2
| | | | | | | kasprintf() can fail and it's return value must be checked. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: fix returnvar.cocci warningsVivek Gautam2016-11-181-2/+1
| | | | | | | | | | Remove unneeded variables when "0" can be returned. Generated by: scripts/coccinelle/misc/returnvar.cocci Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: Fix ptr_ret.cocci warningsVivek Gautam2016-11-181-8/+2
| | | | | | | | | | Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR. Generated by: scripts/coccinelle/api/ptr_ret.cocci Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> Cc: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: mark tegra_xusb_lane_lookup_function() staticBaoyou Xie2016-09-101-1/+2
| | | | | | | | | | | | | | We get 1 warning when building kernel with W=1: drivers/phy/tegra/xusb.c:104:5: warning: no previous prototype for 'tegra_xusb_lane_lookup_function' [-Wmissing-prototypes] In fact, this function is only used in the file in which it is declared and don't need a declaration, but can be made static. So this patch marks it 'static'. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: add missing header dependenciesBaoyou Xie2016-09-101-0/+1
| | | | | | | | | | | | | | | | | We get 5 warnings when building kernel with W=1: drivers/phy/tegra/xusb.c:948:27: warning: no previous prototype for 'tegra_xusb_padctl_get' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:981:6: warning: no previous prototype for 'tegra_xusb_padctl_put' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:988:5: warning: no previous prototype for 'tegra_xusb_padctl_usb3_save_context' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:998:5: warning: no previous prototype for 'tegra_xusb_padctl_hsic_set_idle' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:1008:5: warning: no previous prototype for 'tegra_xusb_padctl_usb3_set_lfps_detect' [-Wmissing-prototypes] In fact, these functions are declared in linux/phy/tegra/xusb.h, so this patch adds missing header dependencies. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* phy: tegra: Add Tegra210 supportThierry Reding2016-04-292-0/+2046
| | | | | | | | Add support for the XUSB pad controller found on Tegra210 SoCs. The hardware is roughly the same, but some of the registers have been moved around and the number and type of supported pads has changed. Signed-off-by: Thierry Reding <treding@nvidia.com>
* phy: Add Tegra XUSB pad controller supportThierry Reding2016-04-295-0/+3207
Add a new driver for the XUSB pad controller found on NVIDIA Tegra SoCs. This hardware block used to be exposed as a pin controller, but it turns out that this isn't a good fit. The new driver and DT binding much more accurately describe the hardware and are more flexible in supporting new SoC generations. Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com>