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path: root/drivers/phy/xilinx
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* phy: xilinx: phy-zynqmp: mention SGMII as supported protocolRadhey Shyam Pandey2023-03-311-3/+2
* phy: xilinx: zynqmp: Fix bus width setting for SGMIIRobert Hancock2022-01-271-5/+6
* phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USBPiyush Mehta2021-08-181-0/+3
* phy: zynqmp: Handle the clock enable/disable properlyManish Narani2021-03-311-7/+51
* phy: zynqmp: Simplify code by using dev_err_probe()Michal Simek2021-02-061-7/+4
* phy: zynqmp: Fix unused-function compiler warningTobias Klauser2020-07-011-4/+2
* phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit TransceiverAnurag Kumar Vulisha2020-06-293-0/+1011