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* Merge tag 'phy-fixes-6.6' of ↵Linus Torvalds2023-10-229-48/+57
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy fixes from Vinod Koul: - mapphone-mdm6600 runtime pm & pinctrl handling fixes - Qualcomm qmp usb pcs register fixes, qmp pcie register size warning fix, m31 fixes for wrong pointer in PTR_ERR and dropping wrong vreg check, qmp combo fix for 8550 power config register - realtek usb fix for debugfs_create_dir() and kconfig dependency * tag 'phy-fixes-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: phy: realtek: Realtek PHYs should depend on ARCH_REALTEK phy: qualcomm: Fix typos in comments phy: qcom-qmp-combo: initialize PCS_USB registers phy: qcom-qmp-combo: Square out 8550 POWER_STATE_CONFIG1 phy: qcom: m31: Remove unwanted qphy->vreg is NULL check phy: realtek: usb: Drop unnecessary error check for debugfs_create_dir() phy: qcom: phy-qcom-m31: change m31_ipq5332_regs to static phy: qcom: phy-qcom-m31: fix wrong pointer pass to PTR_ERR() dt-bindings: phy: qcom,ipq8074-qmp-pcie: fix warning regarding reg size phy: qcom-qmp-usb: split PCS_USB init table for sc8280xp and sa8775p phy: qcom-qmp-usb: initialize PCS_USB registers phy: mapphone-mdm6600: Fix pinctrl_pm handling for sleep pins phy: mapphone-mdm6600: Fix runtime PM for remove phy: mapphone-mdm6600: Fix runtime disable on probe
| * phy: realtek: Realtek PHYs should depend on ARCH_REALTEKGeert Uytterhoeven2023-09-291-0/+5
| | | | | | | | | | | | | | | | | | | | | | The Realtek SoC USB2 and USB3 PHY Transceivers are only present on Realtek Digital Home Center (DHC) RTD series SoCs. Hence add a dependency on ARCH_REALTEK, to prevent asking the user about these drivers when configuring a kernel without Realtek SoC support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2892527cac9af6fa8f5e7b8daeffd7d4351fde68.1692113167.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qualcomm: Fix typos in commentsBo Liu2023-09-211-1/+1
| | | | | | | | | | | | | | | | | | Fix typo in the description of the 'succesfully'. Signed-off-by: Bo Liu <liubo03@inspur.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230912114646.8452-1-liubo03@inspur.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-combo: initialize PCS_USB registersKonrad Dybcio2023-09-211-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Currently, PCS_USB registers that have their initialization data in a pcs_usb_tbl table are never initialized. Fix that. Fixes: fc64623637da ("phy: qcom-qmp-combo,usb: add support for separate PCS_USB region") Reported-by: Adrien Thierry <athierry@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230829-topic-8550_usbphy-v3-2-34ec434194c5@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-combo: Square out 8550 POWER_STATE_CONFIG1Konrad Dybcio2023-09-212-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two instances of the POWER_STATE_CONFIG1 register: one in the PCS space and another one in PCS_USB. The downstream init sequence pokes the latter one while we've been poking the former one (and misnamed it as the latter one, impostor!). Fix that up to avoid UB. Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550") Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230829-topic-8550_usbphy-v3-1-34ec434194c5@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom: m31: Remove unwanted qphy->vreg is NULL checkVaradarajan Narayanan2023-09-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following Smatch complaint: drivers/phy/qualcomm/phy-qcom-m31.c:175 m31usb_phy_init() warn: variable dereferenced before check 'qphy->vreg' (see line 167) drivers/phy/qualcomm/phy-qcom-m31.c 166 167 ret = regulator_enable(qphy->vreg); ^^^^^^^^^^ Unchecked dereference 168 if (ret) { 169 dev_err(&phy->dev, "failed to enable regulator, %d\n", ret); 170 return ret; 171 } 172 173 ret = clk_prepare_enable(qphy->clk); 174 if (ret) { 175 if (qphy->vreg) ^^^^^^^^^^ Checked too late 176 regulator_disable(qphy->vreg); 177 dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); Since the phy will not get registered if qphy->vreg is NULL, this check is not needed. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/linux-phy/cbd26132-c624-44b7-a073-73222b287338@moroto.mountain/T/#u Fixes: 08e49af50701 ("phy: qcom: Introduce M31 USB PHY driver") Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/1694069452-3794-1-git-send-email-quic_varada@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: realtek: usb: Drop unnecessary error check for debugfs_create_dir()Jinjie Ruan2023-09-212-16/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both debugfs_create_dir() and debugfs_create_file() return ERR_PTR and never return NULL. As Greg suggested, this patch removes the error checking for debugfs_create_dir in phy-rtk-usb2.c and phy-rtk-usb3.c. This is because the DebugFS kernel API is developed in a way that the caller can safely ignore the errors that occur during the creation of DebugFS nodes. The debugfs APIs have a IS_ERR() judge in start_creating() which can handle it gracefully. So these checks are unnecessary. Fixes: 134e6d25f6bd ("phy: realtek: usb: Add driver for the Realtek SoC USB 2.0 PHY") Fixes: adda6e82a7de ("phy: realtek: usb: Add driver for the Realtek SoC USB 3.0 PHY") Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20230901075231.1368947-1-ruanjinjie@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom: phy-qcom-m31: change m31_ipq5332_regs to staticYang Yingliang2023-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | m31_ipq5332_regs is only used in phy-qcom-m31.c now, change it to static. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20230824092356.1154839-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom: phy-qcom-m31: fix wrong pointer pass to PTR_ERR()Yang Yingliang2023-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | It should be 'qphy->vreg' passed to PTR_ERR() when devm_regulator_get() fails. Fixes: 08e49af50701 ("phy: qcom: Introduce M31 USB PHY driver") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20230824091345.1072650-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-usb: split PCS_USB init table for sc8280xp and sa8775pAdrien Thierry2023-09-211-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For sc8280xp and sa8775p, PCS and PCS_USB initialization data is described in the same table, thus the pcs_usb offset is not being applied during initialization of PCS_USB registers. Fix this by adding the appropriate pcs_usb_tbl tables. Fixes: 8bd2d6e11c99 ("phy: qcom-qmp: Add SA8775P USB3 UNI phy") Fixes: c0c7769cdae2 ("phy: qcom-qmp: Add SC8280XP USB3 UNI phy") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Adrien Thierry <athierry@redhat.com> Link: https://lore.kernel.org/r/20230828152353.16529-3-athierry@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-usb: initialize PCS_USB registersAdrien Thierry2023-09-211-0/+4
| | | | | | | | | | | | | | | | | | | | | | Currently, PCS_USB registers that have their initialization data in a pcs_usb_tbl table are never initialized. Fix that. Fixes: fc64623637da ("phy: qcom-qmp-combo,usb: add support for separate PCS_USB region") Signed-off-by: Adrien Thierry <athierry@redhat.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230828152353.16529-2-athierry@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: mapphone-mdm6600: Fix pinctrl_pm handling for sleep pinsTony Lindgren2023-09-141-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looks like the driver sleep pins configuration is unusable. Adding the sleep pins causes the usb phy to not respond. We need to use the default pins in probe, and only set sleep pins at phy_mdm6600_device_power_off(). As the modem can also be booted to a serial port mode for firmware flashing, let's make the pin changes limited to probe and remove. For probe, we get the default pins automatically. We only need to set the sleep pins in phy_mdm6600_device_power_off() to prevent the modem from waking up because the gpio line glitches. If it turns out that we need a separate state for phy_mdm6600_power_on() and phy_mdm6600_power_off(), we can use the pinctrl idle state. Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Fixes: 2ad2af081622 ("phy: mapphone-mdm6600: Improve phy related runtime PM calls") Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230913060433.48373-3-tony@atomide.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: mapphone-mdm6600: Fix runtime PM for removeTony Lindgren2023-09-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise we will get an underflow on remove. Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Fixes: f7f50b2a7b05 ("phy: mapphone-mdm6600: Add runtime PM support for n_gsm on USB suspend") Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230913060433.48373-2-tony@atomide.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: mapphone-mdm6600: Fix runtime disable on probeTony Lindgren2023-09-141-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d644e0d79829 ("phy: mapphone-mdm6600: Fix PM error handling in phy_mdm6600_probe") caused a regression where we now unconditionally disable runtime PM at the end of the probe while it is only needed on errors. Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Miaoqian Lin <linmq006@gmail.com> Cc: Pavel Machek <pavel@ucw.cz> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Fixes: d644e0d79829 ("phy: mapphone-mdm6600: Fix PM error handling in phy_mdm6600_probe") Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20230913060433.48373-1-tony@atomide.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* | phy: lynx-28g: serialize concurrent phy_set_mode_ext() calls to shared registersVladimir Oltean2023-10-061-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The protocol converter configuration registers PCC8, PCCC, PCCD (implemented by the driver), as well as others, control protocol converters from multiple lanes (each represented as a different struct phy). So, if there are simultaneous calls to phy_set_mode_ext() to lanes sharing the same PCC register (either for the "old" or for the "new" protocol), corruption of the values programmed to hardware is possible, because lynx_28g_rmw() has no locking. Add a spinlock in the struct lynx_28g_priv shared by all lanes, and take the global spinlock from the phy_ops :: set_mode() implementation. There are no other callers which modify PCC registers. Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | phy: lynx-28g: lock PHY while performing CDR lock workaroundVladimir Oltean2023-10-061-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | lynx_28g_cdr_lock_check() runs once per second in a workqueue to reset the lane receiver if the CDR has not locked onto bit transitions in the RX stream. But the PHY consumer may do stuff with the PHY simultaneously, and that isn't okay. Block concurrent generic PHY calls by holding the PHY mutex from this workqueue. Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | phy: lynx-28g: cancel the CDR check work item on the remove pathIoana Ciornei2023-10-061-0/+9
|/ | | | | | | | | | | The blamed commit added the CDR check work item but didn't cancel it on the remove path. Fix this by adding a remove function which takes care of it. Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge tag 'phy-for-6.6' of ↵Linus Torvalds2023-09-03106-2236/+4568
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "As usual a couple of new drivers, a bunch of new device support and few updates to existing drivers New Support: - Starfive dphy rx, JH7110 usb and pcie support - Rockchip rv1126 inno-dsi phy, rk3588 usb and pcie support - Qualcomm sa8775p PCIe support, M31 USB PHY driver - Samsung Exynos850 usb support Updates: - Mediatek dsi driver clock updates - Qualcomm sm8150 combo phy with reworking of qmp pcie driver - Xilinx zynqmp runtime PM support" * tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (83 commits) phy: exynos5-usbdrd: Add Exynos850 support phy: exynos5-usbdrd: Add 26MHz ref clk support phy: exynos5-usbdrd: Make it possible to pass custom phy ops dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos850 support phy: qcom-qmp-combo: fix clock probing phy: qcom-qmp-pcie: support SM8150 PCIe QMP PHYs phy: qcom-qmp-pcie: populate offsets configuration phy: qcom-qmp-pcie: simplify clock handling phy: qcom-qmp-pcie: keep offset tables sorted phy: qcom-qmp-pcie: drop ln_shrd from v5_20 config dt-bindings: phy: qcom,qmp-pcie: describe SM8150 PCIe PHYs dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml phy: fsl-imx8mq-usb: add dev_err_probe if getting vbus failed phy: qcom: Introduce M31 USB PHY driver dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy phy: rockchip: inno-dsidphy: Add rv1126 support dt-bindings: phy: rockchip-inno-dsidphy: Document rv1126 dt-bindings: phy: mediatek,tphy: allow simple nodename pattern phy: amlogic: meson-g12a-usb2: fix Wvoid-pointer-to-enum-cast warning phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warning ...
| * phy: exynos5-usbdrd: Add Exynos850 supportSam Protsenko2023-08-221-0/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement Exynos850 USB 2.0 DRD PHY controller support. Exynos850 has quite a different PHY controller than Exynos5 compatible controllers, but it's still possible to implement it on top of existing exynos5-usbdrd driver infrastructure. Only UTMI+ (USB 2.0) PHY interface is implemented, as Exynos850 doesn't support USB 3.0. Only two clocks are used for this controller: - phy: bus clock, used for PHY registers access - ref: PHY reference clock (OSCCLK) Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230819031731.22618-7-semen.protsenko@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: exynos5-usbdrd: Add 26MHz ref clk supportSam Protsenko2023-08-221-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modern Exynos chips (like Exynos850) might have 26 MHz OSCCLK external clock, which is also used as a PHY reference clock. For some USB PHY controllers (e.g USB DRD PHY block on Exynos850) there is no need to set the refclk frequency at all (and corresponding bits in CLKRSTCTRL[7:5] are marked RESERVED), so that value won't be set in the driver. But even in that case, 26 MHz support still has to be added, otherwise exynos5_rate_to_clk() fails, which leads in turn to probe error. Add the correct value for 26MHz refclk to make it possible to add support for new Exynos USB DRD PHY controllers. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230819031731.22618-6-semen.protsenko@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: exynos5-usbdrd: Make it possible to pass custom phy opsSam Protsenko2023-08-221-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a way to use different PHY ops for different chips. Right now all chips are using exynos5_usbdrd_phy_ops, but it won't always be the case. For example, Exynos850 has very different USB PHY block, so there will be another PHY ops implementation for that chip. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230819031731.22618-5-semen.protsenko@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-combo: fix clock probingDmitry Baryshkov2023-08-221-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | During rebase of qcom-qmp-combo series a call to devm_clk_bulk_get_all() got moved by git from qmp_combo_parse_dt_legacy() to phy_dp_clks_register(). This doesn't have any serious effect, since the clocks will be set in both legacy and non-legacy paths. However let's move it back to place anyway, to prevent the driver from fetching clocks twice. Fixes: 28e265bf84a8 ("phy: qcom-qmp-combo: simplify clock handling") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820235813.562284-1-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-pcie: support SM8150 PCIe QMP PHYsDmitry Baryshkov2023-08-221-0/+6
| | | | | | | | | | | | | | | | | | Reuse sm8250 configuration to add support for both single lane and dual lane PCIe PHYs on the Qualcomm SM8150 platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-8-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-pcie: populate offsets configurationDmitry Baryshkov2023-08-221-0/+74
| | | | | | | | | | | | | | | | | | Populate offsets configuration for the rest of UFS PHYs to make it possible to switch them to the new (single-node) bindings style. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-7-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-pcie: simplify clock handlingDmitry Baryshkov2023-08-221-71/+7
| | | | | | | | | | | | | | | | | | | | | | | | For some of existing PHYs for new binding we are going to change refgen to more correct "rchng". Rather than introducing additional code to handle legacy vs current bindings (and clock names), use devm_clk_bulk_get_optional(). Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-6-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-pcie: keep offset tables sortedDmitry Baryshkov2023-08-221-11/+11
| | | | | | | | | | | | | | | | | | | | In order to simplify adding new PHY configurations, keep register offset structs sorted by the version. Fixes: a05b6d5135ec ("phy: qcom-qmp-pcie: add support for sa8775p") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-5-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-pcie: drop ln_shrd from v5_20 configDmitry Baryshkov2023-08-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | There is no shared lane config for v5.20 PHYs, it is only present on SM8550 gen4x2. Fixes: a05b6d5135ec ("phy: qcom-qmp-pcie: add support for sa8775p") Cc: Mrinmay Sarkar <quic_msarkar@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230820142035.89903-4-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: fsl-imx8mq-usb: add dev_err_probe if getting vbus failedAlexander Stein2023-08-221-1/+1
| | | | | | | | | | | | | | | | | | | | This adds an error message if getting vbus failed for some reason, -EPROBE_DEFER is handled appropriately as well and adds a nice information to debugfs. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20230816080256.611380-1-alexander.stein@ew.tq-group.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom: Introduce M31 USB PHY driverVaradarajan Narayanan2023-08-223-0/+306
| | | | | | | | | | | | | | | | | | | | | | Add the M31 USB2 phy driver for the USB M31 PHY (https://www.m31tech.com) found in Qualcomm IPQ5018, IPQ5332 SoCs. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/c8821bb0124a54cc774a2ff7b9c40df28eb7711e.1691999761.git.quic_varada@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: rockchip: inno-dsidphy: Add rv1126 supportJagan Teki2023-08-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add support for Rockchip RV1126 DSI-DPHY. The existing 2.5GHz phy timing table added for RK3568 is working as it is for RV1126 as well. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230731110012.2913742-5-jagan@edgeble.ai Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: amlogic: meson-g12a-usb2: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski2023-08-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | 'soc_id' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: phy-meson-g12a-usb2.c:322:17: error: cast to smaller integer type 'enum meson_soc_id' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230810091310.70231-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski2023-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | 'version' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: phy-pxa-usb.c:299:26: error: cast to smaller integer type 'enum pxa_usb_phy_version' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810111958.205705-4-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: broadcom: sr-usb: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski2023-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | 'version' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: phy-bcm-sr-usb.c:314:13: error: cast to smaller integer type 'enum bcm_usb_phy_version' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810111958.205705-3-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: broadcom: ns-usb3: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski2023-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | 'family' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: drivers/phy/broadcom/phy-bcm-ns-usb3.c:209:17: error: cast to smaller integer type 'enum bcm_ns_family' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810111958.205705-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: broadcom: sata: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski2023-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | 'version' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: phy-brcm-sata.c:775:19: error: cast to smaller integer type 'enum brcm_sata_phy_version' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810111958.205705-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom: qmp-ufs: add missing offsets to sm8150 configurationDmitry Baryshkov2023-08-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The conversion commit 7559e7572c03 ("phy: Explicitly include correct DT includes") misses offsets configuration for sm8150 (most likely it was developed separately from the series adding HS G4 support and was not adapted for the sm8150/sm8250 configuration split). Add missing offsets to sm8150_ufsphy_cfg. Fixes: 7559e7572c03 ("phy: Explicitly include correct DT includes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230731111009.3998089-1-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: starfive: StarFive PHYs should depend on ARCH_STARFIVEGeert Uytterhoeven2023-07-261-0/+4
| | | | | | | | | | | | | | | | | | | | | | The various StarFive PHYs are only present on StarFive SoCs. Hence add a dependency on ARCH_STARFIVE, to prevent asking the user about these drivers when configuring a kernel without StarFive SoC support. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://lore.kernel.org/r/12097f6107a18e2f7cfb80f47ac7b27808e062c4.1690300076.git.geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: starfive: make phys depend on HAS_IOMEMVinod Koul2023-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | the startfive phy drivers use devm_platform_ioremap_resource() which on some archs (s390) is not present. So make the drivers depend on HAS_IOMEM Fixes: f8aa660841bc ("phy: starfive: Add mipi dphy rx support") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202307250509.oeudxG28-lkp@intel.com/ Reviewed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20230725063856.482696-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entryDmitry Baryshkov2023-07-241-0/+4
| | | | | | | | | | | | | | | | | | Add separate device entry for Combo USB+DP QMP PHY on sc7280 platform. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-5-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-combo: populate offsets for all combo PHYsDmitry Baryshkov2023-07-241-0/+8
| | | | | | | | | | | | | | | | | | | | In order to support newer style bindings for combo PHYs, populate offsets for all Combo QMP PHY configurations. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-4-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-combo: simplify clock handlingDmitry Baryshkov2023-07-241-44/+23
| | | | | | | | | | | | | | | | | | | | | | | | For the existing PHYs for new binding we are going to drop ref_clk_src clock and always use ref clock. Rather than introducing additional code to handle legacy vs current bindings (and clock names), use devm_clk_bulk_get_optional() when new bindings are used and devm_clk_bulk_get_all() when legacy bindings are in place. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: Remove duplicated include in xusb.cYang Li2023-07-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | ./drivers/phy/tegra/xusb.c: linux/platform_device.h is included more than once. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5930 Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20230719003614.5506-1-yang.lee@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: starfive: Add mipi dphy rx supportChanghuang Liang2023-07-243-2/+244
| | | | | | | | | | | | | | | | | | | | Add mipi dphy rx support for the StarFive JH7110 SoC. It is used to transfer CSI camera data. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Reviewed-by: Minda Chen <minda.chen@starfivetech.com> Link: https://lore.kernel.org/r/20230718070803.16660-3-changhuang.liang@starfivetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: starfive: fix error code in probeDan Carpenter2023-07-241-1/+1
| | | | | | | | | | | | | | | | | | This is using the wrong pointer, "phy->regs" vs "phy->phy". Fixes: fd097f48eea9 ("phy: starfive: Add JH7110 PCIE 2.0 PHY driver") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/3cc81f2a-efd7-4ef7-ae6b-e38c91efe153@moroto.mountain Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-pcie: add support for sa8775pMrinmay Sarkar2023-07-183-0/+344
| | | | | | | | | | | | | | | | Add support for dual and four lane PHY found on sa8755p platform. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> Link: https://lore.kernel.org/r/1689311319-22054-5-git-send-email-quic_msarkar@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: Explicitly include correct DT includesRob Herring2023-07-1781-65/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: ti: gmii-sel: Allow parent to not be syscon nodeAndrew Davis2023-07-141-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | If the parent node is not a syscon type, then fallback and check if we can get a regmap from our own node. This no longer forces us to make the parent of this node a syscon node when that might not be appropriate. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://lore.kernel.org/r/20230713200957.134480-1-afd@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: zynqmp: Allow variation in refclk rateSean Anderson2023-07-121-1/+4
| | | | | | | | | | | | | | | | | | | | Due to limited available frequency ratios, the reference clock rate may not be exactly the same as the required rate. Allow a small (100 ppm) deviation. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Link: https://lore.kernel.org/r/20230711194542.898230-1-sean.anderson@seco.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: qcom-qmp-ufs: populate offsets configurationDmitry Baryshkov2023-07-121-0/+10
| | | | | | | | | | | | | | | | | | | | Populate offsets configuration for the rest of UFS PHYs to make it possible to switch them to the new (single-node) bindings style. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711145153.4167820-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * phy: starfive: Add JH7110 PCIE 2.0 PHY driverMinda Chen2023-07-123-0/+215
| | | | | | | | | | | | | | | | | | | | | | Add Starfive JH7110 SoC PCIe 2.0 PHY driver support. PCIe 2.0 PHY default connect to PCIe controller. PCIe PHY can connect to USB 3.0 controller. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230629075115.11934-5-minda.chen@starfivetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 10:52:01 +0000