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* pinctrl: berlin: fix the dt_free_map functionAntoine Tenart2014-09-231-20/+1
| | | | | | | | | | | | | | | The berlin_pinctrl_dt_free_map function tries to free memory allocated and handled by the of subsystem. This is wrong and already handled by pinctrl_dt_free_maps() which calls of_node_put(). This patch fixes the Berlin pinctrl way of freeing its maps, avoiding a kernel BUG(), by using the common pinctrl_utils_dt_free_map function instead. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: clean up after enable refactoringLinus Walleij2014-09-041-4/+4
| | | | | | | | | | | | | | | | | commit 2243a87d90b42eb38bc281957df3e57c712b5e56 "pinctrl: avoid duplicated calling enable_pinmux_setting for a pin" removed the .disable callback from the struct pinmux_ops, making the .enable() callback the only remaining callback. However .enable() is a bad name as it seems to imply that a muxing can also be disabled. Rename the callback to .set_mux() and also take this opportunity to clean out any remaining mentions of .disable() from the documentation. Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Fan Wu <fwu@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: fix an error code in berlin_pinctrl_probe()Dan Carpenter2014-07-051-1/+1
| | | | | | | | | | We are returning success here because PTR_ERR(NULL) is zero. We should be returning -ENODEV. Fixes: 3de68d331c24 ('pinctrl: berlin: add the core pinctrl driver for Marvell Berlin SoCs') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: Use devm_ioremap_resource()Jingoo Han2014-05-273-9/+9
| | | | | | | | | Use devm_ioremap_resource() because devm_request_and_ioremap() is obsoleted by devm_ioremap_resource(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: add the BG2CD pinctrl driverAntoine Tenart2014-05-233-0/+222
| | | | | | | | | | | | Add the pin-controller driver for the Berlin BG2Q SoC, with definition of its groups and functions. Pin control registers are part of chip/ system control registers, which will be represented by a single node. Until a proper driver for the chip/system control is available, register the corresponding regmap in pinctrl driver probe. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: add the BG2 pinctrl driverAntoine Tenart2014-05-233-0/+279
| | | | | | | | | | | | Add the pin-controller driver for the Berlin BG2 SoC, with definition of its groups and functions. Pin control registers are part of chip/ system control registers, which will be represented by a single node. Until a proper driver for the chip/system control is available, register the corresponding regmap in pinctrl driver probe. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: add the BG2Q pinctrl driverAntoine Tenart2014-05-233-0/+441
| | | | | | | | | | | | Add the pin-controller driver for the Berlin BG2Q SoC, with definition of its groups and functions. Pin control registers are part of chip/ system control registers, which will be represented by a single node. Until a proper driver for the chip/system control is available, register the corresponding regmap in pinctrl driver probe. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: berlin: add the core pinctrl driver for Marvell Berlin SoCsAntoine Tenart2014-05-234-0/+418
The Marvell Berlin boards have a group based pinmuxing mechanism. This adds the core driver support. We actually do not need any information about the pins here and only have the definition of the groups. Let's take the example of the uart0 pinmuxing on the BG2Q. Balls BK4 and BH6 are muxed to respectively UART0 RX and TX if the group GSM12 is set to mode 0: Group Modes Offset Base Offset LSB Bit Width GSM12 3 sm_base 0x40 0x10 0x2 Ball Group Mode 0 Mode 1 Mode 2 BK4 GSM12 UART0_RX IrDA0_RX GPIO9 BH6 GSM12 UART0_TX IrDA0_TX GPIO10 So in order to configure BK4 -> UART0_TX and BH6 -> UART0_RX, we need to set (sm_base + 0x40 + 0x10) &= ff3fffff. As pin control registers are part of either chip control or system control registers, that deal with a bunch of other functions we rely on a regmap instead of exclusively remapping any resources. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>