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| | * | pinctrl: renesas: r8a779h0: Fix IRQ suffixesGeert Uytterhoeven2024-04-231-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The suffixes of the IRQ identifiers, as used for pins related to the Interrupt Controller for External Devices (INTC-EX), are inconsistent. Correct them to match the Pin Multiplex attachment in Rev.0.51 of the R-Car V4M Series Hardware User's Manual. Fixes: 291f7856fc451cbe ("pinctrl: renesas: Initial R8A779H0 (R-Car V4M) PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7d3c7498d9e8eda5583b15f9163eb25bb797ed24.1713282028.git.geert+renesas@glider.be
| | * | pinctrl: renesas: rzg2l: Remove extra space in function parameterLad Prabhakar2024-04-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary space in rzg2l_pinctrl_pm_setup_pfc() function parameter. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240226192530.141945-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | | pinctrl: pinconf-generic: print hex valuePeng Fan2024-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hex value will be easier to match hardware register bits layout, so same as pinconf_generic_dump_config, print hex value. Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-ID: <20240412005128.2937486-1-peng.fan@oss.nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: realtek: fix module autoloadingKrzysztof Kozlowski2024-04-172-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-5-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: qcom: sm7150: fix module autoloadingKrzysztof Kozlowski2024-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Message-ID: <20240411064614.7409-4-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: loongson2: fix module autoloadingKrzysztof Kozlowski2024-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-3-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: mediatek: fix module autoloadingKrzysztof Kozlowski2024-04-172-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240411064614.7409-2-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: freescale: imx8ulp: fix module autoloadingKrzysztof Kozlowski2024-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-1-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: Use DEFINE_SHOW_STORE_ATTRIBUTE() helper for debugfsAndy Shevchenko2024-04-081-17/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use DEFINE_SHOW_STORE_ATTRIBUTE() helper for read-write file to reduce some duplicated code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240404193521.3581399-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: single: Fix PIN_CONFIG_BIAS_DISABLE handlingMatthijs Kooijman2024-04-041-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrl-single driver handles pin_config_set by looking up the requested setting in a DT-defined lookup table, which defines what bits correspond to each setting. There is no way to add PIN_CONFIG_BIAS_DISABLE entries to the table, since there is instead code to disable the bias by applying the disable values of both the pullup and pulldown entries in the table. However, this code is inside the table-lookup loop, so it would only execute if there is an entry for PIN_CONFIG_BIAS_DISABLE in the table, which can never exist, so this code never runs. This commit lifts the offending code out of the loop, so it just executes directly whenever PIN_CONFIG_BIAS_DISABLE is requested, skippipng the table lookup loop. This also introduces a new `param` variable to make the code slightly more readable. This bug seems to have existed when this code was first merged in commit 9dddb4df90d13 ("pinctrl: single: support generic pinconf"). Earlier versions of this patch did have an entry for PIN_CONFIG_BIAS_DISABLE in the lookup table, but that was removed, which is probably how this bug was introduced. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Message-ID: <20240319110633.230329-1-matthijs@stdin.nl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: pinctrl-single: Remove some unused fields in struct pcs_functionChristophe JAILLET2024-04-041-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In "struct pcs_function", the 'pgnames' and 'npgnames' fields are unused. This is a left-over from commit 571aec4df5b7 ("pinctrl: single: Use generic pinmux helpers for managing functions"); Remove them. Found with cppcheck, unusedStructMember. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <a6b653642298d35b1e3656e9bfc6d1b322fbbe68.1712004518.git.christophe.jaillet@wanadoo.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: max77620: Remove an unused fields in struct max77620_pin_info and ↵Christophe JAILLET2024-04-041-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | max77620_pctrl_info In "struct max77620_pin_info", the 'pull_config' field is unused. In "struct max77620_pctrl_info", the 'pins_current_opt' field is unused. Remove them. On my x86_64 config, with allmodconfig, this shrinks the struct max77620_pctrl_info from 360 bytes to 296. Found with cppcheck, unusedStructMember. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <60af8968864ae4a83a76e589b39a2b1e1f65c9db.1711992588.git.christophe.jaillet@wanadoo.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: sun9i-a80-r: drop driver owner assignmentKrzysztof Kozlowski2024-04-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Core in platform_driver_register() already sets the .owner, so driver does not need to. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Message-ID: <20240330210954.100842-1-krzysztof.kozlowski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Fix indentation in a few placesAndy Shevchenko2024-04-041-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the comment, function prototype, and array of strings indentation is kinda broken. Reindent that. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-11-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Sort headers and group pinctrl/*Andy Shevchenko2024-04-041-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One header was misplaced and group pinctrl/* ones to show the relation with the pin control subsystem. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-10-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Make use of dev_err_probe()Andy Shevchenko2024-04-041-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the error handling in probe function by switching from dev_err() to dev_err_probe(). Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-9-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Remove unused irqchip field in struct aw9523_irqAndy Shevchenko2024-04-041-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irqchip field is allocated, assigned but never used. Remove it. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-8-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Get rid of redundant ' & U8_MAX' piecesAndy Shevchenko2024-04-041-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the variable is declared as u8, no need to perform ' & U8_MAX' as it's implied anyway. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-7-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Use temporary variable for HW IRQ numberAndy Shevchenko2024-04-041-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two different ways on how to get HW IRQ number in some functions. Unify that by using temporary variable and irqd_to_hwirq() call. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-6-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Make use of struct pinfunction and PINCTRL_PINFUNCTION()Andy Shevchenko2024-04-041-26/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-5-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Always try both ports in aw9523_gpio_set_multiple()Andy Shevchenko2024-04-041-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ports are equivalent from the user's point of view. Don't limit trying them both if writing to one fails. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-4-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Use correct error code for not supported functionalityAndy Shevchenko2024-04-041-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pin control subsystem internally uses ENOTSUPP for the not supported functionality. The checkpatch is false positive about this error code. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-3-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: aw9523: Destroy mutex on ->remove()Andy Shevchenko2024-04-041-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If aw9523_hw_init() fails on ->remove() the mutex left alive. Destroy it in that case as well. While at it, remove never true check at the beginning of the function. Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Message-ID: <20240329105634.712457-2-andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: armada-37xx: remove an unused variableArnd Bergmann2024-04-021-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This variable has never been used and can be removed to avoid a W=1 warning: drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:837:6: error: variable 'i' set but not used [-Werror,-Wunused-but-set-variable] 837 | int i = 0; Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Message-ID: <20240322132205.906729-1-arnd@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: pinctrl-single: move suspend()/resume() callbacks to noirqThomas Richard2024-03-281-19/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to extend the active period of pinctrl. Some devices may need active pinctrl after suspend() and/or before resume(). So move suspend()/resume() to suspend_noirq()/resume_noirq() in order to have active pinctrl until suspend_noirq() (included), and from resume_noirq() (included). The deprecated API has been removed to use the new one (dev_pm_ops struct). No need to check the pointer returned by dev_get_drvdata(), as platform_set_drvdata() is called during the probe. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Message-ID: <20240102-j7200-pcie-s2r-v4-2-6f1f53390c85@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: qcom: spmi-gpio: Add PMIH0108 and PMD8028 supportAnjelique Melendez2024-03-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for qcom,pmih0108-gpio and qcom,pmd8028-gpio. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Message-ID: <20240326220628.2392802-5-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: qcom: spmi-gpio: Add PMXR2230 and PM6450 supportAnjelique Melendez2024-03-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for qcom,pmxr2230-gpio and qcom,pm6450-gpio. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Message-ID: <20240326220628.2392802-4-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: bcm2835: Implement bcm2711_pinconf_getStefan Wahren2024-03-281-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM2711 allows to read the bias config. So implement pin_conf_get accordingly. The pull resistor values has been taken from the BCM2711/7211 datasheet. This implementation assumes that BCM7211 behaves the same way. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Florian Fainelli <florian.fainelli@broadcom.com> Message-ID: <20240307070113.4888-3-wahrenst@gmx.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: bcm2835: Implement bcm2835_pinconf_getStefan Wahren2024-03-281-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even the driver already has implemented pin_dbg_show, it could be helpful to implement pin_conf_get for a more generic behavior. Contrary to the BCM2711, the BCM2835 SOC doesn't allow to read the bias config, so the implementation is limited to the basics. Keep ENOTSUPP here, because it's only used internally. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Message-ID: <20240307070113.4888-2-wahrenst@gmx.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: pxa2xx: Make use of struct pingroupAndy Shevchenko2024-03-282-22/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since pin control provides a generic data type for the pin group, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240311142346.1261203-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: pxa2xx: Make use of struct pinfunctionAndy Shevchenko2024-03-282-21/+11
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240311140833.1168742-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | | Merge tag 'gpio-updates-for-v6.10-rc1' of ↵Linus Torvalds2024-05-141-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski "This was a quiet release cycle for the GPIO tree and so this pull-request is relatively small. We have one new driver, some minor improvements to the GPIO core code and across several drivers, some DT and documentation updates but in general nothing stands out or is controversial. All changes have spent time in next with no reported issues (or ones that were quickly fixed). GPIO core: - remove more unused legacy interfaces (after converting the last remaining users to better alternatives) - update kerneldocs - improve error handling and log messages in GPIO ACPI code - remove dead code (always true checks) from GPIOLIB New drivers: - add a driver for Intel Granite Rapids-D vGPIO Driver improvements: - use -ENOTSUPP consistently in gpio-regmap and gpio-pcie-idio-24 - provide an ID table for gpio-cros-ec to avoid a driver name fallback check - add support for gpio-ranges for GPIO drivers supporting multiple GPIO banks - switch to using dynamic GPIO base in gpio-brcmstb - fix irq handling in gpio-npcm-sgpio - switch to memory mapped IO accessors in gpio-sch DT bindings: - add support for gpio-ranges to gpio-brcmstb - add support for a new model and the gpio-line-names property to gpio-mpfs Documentation: - replace leading tabs with spaces in code blocks - fix typos" * tag 'gpio-updates-for-v6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (30 commits) gpio: nuvoton: Fix sgpio irq handle error gpiolib: Discourage to use formatting strings in line names gpio: brcmstb: add support for gpio-ranges gpio: of: support gpio-ranges for multiple gpiochip devices dt-bindings: gpio: brcmstb: add gpio-ranges gpio: Add Intel Granite Rapids-D vGPIO driver gpio: brcmstb: Use dynamic GPIO base numbers gpiolib: acpi: Set label for IRQ only lines gpiolib: acpi: Add fwnode name to the GPIO interrupt label gpiolib: Get rid of never false gpio_is_valid() calls gpiolib: acpi: Pass con_id instead of property into acpi_dev_gpio_irq_get_by() gpiolib: acpi: Move acpi_can_fallback_to_crs() out of __acpi_find_gpio() gpiolib: acpi: Simplify error handling in __acpi_find_gpio() gpiolib: acpi: Extract __acpi_find_gpio() helper gpio: sch: Utilise temporary variable for struct device gpio: sch: Switch to memory mapped IO accessors gpio: regmap: Use -ENOTSUPP consistently gpio: pcie-idio-24: Use -ENOTSUPP consistently Documentation: gpio: Replace leading TABs by spaces in code blocks gpiolib: acpi: Check for errors first in acpi_find_gpio() ...
| * \ \ Merge tag 'intel-gpio-v6.10-1' of ↵Bartosz Golaszewski2024-05-071-1/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next intel-gpio for v6.10-1 * New driver for vGPIO controller on Intel Granite Rapids-D * Update ACPI GPIO library to unify the IRQ code path * Better GPIO IRQ line labeling for ACPI * Switched Intel SCH driver to use "mapped" I/O accessors The following is an automated git shortlog grouped by driver: Add Intel Granite Rapids-D vGPIO driver: - Add Intel Granite Rapids-D vGPIO driver crystalcove: - Use -ENOTSUPP consistently gpiolib: - acpi: Set label for IRQ only lines - acpi: Add fwnode name to the GPIO interrupt label - acpi: Pass con_id instead of property into acpi_dev_gpio_irq_get_by() - acpi: Move acpi_can_fallback_to_crs() out of __acpi_find_gpio() - acpi: Simplify error handling in __acpi_find_gpio() - acpi: Extract __acpi_find_gpio() helper - acpi: Check for errors first in acpi_find_gpio() - acpi: Remove never true check in acpi_get_gpiod_by_index() sch: - Utilise temporary variable for struct device - Switch to memory mapped IO accessors wcove: - Use -ENOTSUPP consistently
| | * | | gpiolib: acpi: Pass con_id instead of property into acpi_dev_gpio_irq_get_by()Andy Shevchenko2024-04-151-1/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass the con_id instead of property so that callers won't repeat the GPIO suffixes to try. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* | | | Merge tag 'soc-drivers-6.10' of ↵Linus Torvalds2024-05-133-2/+585
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "As usual, these are updates for drivers that are specific to certain SoCs or firmware running on them. Notable updates include - The new STMicroelectronics STM32 "firewall" bus driver that is used to provide a barrier between different parts of an SoC - Lots of updates for the Qualcomm platform drivers, in particular SCM, which gets a rewrite of its initialization code - Firmware driver updates for Arm FF-A notification interrupts and indirect messaging, SCMI firmware support for pin control and vendor specific interfaces, and TEE firmware interface changes across multiple TEE drivers - A larger cleanup of the Mediatek CMDQ driver and some related bits - Kconfig changes for riscv drivers to prepare for adding Kanaan k230 support - Multiple minor updates for the TI sysc bus driver, memory controllers, hisilicon hccs and more" * tag 'soc-drivers-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (103 commits) firmware: qcom: uefisecapp: Allow on sc8180x Primus and Flex 5G soc: qcom: pmic_glink: Make client-lock non-sleeping dt-bindings: soc: qcom,wcnss: fix bluetooth address example soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234 bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall() bus: etzpc: introduce ETZPC firewall controller driver firmware: arm_ffa: Avoid queuing work when running on the worker queue bus: ti-sysc: Drop legacy idle quirk handling bus: ti-sysc: Drop legacy quirk handling for smartreflex bus: ti-sysc: Drop legacy quirk handling for uarts bus: ti-sysc: Add a description and copyrights bus: ti-sysc: Move check for no-reset-on-init soc: hisilicon: kunpeng_hccs: replace MAILBOX dependency with PCC soc: hisilicon: kunpeng_hccs: Add the check for obtaining complete port attribute firmware: arm_ffa: Fix memory corruption in ffa_msg_send2() bus: rifsc: introduce RIFSC firewall controller driver of: property: fw_devlink: Add support for "access-controller" soc: mediatek: mtk-socinfo: Correct the marketing name for MT8188GV soc: mediatek: mtk-socinfo: Add entry for MT8395AV/ZA Genio 1200 soc: mediatek: mtk-mutex: Add support for MT8188 VPPSYS ...
| * \ \ \ Merge tag 'riscv-config-for-v6.10' of ↵Arnd Bergmann2024-05-071-2/+2
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC Kconfig Updates for v6.10 A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: config: enable ARCH_CANAAN in defconfig RISC-V: drop SOC_VIRT for ARCH_VIRT RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP RISC-V: Drop unused SOC_CANAAN reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 clk: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210 riscv: Kconfig.socs: Split ARCH_CANAAN and SOC_CANAAN_K210 Link: https://lore.kernel.org/r/20240503-mardi-underling-3d81a9f97329@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210Yangyu Chen2024-04-051-2/+2
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since SOC_FOO should be deprecated from patch [1], and cleanup for other SoCs is already in the mailing list [2,3,4], we remove the use of SOC_CANAAN and introduced SOC_CANAAN_K210 for K210-specific drivers, Thus, we replace its drivers depends on SOC_CANAAN_K210 and default select when it has the symbol SOC_CANAAN_K210. [1] https://lore.kernel.org/linux-riscv/20221121221414.109965-1-conor@kernel.org/ [2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/ [3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/ [4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/ Signed-off-by: Yangyu Chen <cyy@cyyself.name> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| * | | | Merge tag 'scmi-updates-6.10' of ↵Arnd Bergmann2024-04-293-0/+583
| |\ \ \ \ | | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers Arm SCMI updates for v6.10 1. Basic support for SCMI v3.2 pincontrol protocol SCMI v3.2 introduces pincontrol protocol which is intended for controlling pins and their configuration. The pin control protocol provides commands to: - List the pins, groups of pins, available functions, and their association with each other. - Set the parameter configuration and multiplexing of the pins or groups of pins - Optionally request exclusive access to a pin or group of pins. - Optionally configure the permissions of an agent to access a pin or group of pins. These changes adds basic support for the same in the SCMI core layer and an implementation of the generic scmi-pinctrl driver with associated DT bindings. 2. Framework support for multiple vendors custom protocols With the fixed space for vendor protocols, the possibility of having multiple vendors implementing distinct SCMI vendor protocols with the same overlapping protocol number is very high and with the need to support them all in a single kernel image or a module is also high. In order to implement the same we assume: - vendor protocols has to be tagged at build time with a vendor_id - vendor protocols could also optionally be tagged at build time with sub_vendor_id and implementation version At the initialisation all the built vendor protocols are registered with the SCMI core using a key derived from the above tags 3. Logging and tracing improvements This includes using dev_err_probe() to bail out from probe, adding message dump traces for bad and unexpected replies and widening of the tag buffer in trace_scmi_dump_msg to allow diverse tag names 4. Miscellaneous updates or improvements This includes adding the accessor function get_max_msg_size() used in pinctl protocol, updation of dt-bindings examples for protocol@13 to promote new bindings and simplification of scmi_devm_notifier_unregister * tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: pinctrl: Implementation of the generic scmi-pinctrl driver firmware: arm_scmi: Add basic support for SCMI v3.2 pincontrol protocol dt-bindings: firmware: Support SCMI pinctrl protocol firmware: arm_scmi: Introduce get_max_msg_size() helper/accessor firmware: arm_scmi: Add support for multiple vendors custom protocols dt-bindings: firmware: arm,scmi: Update examples for protocol@13 firmware: arm_scmi: Avoid non-constant printk format strings firmware: arm_scmi: Use dev_err_probe to bail out firmware: arm_scmi: Simplify scmi_devm_notifier_unregister firmware: arm_scmi: Add message dump traces for bad and unexpected replies firmware: arm_scmi: Add helper to trace bad messages include: trace: Widen the tag buffer in trace_scmi_dump_msg firmware: arm_scmi: Log the perf domain names in the error paths Link: https://lore.kernel.org/r/20240426105031.1526987-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | pinctrl: Implementation of the generic scmi-pinctrl driverPeng Fan2024-04-193-0/+583
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | scmi-pinctrl driver implements pinctrl driver interface and using SCMI protocol to redirect messages from pinctrl subsystem SDK to SCMI platform firmware, which does the changes in HW. Co-developed-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Signed-off-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20240418-pinctrl-scmi-v11-4-499dca9864a7@nxp.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
* | | | Merge tag 'pinctrl-v6.9-2' of ↵Linus Torvalds2024-04-308-96/+98
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Fix a double-free in the pinctrl_enable() errorpath - Fix a refcount leak in pinctrl_dt_to_map() - Fix selecting the GPIO pin control state and the UART3 pin config group in the Intel Baytrail driver - Fix readback of schmitt trigger status in the Mediatek Paris driver, along with some semantic pin config issues in this driver - Fix a pin suffix typo in the Meson A1 driver - Fix an erroneous register offset in he Aspeed G6 driver - Fix an inconsistent lock state and the interrupt type on resume in the Renesas RZG2L driver - Fix some minor confusion in the Renesas DT bindings * tag 'pinctrl-v6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: renesas: rzg2l: Configure the interrupt type on resume pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map() pinctrl: baytrail: Add pinconf group for uart3 pinctrl: baytrail: Fix selecting gpio pinctrl state pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback pinctrl: core: delete incorrect free in pinctrl_enable() pinctrl/meson: fix typo in PDM's pin name pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T pinctrl: renesas: rzg2l: Execute atomically the interrupt configuration dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow 'input' and 'output-enable' properties
| * | | Merge tag 'intel-pinctrl-v6.9-1' of ↵Linus Walleij2024-04-252-37/+45
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v6.9-1 * Correct GPIO selection and add UART3 pins for Intel Bay Trail The following is an automated git shortlog grouped by driver: baytrail: - Add pinconf group for uart3 - Fix selecting gpio pinctrl state Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | pinctrl: baytrail: Add pinconf group for uart3Hans de Goede2024-04-081-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO_S0_SC57 / GPIO_S0_SC61 can be muxed to PCU_UART_TXD / PCU_UART_RXD, add a pinconf group for this. On Bay Trail board schematics using these pins as UART these are called UART3_TXD / UART3_RXD, name the pinconf group "uart3_grp" to be consistent with the schematics. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * | | pinctrl: baytrail: Fix selecting gpio pinctrl stateHans de Goede2024-04-082-36/+42
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For all the "score" pin-groups all the intel_pingroup-s to select the non GPIO function are re-used for byt_score_gpio_groups[]. But this is incorrect since a pin-group includes the mode setting, which for the non GPIO functions generally is 1, where as to select the GPIO function mode must be set to 0. So the GPIO function needs separate intel_pingroup-s with their own mode value of 0. Add a new PIN_GROUP_GPIO macro which adds a foo_gpio entry to each pin-group defined this way and update byt_score_gpio_groups[] to point to the new foo_gpio entries. The "sus" usb_oc_grp usb_ulpi_grp and pcu_spi_grp pin-groups are special because these have a non 0 mode value to select the GPIO functions and these already have matching foo_gpio pin-groups, leave these are unchanged. The pmu_clk "sus" groups added in commit 2f46d7f7e959 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk") do need to use the new PIN_GROUP_GPIO macro. Fixes: 2f46d7f7e959 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk") Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | | Merge tag 'renesas-pinctrl-fixes-for-v6.9-tag2' of ↵Linus Walleij2024-04-251-10/+13
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into fixes pinctrl: renesas: Fixes for v6.9 (take two) - Fix interrupt configuration on RZ/G2L after s2ram. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | pinctrl: renesas: rzg2l: Configure the interrupt type on resumeClaudiu Beznea2024-04-221-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit dce0919c83c3 ("irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time") removed the setup of TINT from rzg2l_irqc_irq_enable(). To address the spurious interrupt issue the setup of TINT has been moved in rzg2l_tint_set_edge() through rzg2l_disable_tint_and_set_tint_source(). With this, the interrupts are not properly re-configured after a suspend-to-RAM cycle. To address this issue and avoid spurious interrupts while resumming set the interrupt type before enabling it. Fixes: dce0919c83c3 ("irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240419063822.3467424-1-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | | Merge tag 'renesas-pinctrl-fixes-for-v6.9-tag1' of ↵Linus Walleij2024-04-171-1/+10
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into fixes pinctrl: renesas: Fixes for v6.9 - Fix a dtbs_check warning on RZ/G3S, - Fix a lockdep warning on RZ/G2L. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | pinctrl: renesas: rzg2l: Execute atomically the interrupt configurationClaudiu Beznea2024-03-261-1/+10
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lockdep detects a possible deadlock as listed below. This is because it detects the IA55 interrupt controller .irq_eoi() API is called from interrupt context while configuration-specific API (e.g., .irq_enable()) could be called from process context on resume path (by calling rzg2l_gpio_irq_restore()). To avoid this, protect the call of rzg2l_gpio_irq_enable() with spin_lock_irqsave()/spin_unlock_irqrestore(). With this the same approach that is available in __setup_irq() is mimicked to pinctrl IRQ resume function. Below is the lockdep report: WARNING: inconsistent lock state 6.8.0-rc5-next-20240219-arm64-renesas-00030-gb17a289abf1f #90 Not tainted -------------------------------- inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage. str_rwdt_t_001./159 [HC0[0]:SC0[0]:HE1:SE1] takes: ffff00000b001d70 (&rzg2l_irqc_data->lock){?...}-{2:2}, at: rzg2l_irqc_irq_enable+0x60/0xa4 {IN-HARDIRQ-W} state was registered at: lock_acquire+0x1e0/0x310 _raw_spin_lock+0x44/0x58 rzg2l_irqc_eoi+0x2c/0x130 irq_chip_eoi_parent+0x18/0x20 rzg2l_gpio_irqc_eoi+0xc/0x14 handle_fasteoi_irq+0x134/0x230 generic_handle_domain_irq+0x28/0x3c gic_handle_irq+0x4c/0xbc call_on_irq_stack+0x24/0x34 do_interrupt_handler+0x78/0x7c el1_interrupt+0x30/0x5c el1h_64_irq_handler+0x14/0x1c el1h_64_irq+0x64/0x68 _raw_spin_unlock_irqrestore+0x34/0x70 __setup_irq+0x4d4/0x6b8 request_threaded_irq+0xe8/0x1a0 request_any_context_irq+0x60/0xb8 devm_request_any_context_irq+0x74/0x104 gpio_keys_probe+0x374/0xb08 platform_probe+0x64/0xcc really_probe+0x140/0x2ac __driver_probe_device+0x74/0x124 driver_probe_device+0x3c/0x15c __driver_attach+0xec/0x1c4 bus_for_each_dev+0x70/0xcc driver_attach+0x20/0x28 bus_add_driver+0xdc/0x1d0 driver_register+0x5c/0x118 __platform_driver_register+0x24/0x2c gpio_keys_init+0x18/0x20 do_one_initcall+0x70/0x290 kernel_init_freeable+0x294/0x504 kernel_init+0x20/0x1cc ret_from_fork+0x10/0x20 irq event stamp: 69071 hardirqs last enabled at (69071): [<ffff800080e0dafc>] _raw_spin_unlock_irqrestore+0x6c/0x70 hardirqs last disabled at (69070): [<ffff800080e0cfec>] _raw_spin_lock_irqsave+0x7c/0x80 softirqs last enabled at (67654): [<ffff800080010614>] __do_softirq+0x494/0x4dc softirqs last disabled at (67645): [<ffff800080015238>] ____do_softirq+0xc/0x14 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&rzg2l_irqc_data->lock); <Interrupt> lock(&rzg2l_irqc_data->lock); *** DEADLOCK *** 4 locks held by str_rwdt_t_001./159: #0: ffff00000b10f3f0 (sb_writers#4){.+.+}-{0:0}, at: vfs_write+0x1a4/0x35c #1: ffff00000e43ba88 (&of->mutex){+.+.}-{3:3}, at: kernfs_fop_write_iter+0xe8/0x1a8 #2: ffff00000aa21dc8 (kn->active#40){.+.+}-{0:0}, at: kernfs_fop_write_iter+0xf0/0x1a8 #3: ffff80008179d970 (system_transition_mutex){+.+.}-{3:3}, at: pm_suspend+0x9c/0x278 stack backtrace: CPU: 0 PID: 159 Comm: str_rwdt_t_001. Not tainted 6.8.0-rc5-next-20240219-arm64-renesas-00030-gb17a289abf1f #90 Hardware name: Renesas SMARC EVK version 2 based on r9a08g045s33 (DT) Call trace: dump_backtrace+0x94/0xe8 show_stack+0x14/0x1c dump_stack_lvl+0x88/0xc4 dump_stack+0x14/0x1c print_usage_bug.part.0+0x294/0x348 mark_lock+0x6b0/0x948 __lock_acquire+0x750/0x20b0 lock_acquire+0x1e0/0x310 _raw_spin_lock+0x44/0x58 rzg2l_irqc_irq_enable+0x60/0xa4 irq_chip_enable_parent+0x1c/0x34 rzg2l_gpio_irq_enable+0xc4/0xd8 rzg2l_pinctrl_resume_noirq+0x4cc/0x520 pm_generic_resume_noirq+0x28/0x3c genpd_finish_resume+0xc0/0xdc genpd_resume_noirq+0x14/0x1c dpm_run_callback+0x34/0x90 device_resume_noirq+0xa8/0x268 dpm_noirq_resume_devices+0x13c/0x160 dpm_resume_noirq+0xc/0x1c suspend_devices_and_enter+0x2c8/0x570 pm_suspend+0x1ac/0x278 state_store+0x88/0x124 kobj_attr_store+0x14/0x24 sysfs_kf_write+0x48/0x6c kernfs_fop_write_iter+0x118/0x1a8 vfs_write+0x270/0x35c ksys_write+0x64/0xec __arm64_sys_write+0x18/0x20 invoke_syscall+0x44/0x108 el0_svc_common.constprop.0+0xb4/0xd4 do_el0_svc+0x18/0x20 el0_svc+0x3c/0xb8 el0t_64_sync_handler+0xb8/0xbc el0t_64_sync+0x14c/0x150 Fixes: 254203f9a94c ("pinctrl: renesas: rzg2l: Add suspend/resume support") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240320104230.446400-2-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map()Zeng Heng2024-04-161-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we fail to allocate propname buffer, we need to drop the reference count we just took. Because the pinctrl_dt_free_maps() includes the droping operation, here we call it directly. Fixes: 91d5c5060ee2 ("pinctrl: devicetree: fix null pointer dereferencing in pinctrl_dt_to_map") Suggested-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Zeng Heng <zengheng4@huawei.com> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Message-ID: <20240415105328.3651441-1-zengheng4@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLEChen-Yu Tsai2024-04-041-27/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a misinterpretation of some of the PIN_CONFIG_* options in this driver library. PIN_CONFIG_OUTPUT_ENABLE should refer to a buffer or switch in the output direction of the electrical path. The MediaTek hardware does not have such a thing. The driver incorrectly maps this option to the GPIO function's direction. Likewise, PIN_CONFIG_INPUT_ENABLE should refer to a buffer or switch in the input direction. The hardware does have such a mechanism, and is mapped to the IES bit. The driver however sets the direction in addition to the IES bit, which is incorrect. On readback, the IES bit isn't even considered. Ironically, the driver does not support readback for PIN_CONFIG_OUTPUT, while its readback of PIN_CONFIG_{INPUT,OUTPUT}_ENABLE is what it should be doing for PIN_CONFIG_OUTPUT. Rework support for these three options, so that PIN_CONFIG_OUTPUT_ENABLE is completely removed, PIN_CONFIG_INPUT_ENABLE is only linked to the IES bit, and PIN_CONFIG_OUTPUT is linked to the GPIO function's direction and output level. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240327091336.3434141-3-wenst@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readbackChen-Yu Tsai2024-04-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the generic pin config library, readback of some options are handled differently compared to the setting of those options: the argument value is used to convey enable/disable of an option in the set path, but success or -EINVAL is used to convey if an option is enabled or disabled in the debugfs readback path. PIN_CONFIG_INPUT_SCHMITT_ENABLE is one such option. Fix the readback of the option in the mediatek-paris library, so that the debugfs dump is not showing "input schmitt enabled" for pins that don't have it enabled. Fixes: 1bea6afbc842 ("pinctrl: mediatek: Refine mtk_pinconf_get()") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240327091336.3434141-2-wenst@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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