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* | pinctrl: ns2: Fix off by one bugs in ns2_pinmux_enable()Dan Carpenter2019-10-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The pinctrl->functions[] array has pinctrl->num_functions elements and the pinctrl->groups[] array is the same way. These are set in ns2_pinmux_probe(). So the > comparisons should be >= so that we don't read one element beyond the end of the array. Fixes: b5aa1006e4a9 ("pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20190926081426.GB2332@mwanda Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | pinctrl: bcm-iproc: Use SPDX headerLinus Walleij2019-10-051-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | This convert the BCM IPROC driver to use the SPDX header for indicating GPL v2.0 only licensing. Cc: Pramod Kumar <pramodku@broadcom.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Scott Branden <scott.branden@broadcom.com> Link: https://lore.kernel.org/r/20191002130217.4491-1-linus.walleij@linaro.org
* | pinctrl: armada-37xx: fix control of pins 32 and upPatrick Williams2019-10-041-9/+9
|/ | | | | | | | | | | | | | | | | The 37xx configuration registers are only 32 bits long, so pins 32-35 spill over into the next register. The calculation for the register address was done, but the bitmask was not, so any configuration to pin 32 or above resulted in a bitmask that overflowed and performed no action. Fix the register / offset calculation to also adjust the offset. Fixes: 5715092a458c ("pinctrl: armada-37xx: Add gpio support") Signed-off-by: Patrick Williams <alpawi@amazon.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20191001154634.96165-1-alpawi@amazon.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'pinctrl-v5.4-1' of ↵Linus Torvalds2019-09-1981-2295/+7597
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.4 kernel cycle: Core changes: - Fix errors in example code in the documentation. New drivers: - Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the Ingenic driver. - Support Cirrus Logic Madera CS47L92 and CS47L15. - Support Allwinner Sunxi V3S. - Support Aspeed 2600 BMC. - Support Qualcomm SC7180. - Support Marvell MVEBU CS115. Driver improvements: - Clean up a few drivers to use the devm_platform_ioremap_resource() helper. - Pass the irqchip when registering the gpio_chip in some pin controllers that are also GPIO controllers. - Support suspend/resume in the Tegra driver. - Support pull-up on the Broadcom BCM2711. - The Intel driver can now request locked pads. - Fix the UFS reset pin in the Qualcomm SDM845 driver" * tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits) pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux() pinctrl: bcm: remove redundant assignment to pointer log pinctrl: iproc: Add 'get_direction' support pinctrl: iproc-gpio: Handle interrupts for multiple instances pinctrl: iproc-gpio: Fix incorrect pinconf configurations pinctrl: intel: mark intel_pin_to_gpio __maybe_unused pinctrl: qcom: sdm845: Fix UFS_RESET pin pinctrl: mvebu: add additional variant for standalone CP115 pinctrl: mvebu: Add CP110 missing pin functionality dt-bindings: cp110: document the new CP115 pinctrl compatible pinctrl: bcm2835: Pass irqchip when adding gpiochip pinctrl: meson: meson: Add of_node_put() before return pinctrl/gpio: Take MUX usage into account dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support pinctrl: amd: disable spurious-firing GPIO IRQs pinctrl: rza2: Include the appropriate headers pinctrl: rza2: Drop driver use of consumer flags ...
| * pinctrl: meson-gxbb: Fix wrong pinning definition for uart_cOtto Meier2019-09-131-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi i tried to use the uart_C of the the odroid-c2. I enabled it in the dts file. During boot it crashed when the the sdcard slot is addressed. After long search in the net i found this: https://forum.odroid.com/viewtopic.php?f=139&t=25371&p=194370&hilit=uart_C#p177856 After changing the pin definitions accordingly erverything works. Uart_c is functioning and sdcard ist working. Fixes: 6db0f3a8a04e46 ("pinctrl: amlogic: gxbb: add more UART pins") Signed-off-by: Otto Meier <gf435@gmx.net> Link: https://lore.kernel.org/r/1cc32a18-464d-5531-7a1c-084390e2ecb1@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()Dan Carpenter2019-09-121-2/+4
| | | | | | | | | | | | | | | | | | | | | | We need to unlock and enable IRQs before we return on this error path. Fixes: 8a0cc47ccc7c ("pinctrl: sh-pfc: Rollback to mux if required when the gpio is freed") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20190827093927.GB8443@mwanda Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge tag 'intel-pinctrl-v5.4-2' of ↵Linus Walleij2019-09-121-1/+1
| |\ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.4 part 2 Just a single fix for build warning introduced in the previous pull.
| | * pinctrl: intel: mark intel_pin_to_gpio __maybe_unusedArnd Bergmann2019-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The intel_pin_to_gpio() function is only called by the PM support functions and causes a warning when those are disabled: drivers/pinctrl/intel/pinctrl-intel.c:841:12: error: unused function 'intel_pin_to_gpio' [-Werror,-Wunused-function] Mark it __maybe_unused to suppress the warning. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Chris Chiu <chiu@endlessm.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * | pinctrl: bcm: remove redundant assignment to pointer logColin Ian King2019-09-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer log is being initialized with a value that is never read and is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20190905140919.29283-1-colin.king@canonical.com Reviewed-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: iproc: Add 'get_direction' supportRayagonda Kokatanur2019-09-121-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Add 'get_direction' support to the iProc GPIO driver. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Link: https://lore.kernel.org/r/1568178685-30738-1-git-send-email-rayagonda.kokatanur@broadcom.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: iproc-gpio: Handle interrupts for multiple instancesRayagonda Kokatanur2019-09-111-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When multiple instance of iproc-gpio chips are present, a fix up message[1] is printed during the probe of second and later instances. This issue is because driver sharing same irq_chip data structure among multiple instances of driver. Fix this by allocating irq_chip data structure per instance of iproc-gpio. [1] fix up message addressed by this patch [ 7.862208] gpio gpiochip2: (689d0000.gpio): detected irqchip that is shared with multiple gpiochips: please fix the driver. Fixes: 616043d58a89 ("pinctrl: Rename gpio driver from cygnus to iproc") Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Link: https://lore.kernel.org/r/1567054348-19685-3-git-send-email-srinath.mannam@broadcom.com [Rebased on top of new irq chip set-up code] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: iproc-gpio: Fix incorrect pinconf configurationsLi Jin2019-09-111-19/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix drive strength for AON/CRMU controller; fix pull-up/down setting for CCM/CDRU controller. Fixes: 616043d58a89 ("pinctrl: Rename gpio driver from cygnus to iproc") Signed-off-by: Li Jin <li.jin@broadcom.com> Link: https://lore.kernel.org/r/1567054348-19685-2-git-send-email-srinath.mannam@broadcom.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: qcom: sdm845: Fix UFS_RESET pinStephen Boyd2019-09-041-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UFS_RESET pin is the magical pin #150 now, not 153 per the sdm845_groups array declared in this file. Fix the order of pins so that UFS_RESET is 150 and the SDC pins follow after. Fixes: 53a5372ce326 ("pinctrl: qcom: sdm845: Expose ufs_reset as gpio") Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190830060227.12792-1-swboyd@chromium.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | Merge tag 'intel-pinctrl-v5.4' of ↵Linus Walleij2019-09-0412-119/+156
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.4 A collection of improvements and fixes for Intel pinctrl drivers including: - Converting drivers to use new devm_platform_ioremap_resource() helper function. - Make Interrupt Status (IS) register configurable. - Allow locked pins to be requested and used as long as they are not modified. - Fix intel_pinctrl_should_save() to translate pin number to GPIO number where needed. This fixes Asus X571GT touchpad unresponsiveness issue after suspend/resume cycle.
| | * pinctrl: intel: remap the pin number to gpio offset for irq enabled pinChris Chiu2019-08-191-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Asus X571GT, GPIO 297 is configured as an interrupt and serves for the touchpad. The touchpad will report input events much less than expected after S3 suspend/resume, which results in extremely slow cursor movement. However, the number of interrupts observed from /proc/interrupts increases much more than expected even no touching touchpad. This is due to the value of PADCFG0 of PIN 225 for the interrupt has been changed from 0x80800102 to 0x80100102. The GPIROUTIOXAPIC is toggled on which results in the spurious interrupts. The PADCFG0 of PIN 225 is expected to be saved during suspend, but the 297 is saved instead because the gpiochip_line_is_irq() expect the GPIO offset but what's really passed to it is PIN number. In this case, the /sys/kernel/debug/pinctrl/INT3450:00/gpio-ranges shows 288: INT3450:00 GPIOS [436 - 459] PINS [216 - 239] So gpiochip_line_is_irq() returns true for GPIO offset 297, the suspend routine spuriously saves the content for PIN 297 which we expect to save for PIN 225. This commit maps the PIN number to GPIO offset first in the intel_pinctrl_should_save() to make sure the values for the specific PINs can be correctly saved and then restored. Fixes: c538b9436751 ("pinctrl: intel: Only restore pins that are used by the driver") Signed-off-by: Chris Chiu <chiu@endlessm.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Allow to request locked padsAndy Shevchenko2019-08-181-17/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some firmwares would like to protect pads from being modified by OS and at the same time provide them to OS as a resource. So, the driver in such circumstances may request pad and may not change its state. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: denverton: Update pin names according to v1.08Andy Shevchenko2019-08-081-24/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | Version 1.08 of pin list has some changes in pin names for Intel Denverton. Update the driver accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: cherryview: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-08-071-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-08-071-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| | * pinctrl: intel: Use NSEC_PER_USEC for debounce calculusAndy Shevchenko2019-08-071-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace hard coded constants with self-explanatory names, i.e. use NSEC_PER_USEC for debounce calculus. While here, add a unit suffix to debounce period constant. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: baytrail: Re-use data structures from pinctrl-intel.h (part 2)Andy Shevchenko2019-08-072-44/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have some data structures duplicated across the drivers. Let's deduplicate them by using ones that being provided by pinctrl-intel.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: intel: Remove default Interrupt Status offsetAndy Shevchenko2019-08-072-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the drivers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: lewisburg: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: denverton: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: sunrisepoint: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: icelake: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: geminilake: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: cannonlake: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: broxton: Provide Interrupt Status register offsetAndy Shevchenko2019-08-071-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: intel: Simplify offset validation in intel_get_padcfg()Andy Shevchenko2019-08-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | There is more generic and simpler validation just against the nregs. Using it allows to drop customization from the intel_get_padcfg(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: intel: Drop double check for data in intel_pinctrl_probe_by_uid()Andy Shevchenko2019-07-231-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | There is no need to duplicate the check which is done in the common intel_pinctrl_probe(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: merrifield: Use devm_platform_ioremap_resource()Andy Shevchenko2019-07-231-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: intel: Use devm_platform_ioremap_resource()Andy Shevchenko2019-07-231-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: cherryview: Use devm_platform_ioremap_resource()Andy Shevchenko2019-07-231-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| | * pinctrl: baytrail: Use devm_platform_ioremap_resource()Andy Shevchenko2019-07-231-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * | pinctrl: mvebu: add additional variant for standalone CP115Grzegorz Jaszczyk2019-08-271-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CP115 standalone modules, all MPP configuration are possible. Handle this new possibility thanks to the new "marvell,cp115-standalone-pinctrl" compatible property. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> [<miquel.raynal@bootlin.com>: mention the new compatible in the commit log] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20190805101607.29811-4-miquel.raynal@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: mvebu: Add CP110 missing pin functionalityKonstantin Porotchkin2019-08-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing definition for function 0xe on CP-110 MPP-62. The pin function is Data Strobe for SDIO interface. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20190805101607.29811-2-miquel.raynal@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | pinctrl: bcm2835: Pass irqchip when adding gpiochipLinus Walleij2019-08-261-30/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. The BCM2835 has multiple parents so let's exploit the new facility in the GPIO_IRQCHIP to actually deal with multiple parents. Cc: Eric Anholt <eric@anholt.net> Cc: Thierry Reding <treding@nvidia.com> [Rebased on changes in the pinctrl tree] Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Link: https://lore.kernel.org/r/20190812062729.1892-1-linus.walleij@linaro.org
| * | Merge tag 'sh-pfc-for-v5.4-tag2' of ↵Linus Walleij2019-08-234-34/+42
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.4 (take two) - Support switching between function and gpio at runtime, - Small fixes and cleanups.
| | * | pinctrl: rza2: Include the appropriate headersLinus Walleij2019-08-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is implementing a GPIO driver so include <linux/gpio/driver.h> and not the legacy API <linux/gpio.h>. When testing it turns out it also relies on implicit inclusion of <linux/io.h> (readw etc) so make sure to include that as well. Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | pinctrl: rza2: Drop driver use of consumer flagsLinus Walleij2019-08-231-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These flags are for consumers of GPIO lines, not for drivers. Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | pinctrl: rza1: Add of_node_put() before returnNishka Dasgupta2019-08-231-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in three places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | pinctrl: sh-pfc: Include the right headerLinus Walleij2019-08-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a GPIO driver, use the appropriate header <linux/gpio/driver.h> rather than the legacy <linux/gpio.h> header. Cc: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | pinctrl: sh-pfc: Rollback to mux if required when the gpio is freedYoshihiro Shimoda2019-08-231-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers require switching between function and gpio at run-time. Allow to roll back from gpio to mux when the gpio is freed. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | pinctrl: sh-pfc: Remove incomplete flag "cfg->type"Yoshihiro Shimoda2019-08-121-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old commit c58d9c1b26e3 ("sh-pfc: Implement generic pinconf support") broke the cfg->type flag to PINMUX_TYPE_FUNCTION because sh_pfc_pinconf_set() didn't call sh_pfc_reconfig_pin(). Now if we fix the cfg->type condition, it gets worse because: - Some drivers might be deferred so that .set_mux() will be called multiple times. - In such the case, the sh-pfc driver returns -EBUSY even if the group is the same, and then that driver fails to probe. Since the pinctrl subsystem already has such conditions according to @set_mux and @gpio_request_enable, this patch just remove the incomplete flag from sh-pfc/pinctrl.c. Fixes: c58d9c1b26e3 ("sh-pfc: Implement generic pinconf support") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | pinctrl: sh-pfc: Add new flags into struct sh_pfc_pin_configYoshihiro Shimoda2019-08-121-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To clean/modify the code up later, this patch just adds new flags "mux_set" and "gpio_enabled" into the struct sh_pfc_pin_config. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | | pinctrl: meson: meson: Add of_node_put() before returnNishka Dasgupta2019-08-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190815060718.3286-1-nishkadg.linux@gmail.com Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl/gpio: Take MUX usage into accountStefan Wahren2019-08-233-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The user space like gpioinfo only see the GPIO usage but not the MUX usage (e.g. I2C or SPI usage) of a pin. As a user we want to know which pin is free/safe to use. So take the MUX usage of strict pinmux controllers into account to get a more realistic view for ioctl GPIO_GET_LINEINFO_IOCTL. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Tested-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Link: https://lore.kernel.org/r/20190814110035.13451-1-ramon.fried@linux.intel.com Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l supportVinod Koul2019-08-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the PM8150l GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190814123512.6017-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b supportVinod Koul2019-08-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the PM8150b GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190814123512.6017-2-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 00:05:16 +0000