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path: root/drivers/pwm/pwm-jz4740.c
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* pwm: jz4740: Use regmap_{set,clear}_bitsPaul Cercueil2022-11-291-6/+4
| | | | | | | | | | Simplify a bit the code by using regmap_set_bits() and regmap_clear_bits() instead of regmap_update_bits() when possible. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Force dependency on Device TreePaul Cercueil2022-11-291-6/+4
| | | | | | | | | Ingenic SoCs all require CONFIG_OF, so there is no case where we want to use this driver without CONFIG_OF. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Add support for X1000 SoCAidan MacDonald2022-02-241-0/+5
| | | | | | | | The X1000 has the same TCU / PWM hardware as other Ingenic SoCs, but it has only 5 channels. Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Simplify using devm_pwmchip_add()Uwe Kleine-König2021-09-021-11/+1
| | | | | | | | This allows to drop the platform_driver's remove function. This is the only user of driver data so this can go away, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Simplify all drivers with explicit of_pwm_n_cells = 3Uwe Kleine-König2021-05-251-2/+0
| | | | | | | | | | | | | | With the previous commit there is no need for the lowlevel driver any more to specify it it uses two or three cells. So simplify accordingly. The only non-trival change affects the pwm-rockchip driver: It used to only support three cells if the hardware supports polarity. Now the default number depends on the device tree which has to match hardware anyhow (and if it doesn't the error is just a bit delayed as a PWM handle with an inverted setting is catched when pwm_apply_state() is called). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Always allocate PWM chip base ID dynamicallyUwe Kleine-König2021-03-221-1/+0
| | | | | | | | | | Since commit 5e5da1e9fbee ("pwm: ab8500: Explicitly allocate pwm chip base dynamically") all drivers use dynamic ID allocation explicitly. New drivers are supposed to do the same, so remove support for driver specified base IDs and drop all assignments in the low-level drivers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Simplify with dev_err_probe()Krzysztof Kozlowski2020-09-241-6/+3
| | | | | | | | | Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Add support for the JZ4725BPaul Cercueil2020-06-021-4/+20
| | | | | | | | The PWM hardware in the JZ4725B works the same as in the JZ4740, but has only six channels available. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Make PWM start with the active partPaul Cercueil2020-06-021-9/+16
| | | | | | | | | | | | | | | | | | | | | | The PWM in Ingenic SoCs starts in inactive state until the internal timer reaches the duty value, then becomes active until the timer reaches the period value. In theory, we should then use (period - duty) as the real duty value, as a high duty value would otherwise result in the PWM pin being inactive most of the time. This is the reason why the duty value was inverted in the driver until now, but it still had the problem that it would not start with the active part. To address this remaining issue, the common trick is to invert the duty, and invert the polarity when the PWM is enabled. Since the duty was already inverted, and we invert it again, we now program the hardware for the requested duty, and simply invert the polarity when the PWM is enabled. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Enhance precision in calculation of duty cyclePaul Cercueil2020-06-021-3/+3
| | | | | | | | | | | | | | | Calculating the hardware value for the duty from the hardware value of the period resulted in a precision loss versus calculating it from the clock rate directly. (Also remove a cast that doesn't really need to be here) Fixes: f6b8a5700057 ("pwm: Add Ingenic JZ4740 support") Cc: <stable@vger.kernel.org> Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Allow selection of PWM channels 0 and 1Paul Cercueil2020-03-301-5/+14
| | | | | | | | | | The TCU channels 0 and 1 were previously reserved for system tasks, and thus unavailable for PWM. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Obtain regmap from parent nodePaul Cercueil2020-03-301-24/+43
| | | | | | | | | | | | | | The TCU registers are shared between a handful of drivers, accessing them through the same regmap. While this driver is devicetree-compatible, it is never (as of now) probed from devicetree, so this change does not introduce a ABI problem with current devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Improve algorithm of clock calculationPaul Cercueil2020-03-301-15/+29
| | | | | | | | | | | | | | | | | | | The previous algorithm hardcoded details about how the TCU clocks work. The new algorithm will use clk_round_rate to find the perfect clock rate for the PWM channel. This code relies on the fact that clk_round_rate() will always round down, which is not a valid assumption given by the clk API, but only happens to be true with the clk drivers used for Ingenic SoCs. Right now, there is no alternative as the clk API does not have a round-down function (and won't have one for a while), but if it ever comes to light, a round-down function should be used instead. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Use clocks from TCU driverPaul Cercueil2020-03-301-14/+40
| | | | | | | | | | | | | | | | | | | | The ingenic-timer "TCU" driver provides us with clocks, that can be (un)gated, reparented or reclocked from devicetree, instead of having these settings hardcoded in this driver. The new code now uses a clk pointer per PWM (instead of a clk per pwm-chip before). So the pointer is stored in per-pwm data now. The calls to arch-specific timer code is replaced with standard clock API calls to start and stop each channel's clock. While this driver is devicetree-compatible, it is never (as of now) probed from devicetree, so this change does not introduce a ABI problem with current devicetree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Mathieu Malaterre <malat@debian.org> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Ensure pwm_apply_state() doesn't modify the state argumentUwe Kleine-König2019-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is surprising for a PWM consumer when the variable holding the requested state is modified by pwm_apply_state(). Consider for example a driver doing: #define PERIOD 5000000 #define DUTY_LITTLE 10 ... struct pwm_state state = { .period = PERIOD, .duty_cycle = DUTY_LITTLE, .polarity = PWM_POLARITY_NORMAL, .enabled = true, }; pwm_apply_state(mypwm, &state); ... state.duty_cycle = PERIOD / 2; pwm_apply_state(mypwm, &state); For sure the second call to pwm_apply_state() should still have state.period = PERIOD and not something the hardware driver chose for a reason that doesn't necessarily apply to the second call. So declare the state argument as a pointer to a const type and adapt all drivers' .apply callbacks. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Document known limitationsUwe Kleine-König2019-09-211-0/+5
| | | | | | | | | | The JZ4740 PWM implementation doesn't fulfill the (up to now insufficiently documented) requirements of the PWM API. At least document them in the driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* Merge tag 'pwm/for-5.3-rc1' of ↵Linus Torvalds2019-07-091-28/+21
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This set of changes contains a new driver for SiFive SoCs as well as enhancements to the core (device links are used to track dependencies between PWM providers and consumers, support for PWM controllers via ACPI, sysfs will now suspend/resume PWMs that it has claimed) and various existing drivers" * tag 'pwm/for-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (37 commits) pwm: fsl-ftm: Make sure to unlock mutex on failure pwm: fsl-ftm: Use write protection for prescaler & polarity pwm: fsl-ftm: More relaxed permissions for updating period pwm: atmel-hlcdc: Add compatible for SAM9X60 HLCDC's PWM pwm: bcm2835: Improve precision of PWM leds: pwm: Support ACPI via firmware-node framework pwm: Add support referencing PWMs from ACPI pwm: rcar: Remove suspend/resume support pwm: sysfs: Add suspend/resume support pwm: Add power management descriptions pwm: meson: Add documentation to the driver pwm: meson: Add support PWM_POLARITY_INVERSED when disabling pwm: meson: Don't cache struct pwm_state internally pwm: meson: Read the full hardware state in meson_pwm_get_state() pwm: meson: Simplify the calculation of the pre-divider and count pwm: meson: Move pwm_set_chip_data() to meson_pwm_request() pwm: meson: Add the per-channel register offsets and bits in a struct pwm: meson: Add the meson_pwm_channel data to struct meson_pwm pwm: meson: Pass struct pwm_device to meson_pwm_calc() pwm: meson: Don't duplicate the polarity internally ...
| * pwm: jz4740: Force TCU2 channels to return to their init levelPaul Cercueil2019-06-261-1/+9
| | | | | | | | | | | | | | | | | | | | When the PWM mode of TCU2 channels is disabled, their corresponding pin does not always return to its initial level. Force this by using a small trick: we set duty > period, which is an invalid configuration for the hardware, which then correctly resets the pin to the initial level. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: jz4740: Apply configuration atomicallyPaul Cercueil2019-06-251-25/+12
| | | | | | | | | | | | | | | | This is cleaner, more future-proof, and incidentally it also fixes the PWM resetting its config when stopped/started several times. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: jz4740: Remove unused devicetree compatible stringsPaul Cercueil2019-06-251-2/+0
| | | | | | | | | | | | | | | | | | | | Right now none of the Ingenic-based boards probe this driver from devicetree. This driver defined three compatible strings for the exact same behaviour. Before these strings are used, we can remove two of them. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 151Thomas Gleixner2019-05-301-10/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 35 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.655028468@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pwm: jz4740: Add support for devicetreePaul Cercueil2018-03-281-0/+14
| | | | | | | | Add support for probing the pwm-jz4740 directly from devicetree. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Implement ->set_polarity()Paul Cercueil2018-03-281-0/+19
| | | | | | | | This permits clients of this driver to specify the polarity to use for their PWM channel. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Make disable operation compatible with TCU2 modeMaarten ter Huurne2018-03-281-1/+7
| | | | | | | | | | On the JZ4750 and later SoCs, channel 1 and 2 operate in a different way (TCU2 mode) as the other channels. If a TCU2 mode counter is stopped before its PWM functionality is disabled, the output is not guaranteed to return to the initial level. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Let the pinctrl driver configure the pinsPaul Cercueil2017-05-221-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on the pins being properly configured before the driver probes. One inherent problem of this new approach is that the pinctrl framework does not allow us to configure each pin on demand, when the various PWM channels are requested or released. For instance, the PWM channels can be configured from sysfs, which would require all PWM pins to be configured properly beforehand for the PWM function, eventually causing conflicts with other platform or board drivers. The proper solution here would be to modify the pwm-jz4740 driver to handle only one PWM channel, and create an instance of this driver for each one of the 8 PWM channels. Then, it could use the pinctrl framework to dynamically configure the PWM pin it controls. Until this can be done, the only jz4740 board supported upstream (Qi lb60) can configure all of its connected PWM pins in PWM function mode, since those are not used by other drivers nor by GPIOs on the board. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pwm: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0
| | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* pwm: jz4740: Use devm_clk_get()Lars-Peter Clausen2013-12-121-17/+3
| | | | | | | | Using the managed version of clk_get() makes the code a bit shorter and the error paths less complicated. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: jz4740: Pass device to clk_get()Lars-Peter Clausen2013-12-121-1/+1
| | | | | | | | In preparation to switching the jz4740 clk driver to the common clk framework make sure to pass the device to clk_get(). Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: remove use of __devexitBill Pemberton2012-11-281-1/+1
| | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pwm: remove use of __devinitBill Pemberton2012-11-281-1/+1
| | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pwm: remove use of __devexit_pBill Pemberton2012-11-281-1/+1
| | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pwm: Add Ingenic JZ4740 supportThierry Reding2012-10-051-0/+221
This commit moves the driver to drivers/pwm and converts it to the new PWM framework. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org>
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